bl2u/bl2u.ld.S

   1 /*
   2  * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
   3  *
   4  * SPDX-License-Identifier: BSD-3-Clause
   5  */
   6
   7 #include <platform_def.h>
   8 #include <xlat_tables_defs.h>
   9
  10 OUTPUT_FORMAT(PLATFORM_LINKER_FORMAT)
  11 OUTPUT_ARCH(PLATFORM_LINKER_ARCH)
  12 ENTRY(bl2u_entrypoint)
  13
  14 MEMORY {
  15     RAM (rwx): ORIGIN = BL2U_BASE, LENGTH = BL2U_LIMIT - BL2U_BASE
  16 }
  17
  18
  19 SECTIONS
  20 {
  21     . = BL2U_BASE;
  22     ASSERT(. == ALIGN(PAGE_SIZE),
  23            "BL2U_BASE address is not aligned on a page boundary.")
  24
  25 #if SEPARATE_CODE_AND_RODATA
  26     .text . : {
  27         __TEXT_START__ = .;
  28         *bl2u_entrypoint.o(.text*)
  29         *(.text*)
  30         *(.vectors)
  31         . = ALIGN(PAGE_SIZE);
  32         __TEXT_END__ = .;
  33      } >RAM
  34
  35      /* .ARM.extab and .ARM.exidx are only added because Clang need them */
  36      .ARM.extab . : {
  37         *(.ARM.extab* .gnu.linkonce.armextab.*)
  38      } >RAM
  39
  40      .ARM.exidx . : {
  41         *(.ARM.exidx* .gnu.linkonce.armexidx.*)
  42      } >RAM
  43
  44     .rodata . : {
  45         __RODATA_START__ = .;
  46         *(.rodata*)
  47         . = ALIGN(PAGE_SIZE);
  48         __RODATA_END__ = .;
  49     } >RAM
  50 #else
  51     ro . : {
  52         __RO_START__ = .;
  53         *bl2u_entrypoint.o(.text*)
  54         *(.text*)
  55         *(.rodata*)
  56
  57         *(.vectors)
  58         __RO_END_UNALIGNED__ = .;
  59         /*
  60          * Memory page(s) mapped to this section will be marked as
  61          * read-only, executable.  No RW data from the next section must
  62          * creep in.  Ensure the rest of the current memory page is unused.
  63          */
  64         . = ALIGN(PAGE_SIZE);
  65         __RO_END__ = .;
  66     } >RAM
  67 #endif
  68
  69     /*
  70      * Define a linker symbol to mark start of the RW memory area for this
  71      * image.
  72      */
  73     __RW_START__ = . ;
  74
  75     /*
  76      * .data must be placed at a lower address than the stacks if the stack
  77      * protector is enabled. Alternatively, the .data.stack_protector_canary
  78      * section can be placed independently of the main .data section.
  79      */
  80     .data . : {
  81         __DATA_START__ = .;
  82         *(.data*)
  83         __DATA_END__ = .;
  84     } >RAM
  85
  86     stacks (NOLOAD) : {
  87         __STACKS_START__ = .;
  88         *(tzfw_normal_stacks)
  89         __STACKS_END__ = .;
  90     } >RAM
  91
  92     /*
  93      * The .bss section gets initialised to 0 at runtime.
  94      * Its base address should be 16-byte aligned for better performance of the
  95      * zero-initialization code.
  96      */
  97     .bss : ALIGN(16) {
  98         __BSS_START__ = .;
  99         *(SORT_BY_ALIGNMENT(.bss*))
 100         *(COMMON)
 101         __BSS_END__ = .;
 102     } >RAM
 103
 104     /*
 105      * The xlat_table section is for full, aligned page tables (4K).
 106      * Removing them from .bss avoids forcing 4K alignment on
 107      * the .bss section. The tables are initialized to zero by the translation
 108      * tables library.
 109      */
 110     xlat_table (NOLOAD) : {
 111         *(xlat_table)
 112     } >RAM
 113
 114 #if USE_COHERENT_MEM
 115     /*
 116      * The base address of the coherent memory section must be page-aligned (4K)
 117      * to guarantee that the coherent data are stored on their own pages and
 118      * are not mixed with normal data.  This is required to set up the correct
 119      * memory attributes for the coherent data page tables.
 120      */
 121     coherent_ram (NOLOAD) : ALIGN(PAGE_SIZE) {
 122         __COHERENT_RAM_START__ = .;
 123         *(tzfw_coherent_mem)
 124         __COHERENT_RAM_END_UNALIGNED__ = .;
 125         /*
 126          * Memory page(s) mapped to this section will be marked
 127          * as device memory.  No other unexpected data must creep in.
 128          * Ensure the rest of the current memory page is unused.
 129          */
 130         . = ALIGN(PAGE_SIZE);
 131         __COHERENT_RAM_END__ = .;
 132     } >RAM
 133 #endif
 134
 135     /*
 136      * Define a linker symbol to mark end of the RW memory area for this
 137      * image.
 138      */
 139     __RW_END__ = .;
 140     __BL2U_END__ = .;
 141
 142     __BSS_SIZE__ = SIZEOF(.bss);
 143
 144     ASSERT(. <= BL2U_LIMIT, "BL2U image has exceeded its limit.")
 145 }