Replace magic numbers in linkerscripts by PAGE_SIZE
[project/bcm63xx/atf.git] / bl2u / bl2u.ld.S
1 /*
2 * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include <platform_def.h>
8 #include <xlat_tables_defs.h>
9
10 OUTPUT_FORMAT(PLATFORM_LINKER_FORMAT)
11 OUTPUT_ARCH(PLATFORM_LINKER_ARCH)
12 ENTRY(bl2u_entrypoint)
13
14 MEMORY {
15 RAM (rwx): ORIGIN = BL2U_BASE, LENGTH = BL2U_LIMIT - BL2U_BASE
16 }
17
18
19 SECTIONS
20 {
21 . = BL2U_BASE;
22 ASSERT(. == ALIGN(PAGE_SIZE),
23 "BL2U_BASE address is not aligned on a page boundary.")
24
25 #if SEPARATE_CODE_AND_RODATA
26 .text . : {
27 __TEXT_START__ = .;
28 *bl2u_entrypoint.o(.text*)
29 *(.text*)
30 *(.vectors)
31 . = NEXT(PAGE_SIZE);
32 __TEXT_END__ = .;
33 } >RAM
34
35 .rodata . : {
36 __RODATA_START__ = .;
37 *(.rodata*)
38 . = NEXT(PAGE_SIZE);
39 __RODATA_END__ = .;
40 } >RAM
41 #else
42 ro . : {
43 __RO_START__ = .;
44 *bl2u_entrypoint.o(.text*)
45 *(.text*)
46 *(.rodata*)
47
48 *(.vectors)
49 __RO_END_UNALIGNED__ = .;
50 /*
51 * Memory page(s) mapped to this section will be marked as
52 * read-only, executable. No RW data from the next section must
53 * creep in. Ensure the rest of the current memory page is unused.
54 */
55 . = NEXT(PAGE_SIZE);
56 __RO_END__ = .;
57 } >RAM
58 #endif
59
60 /*
61 * Define a linker symbol to mark start of the RW memory area for this
62 * image.
63 */
64 __RW_START__ = . ;
65
66 /*
67 * .data must be placed at a lower address than the stacks if the stack
68 * protector is enabled. Alternatively, the .data.stack_protector_canary
69 * section can be placed independently of the main .data section.
70 */
71 .data . : {
72 __DATA_START__ = .;
73 *(.data*)
74 __DATA_END__ = .;
75 } >RAM
76
77 stacks (NOLOAD) : {
78 __STACKS_START__ = .;
79 *(tzfw_normal_stacks)
80 __STACKS_END__ = .;
81 } >RAM
82
83 /*
84 * The .bss section gets initialised to 0 at runtime.
85 * Its base address should be 16-byte aligned for better performance of the
86 * zero-initialization code.
87 */
88 .bss : ALIGN(16) {
89 __BSS_START__ = .;
90 *(SORT_BY_ALIGNMENT(.bss*))
91 *(COMMON)
92 __BSS_END__ = .;
93 } >RAM
94
95 /*
96 * The xlat_table section is for full, aligned page tables (4K).
97 * Removing them from .bss avoids forcing 4K alignment on
98 * the .bss section and eliminates the unecessary zero init
99 */
100 xlat_table (NOLOAD) : {
101 *(xlat_table)
102 } >RAM
103
104 #if USE_COHERENT_MEM
105 /*
106 * The base address of the coherent memory section must be page-aligned (4K)
107 * to guarantee that the coherent data are stored on their own pages and
108 * are not mixed with normal data. This is required to set up the correct
109 * memory attributes for the coherent data page tables.
110 */
111 coherent_ram (NOLOAD) : ALIGN(PAGE_SIZE) {
112 __COHERENT_RAM_START__ = .;
113 *(tzfw_coherent_mem)
114 __COHERENT_RAM_END_UNALIGNED__ = .;
115 /*
116 * Memory page(s) mapped to this section will be marked
117 * as device memory. No other unexpected data must creep in.
118 * Ensure the rest of the current memory page is unused.
119 */
120 . = NEXT(PAGE_SIZE);
121 __COHERENT_RAM_END__ = .;
122 } >RAM
123 #endif
124
125 /*
126 * Define a linker symbol to mark end of the RW memory area for this
127 * image.
128 */
129 __RW_END__ = .;
130 __BL2U_END__ = .;
131
132 __BSS_SIZE__ = SIZEOF(.bss);
133
134 ASSERT(. <= BL2U_LIMIT, "BL2U image has exceeded its limit.")
135 }