watchdog: Implement generic watchdog_reset() version
[project/bcm63xx/u-boot.git] / board / CZ.NIC / turris_mox / turris_mox.c
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2018 Marek Behun <marek.behun@nic.cz>
4 */
5
6 #include <common.h>
7 #include <asm/gpio.h>
8 #include <asm/io.h>
9 #include <dm.h>
10 #include <clk.h>
11 #include <spi.h>
12 #include <mvebu/comphy.h>
13 #include <miiphy.h>
14 #include <linux/string.h>
15 #include <linux/libfdt.h>
16 #include <fdt_support.h>
17 #include <environment.h>
18
19 #ifdef CONFIG_WDT_ARMADA_37XX
20 #include <wdt.h>
21 #endif
22
23 #include "mox_sp.h"
24
25 #define MAX_MOX_MODULES 10
26
27 #define MOX_MODULE_SFP 0x1
28 #define MOX_MODULE_PCI 0x2
29 #define MOX_MODULE_TOPAZ 0x3
30 #define MOX_MODULE_PERIDOT 0x4
31 #define MOX_MODULE_USB3 0x5
32 #define MOX_MODULE_PASSPCI 0x6
33
34 #define ARMADA_37XX_NB_GPIO_SEL 0xd0013830
35 #define ARMADA_37XX_SPI_CTRL 0xd0010600
36 #define ARMADA_37XX_SPI_CFG 0xd0010604
37 #define ARMADA_37XX_SPI_DOUT 0xd0010608
38 #define ARMADA_37XX_SPI_DIN 0xd001060c
39
40 #define PCIE_PATH "/soc/pcie@d0070000"
41
42 DECLARE_GLOBAL_DATA_PTR;
43
44 int dram_init(void)
45 {
46 gd->ram_base = 0;
47 gd->ram_size = (phys_size_t)get_ram_size(0, 0x40000000);
48
49 return 0;
50 }
51
52 int dram_init_banksize(void)
53 {
54 gd->bd->bi_dram[0].start = (phys_addr_t)0;
55 gd->bd->bi_dram[0].size = gd->ram_size;
56
57 return 0;
58 }
59
60 #if defined(CONFIG_OF_BOARD_FIXUP)
61 int board_fix_fdt(void *blob)
62 {
63 u8 topology[MAX_MOX_MODULES];
64 int i, size, node;
65 bool enable;
66
67 /*
68 * SPI driver is not loaded in driver model yet, but we have to find out
69 * if pcie should be enabled in U-Boot's device tree. Therefore we have
70 * to read SPI by reading/writing SPI registers directly
71 */
72
73 writel(0x563fa, ARMADA_37XX_NB_GPIO_SEL);
74 writel(0x10df, ARMADA_37XX_SPI_CFG);
75 writel(0x2005b, ARMADA_37XX_SPI_CTRL);
76
77 while (!(readl(ARMADA_37XX_SPI_CTRL) & 0x2))
78 udelay(1);
79
80 for (i = 0; i < MAX_MOX_MODULES; ++i) {
81 writel(0x0, ARMADA_37XX_SPI_DOUT);
82
83 while (!(readl(ARMADA_37XX_SPI_CTRL) & 0x2))
84 udelay(1);
85
86 topology[i] = readl(ARMADA_37XX_SPI_DIN) & 0xff;
87 if (topology[i] == 0xff)
88 break;
89
90 topology[i] &= 0xf;
91 }
92
93 size = i;
94
95 writel(0x5b, ARMADA_37XX_SPI_CTRL);
96
97 if (size > 1 && (topology[1] == MOX_MODULE_PCI ||
98 topology[1] == MOX_MODULE_USB3 ||
99 topology[1] == MOX_MODULE_PASSPCI))
100 enable = true;
101 else
102 enable = false;
103
104 node = fdt_path_offset(blob, PCIE_PATH);
105
106 if (node < 0) {
107 printf("Cannot find PCIe node in U-Boot's device tree!\n");
108 return 0;
109 }
110
111 if (fdt_setprop_string(blob, node, "status",
112 enable ? "okay" : "disabled") < 0) {
113 printf("Cannot %s PCIe in U-Boot's device tree!\n",
114 enable ? "enable" : "disable");
115 return 0;
116 }
117
118 return 0;
119 }
120 #endif
121
122 int board_init(void)
123 {
124 /* address of boot parameters */
125 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
126
127 return 0;
128 }
129
130 static int mox_do_spi(u8 *in, u8 *out, size_t size)
131 {
132 struct spi_slave *slave;
133 struct udevice *dev;
134 int ret;
135
136 ret = spi_get_bus_and_cs(0, 1, 1000000, SPI_CPHA | SPI_CPOL,
137 "spi_generic_drv", "moxtet@1", &dev,
138 &slave);
139 if (ret)
140 goto fail;
141
142 ret = spi_claim_bus(slave);
143 if (ret)
144 goto fail_free;
145
146 ret = spi_xfer(slave, size * 8, out, in, SPI_XFER_ONCE);
147
148 spi_release_bus(slave);
149 fail_free:
150 spi_free_slave(slave);
151 fail:
152 return ret;
153 }
154
155 static int mox_get_topology(const u8 **ptopology, int *psize, int *pis_sd)
156 {
157 static int is_sd;
158 static u8 topology[MAX_MOX_MODULES - 1];
159 static int size;
160 u8 din[MAX_MOX_MODULES], dout[MAX_MOX_MODULES];
161 int ret, i;
162
163 if (size) {
164 if (ptopology)
165 *ptopology = topology;
166 if (psize)
167 *psize = size;
168 if (pis_sd)
169 *pis_sd = is_sd;
170 return 0;
171 }
172
173 memset(din, 0, MAX_MOX_MODULES);
174 memset(dout, 0, MAX_MOX_MODULES);
175
176 ret = mox_do_spi(din, dout, MAX_MOX_MODULES);
177 if (ret)
178 return ret;
179
180 if (din[0] == 0x10)
181 is_sd = 1;
182 else if (din[0] == 0x00)
183 is_sd = 0;
184 else
185 return -ENODEV;
186
187 for (i = 1; i < MAX_MOX_MODULES && din[i] != 0xff; ++i)
188 topology[i - 1] = din[i] & 0xf;
189 size = i - 1;
190
191 if (ptopology)
192 *ptopology = topology;
193 if (psize)
194 *psize = size;
195 if (pis_sd)
196 *pis_sd = is_sd;
197
198 return 0;
199 }
200
201 int comphy_update_map(struct comphy_map *serdes_map, int count)
202 {
203 int ret, i, size, sfpindex = -1, swindex = -1;
204 const u8 *topology;
205
206 ret = mox_get_topology(&topology, &size, NULL);
207 if (ret)
208 return ret;
209
210 for (i = 0; i < size; ++i) {
211 if (topology[i] == MOX_MODULE_SFP && sfpindex == -1)
212 sfpindex = i;
213 else if ((topology[i] == MOX_MODULE_TOPAZ ||
214 topology[i] == MOX_MODULE_PERIDOT) &&
215 swindex == -1)
216 swindex = i;
217 }
218
219 if (sfpindex >= 0 && swindex >= 0) {
220 if (sfpindex < swindex)
221 serdes_map[0].speed = PHY_SPEED_1_25G;
222 else
223 serdes_map[0].speed = PHY_SPEED_3_125G;
224 } else if (sfpindex >= 0) {
225 serdes_map[0].speed = PHY_SPEED_1_25G;
226 } else if (swindex >= 0) {
227 serdes_map[0].speed = PHY_SPEED_3_125G;
228 }
229
230 return 0;
231 }
232
233 #define SW_SMI_CMD_R(d, r) (0x9800 | (((d) & 0x1f) << 5) | ((r) & 0x1f))
234 #define SW_SMI_CMD_W(d, r) (0x9400 | (((d) & 0x1f) << 5) | ((r) & 0x1f))
235
236 static int sw_multi_read(struct mii_dev *bus, int sw, int dev, int reg)
237 {
238 bus->write(bus, sw, 0, 0, SW_SMI_CMD_R(dev, reg));
239 mdelay(5);
240 return bus->read(bus, sw, 0, 1);
241 }
242
243 static void sw_multi_write(struct mii_dev *bus, int sw, int dev, int reg,
244 u16 val)
245 {
246 bus->write(bus, sw, 0, 1, val);
247 bus->write(bus, sw, 0, 0, SW_SMI_CMD_W(dev, reg));
248 mdelay(5);
249 }
250
251 static int sw_scratch_read(struct mii_dev *bus, int sw, int reg)
252 {
253 sw_multi_write(bus, sw, 0x1c, 0x1a, (reg & 0x7f) << 8);
254 return sw_multi_read(bus, sw, 0x1c, 0x1a) & 0xff;
255 }
256
257 static void sw_led_write(struct mii_dev *bus, int sw, int port, int reg,
258 u16 val)
259 {
260 sw_multi_write(bus, sw, port, 0x16, 0x8000 | ((reg & 7) << 12)
261 | (val & 0x7ff));
262 }
263
264 static void sw_blink_leds(struct mii_dev *bus, int peridot, int topaz)
265 {
266 int i, p;
267 struct {
268 int port;
269 u16 val;
270 int wait;
271 } regs[] = {
272 { 2, 0xef, 1 }, { 2, 0xfe, 1 }, { 2, 0x33, 0 },
273 { 4, 0xef, 1 }, { 4, 0xfe, 1 }, { 4, 0x33, 0 },
274 { 3, 0xfe, 1 }, { 3, 0xef, 1 }, { 3, 0x33, 0 },
275 { 1, 0xfe, 1 }, { 1, 0xef, 1 }, { 1, 0x33, 0 }
276 };
277
278 for (i = 0; i < 12; ++i) {
279 for (p = 0; p < peridot; ++p) {
280 sw_led_write(bus, 0x10 + p, regs[i].port, 0,
281 regs[i].val);
282 sw_led_write(bus, 0x10 + p, regs[i].port + 4, 0,
283 regs[i].val);
284 }
285 if (topaz) {
286 sw_led_write(bus, 0x2, 0x10 + regs[i].port, 0,
287 regs[i].val);
288 }
289
290 if (regs[i].wait)
291 mdelay(75);
292 }
293 }
294
295 static void check_switch_address(struct mii_dev *bus, int addr)
296 {
297 if (sw_scratch_read(bus, addr, 0x70) >> 3 != addr)
298 printf("Check of switch MDIO address failed for 0x%02x\n",
299 addr);
300 }
301
302 static int sfp, pci, topaz, peridot, usb, passpci;
303 static int sfp_pos, peridot_pos[3];
304 static int module_count;
305
306 static int configure_peridots(struct gpio_desc *reset_gpio)
307 {
308 int i, ret;
309 u8 dout[MAX_MOX_MODULES];
310
311 memset(dout, 0, MAX_MOX_MODULES);
312
313 /* set addresses of Peridot modules */
314 for (i = 0; i < peridot; ++i)
315 dout[module_count - peridot_pos[i]] = (~i) & 3;
316
317 /*
318 * if there is a SFP module connected to the last Peridot module, set
319 * the P10_SMODE to 1 for the Peridot module
320 */
321 if (sfp)
322 dout[module_count - peridot_pos[i - 1]] |= 1 << 3;
323
324 dm_gpio_set_value(reset_gpio, 1);
325 mdelay(10);
326
327 ret = mox_do_spi(NULL, dout, module_count + 1);
328
329 mdelay(10);
330 dm_gpio_set_value(reset_gpio, 0);
331
332 mdelay(50);
333
334 return ret;
335 }
336
337 static int get_reset_gpio(struct gpio_desc *reset_gpio)
338 {
339 int node;
340
341 node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "cznic,moxtet");
342 if (node < 0) {
343 printf("Cannot find Moxtet bus device node!\n");
344 return -1;
345 }
346
347 gpio_request_by_name_nodev(offset_to_ofnode(node), "reset-gpios", 0,
348 reset_gpio, GPIOD_IS_OUT);
349
350 if (!dm_gpio_is_valid(reset_gpio)) {
351 printf("Cannot find reset GPIO for Moxtet bus!\n");
352 return -1;
353 }
354
355 return 0;
356 }
357
358 int misc_init_r(void)
359 {
360 int ret;
361 u8 mac1[6], mac2[6];
362
363 ret = mbox_sp_get_board_info(NULL, mac1, mac2, NULL, NULL);
364 if (ret < 0) {
365 printf("Cannot read data from OTP!\n");
366 return 0;
367 }
368
369 if (is_valid_ethaddr(mac1) && !env_get("ethaddr"))
370 eth_env_set_enetaddr("ethaddr", mac1);
371
372 if (is_valid_ethaddr(mac2) && !env_get("eth1addr"))
373 eth_env_set_enetaddr("eth1addr", mac2);
374
375 return 0;
376 }
377
378 static void mox_print_info(void)
379 {
380 int ret, board_version, ram_size;
381 u64 serial_number;
382 const char *pub_key;
383
384 ret = mbox_sp_get_board_info(&serial_number, NULL, NULL, &board_version,
385 &ram_size);
386 if (ret < 0)
387 return;
388
389 printf("Turris Mox:\n");
390 printf(" Board version: %i\n", board_version);
391 printf(" RAM size: %i MiB\n", ram_size);
392 printf(" Serial Number: %016llX\n", serial_number);
393
394 pub_key = mox_sp_get_ecdsa_public_key();
395 if (pub_key)
396 printf(" ECDSA Public Key: %s\n", pub_key);
397 else
398 printf("Cannot read ECDSA Public Key\n");
399 }
400
401 int last_stage_init(void)
402 {
403 int ret, i;
404 const u8 *topology;
405 int is_sd;
406 struct mii_dev *bus;
407 struct gpio_desc reset_gpio = {};
408
409 mox_print_info();
410
411 ret = mox_get_topology(&topology, &module_count, &is_sd);
412 if (ret) {
413 printf("Cannot read module topology!\n");
414 return 0;
415 }
416
417 printf(" SD/eMMC version: %s\n", is_sd ? "SD" : "eMMC");
418
419 if (module_count)
420 printf("Module Topology:\n");
421
422 for (i = 0; i < module_count; ++i) {
423 switch (topology[i]) {
424 case MOX_MODULE_SFP:
425 printf("% 4i: SFP Module\n", i + 1);
426 break;
427 case MOX_MODULE_PCI:
428 printf("% 4i: Mini-PCIe Module\n", i + 1);
429 break;
430 case MOX_MODULE_TOPAZ:
431 printf("% 4i: Topaz Switch Module (4-port)\n", i + 1);
432 break;
433 case MOX_MODULE_PERIDOT:
434 printf("% 4i: Peridot Switch Module (8-port)\n", i + 1);
435 break;
436 case MOX_MODULE_USB3:
437 printf("% 4i: USB 3.0 Module (4 ports)\n", i + 1);
438 break;
439 case MOX_MODULE_PASSPCI:
440 printf("% 4i: Passthrough Mini-PCIe Module\n", i + 1);
441 break;
442 default:
443 printf("% 4i: unknown (ID %i)\n", i + 1, topology[i]);
444 }
445 }
446
447 /* now check if modules are connected in supported mode */
448
449 for (i = 0; i < module_count; ++i) {
450 switch (topology[i]) {
451 case MOX_MODULE_SFP:
452 if (sfp) {
453 printf("Error: Only one SFP module is supported!\n");
454 } else if (topaz) {
455 printf("Error: SFP module cannot be connected after Topaz Switch module!\n");
456 } else {
457 sfp_pos = i;
458 ++sfp;
459 }
460 break;
461 case MOX_MODULE_PCI:
462 if (pci) {
463 printf("Error: Only one Mini-PCIe module is supported!\n");
464 } else if (usb) {
465 printf("Error: Mini-PCIe module cannot come after USB 3.0 module!\n");
466 } else if (i && (i != 1 || !passpci)) {
467 printf("Error: Mini-PCIe module should be the first connected module or come right after Passthrough Mini-PCIe module!\n");
468 } else {
469 ++pci;
470 }
471 break;
472 case MOX_MODULE_TOPAZ:
473 if (topaz) {
474 printf("Error: Only one Topaz module is supported!\n");
475 } else if (peridot >= 3) {
476 printf("Error: At most two Peridot modules can come before Topaz module!\n");
477 } else {
478 ++topaz;
479 }
480 break;
481 case MOX_MODULE_PERIDOT:
482 if (sfp || topaz) {
483 printf("Error: Peridot module must come before SFP or Topaz module!\n");
484 } else if (peridot >= 3) {
485 printf("Error: At most three Peridot modules are supported!\n");
486 } else {
487 peridot_pos[peridot] = i;
488 ++peridot;
489 }
490 break;
491 case MOX_MODULE_USB3:
492 if (pci) {
493 printf("Error: USB 3.0 module cannot come after Mini-PCIe module!\n");
494 } else if (usb) {
495 printf("Error: Only one USB 3.0 module is supported!\n");
496 } else if (i && (i != 1 || !passpci)) {
497 printf("Error: USB 3.0 module should be the first connected module or come right after Passthrough Mini-PCIe module!\n");
498 } else {
499 ++usb;
500 }
501 break;
502 case MOX_MODULE_PASSPCI:
503 if (passpci) {
504 printf("Error: Only one Passthrough Mini-PCIe module is supported!\n");
505 } else if (i != 0) {
506 printf("Error: Passthrough Mini-PCIe module should be the first connected module!\n");
507 } else {
508 ++passpci;
509 }
510 }
511 }
512
513 /* now configure modules */
514
515 if (get_reset_gpio(&reset_gpio) < 0)
516 return 0;
517
518 if (peridot > 0) {
519 if (configure_peridots(&reset_gpio) < 0) {
520 printf("Cannot configure Peridot modules!\n");
521 peridot = 0;
522 }
523 } else {
524 dm_gpio_set_value(&reset_gpio, 1);
525 mdelay(50);
526 dm_gpio_set_value(&reset_gpio, 0);
527 mdelay(50);
528 }
529
530 if (peridot || topaz) {
531 /*
532 * now check if the addresses are set by reading Scratch & Misc
533 * register 0x70 of Peridot (and potentially Topaz) modules
534 */
535
536 bus = miiphy_get_dev_by_name("neta@30000");
537 if (!bus) {
538 printf("Cannot get MDIO bus device!\n");
539 } else {
540 for (i = 0; i < peridot; ++i)
541 check_switch_address(bus, 0x10 + i);
542
543 if (topaz)
544 check_switch_address(bus, 0x2);
545
546 sw_blink_leds(bus, peridot, topaz);
547 }
548 }
549
550 printf("\n");
551
552 return 0;
553 }