board/ti/am43xx/mux.c

   1 /*
   2  * mux.c
   3  *
   4  * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9 #include <common.h>
  10 #include <asm/arch/sys_proto.h>
  11 #include <asm/arch/mux.h>
  12 #include "board.h"
  13
  14 static struct module_pin_mux uart0_pin_mux[] = {
  15         {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE | SLEWCTRL)},
  16         {OFFSET(uart0_txd), (MODE(0) | PULLUDDIS | PULLUP_EN | SLEWCTRL)},
  17         {-1},
  18 };
  19
  20 static struct module_pin_mux mmc0_pin_mux[] = {
  21         {OFFSET(mmc0_clk), (MODE(0) | PULLUDDIS | RXACTIVE)},  /* MMC0_CLK */
  22         {OFFSET(mmc0_cmd), (MODE(0) | PULLUP_EN | RXACTIVE)},  /* MMC0_CMD */
  23         {OFFSET(mmc0_dat0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* MMC0_DAT0 */
  24         {OFFSET(mmc0_dat1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* MMC0_DAT1 */
  25         {OFFSET(mmc0_dat2), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* MMC0_DAT2 */
  26         {OFFSET(mmc0_dat3), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* MMC0_DAT3 */
  27         {-1},
  28 };
  29
  30 static struct module_pin_mux i2c0_pin_mux[] = {
  31         {OFFSET(i2c0_sda), (MODE(0) | PULLUP_EN | RXACTIVE | SLEWCTRL)},
  32         {OFFSET(i2c0_scl), (MODE(0) | PULLUP_EN | RXACTIVE | SLEWCTRL)},
  33         {-1},
  34 };
  35
  36 static struct module_pin_mux gpio0_22_pin_mux[] = {
  37         {OFFSET(ddr_ba2), (MODE(9) | PULLUP_EN)},       /* GPIO0_22 */
  38         {-1},
  39 };
  40
  41 static struct module_pin_mux qspi_pin_mux[] = {
  42         {OFFSET(gpmc_csn0), (MODE(3) | PULLUP_EN | RXACTIVE)}, /* QSPI_CS0 */
  43         {OFFSET(gpmc_csn3), (MODE(2) | PULLUP_EN | RXACTIVE)}, /* QSPI_CLK */
  44         {OFFSET(gpmc_advn_ale), (MODE(3) | PULLUP_EN | RXACTIVE)}, /* QSPI_D0 */
  45         {OFFSET(gpmc_oen_ren), (MODE(3) | PULLUP_EN | RXACTIVE)}, /* QSPI_D1 */
  46         {OFFSET(gpmc_wen), (MODE(3) | PULLUP_EN | RXACTIVE)}, /* QSPI_D2 */
  47         {OFFSET(gpmc_be0n_cle), (MODE(3) | PULLUP_EN | RXACTIVE)}, /* QSPI_D3 */
  48         {-1},
  49 };
  50
  51 void enable_uart0_pin_mux(void)
  52 {
  53         configure_module_pin_mux(uart0_pin_mux);
  54 }
  55
  56 void enable_board_pin_mux(void)
  57 {
  58         configure_module_pin_mux(mmc0_pin_mux);
  59         configure_module_pin_mux(i2c0_pin_mux);
  60
  61         if (board_is_gpevm())
  62                 configure_module_pin_mux(gpio0_22_pin_mux);
  63         configure_module_pin_mux(qspi_pin_mux);
  64 }
  65
  66 void enable_i2c0_pin_mux(void)
  67 {
  68         configure_module_pin_mux(i2c0_pin_mux);
  69 }