1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2011 The Chromium OS Authors.
4 * (C) Copyright 2002-2006
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
8 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
9 * Marius Groeger <mgroeger@sysgo.de>
17 #include <environment.h>
30 #include <status_led.h>
36 #ifdef CONFIG_MACH_TYPE
37 #include <asm/mach-types.h>
39 #if defined(CONFIG_MP) && defined(CONFIG_PPC)
43 #include <asm/sections.h>
45 #include <linux/errno.h>
48 * Pointer to initial global data area
50 * Here we initialize it if needed.
52 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
53 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
54 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
55 DECLARE_GLOBAL_DATA_PTR
= (gd_t
*)(CONFIG_SYS_INIT_GD_ADDR
);
57 DECLARE_GLOBAL_DATA_PTR
;
61 * TODO(sjg@chromium.org): IMO this code should be
62 * refactored to a single function, something like:
64 * void led_set_state(enum led_colour_t colour, int on);
66 /************************************************************************
67 * Coloured LED functionality
68 ************************************************************************
69 * May be supplied by boards if desired
71 __weak
void coloured_LED_init(void) {}
72 __weak
void red_led_on(void) {}
73 __weak
void red_led_off(void) {}
74 __weak
void green_led_on(void) {}
75 __weak
void green_led_off(void) {}
76 __weak
void yellow_led_on(void) {}
77 __weak
void yellow_led_off(void) {}
78 __weak
void blue_led_on(void) {}
79 __weak
void blue_led_off(void) {}
82 * Why is gd allocated a register? Prior to reloc it might be better to
83 * just pass it around to each function in this file?
85 * After reloc one could argue that it is hardly used and doesn't need
86 * to be in a register. Or if it is it should perhaps hold pointers to all
87 * global data for all modules, so that post-reloc we can avoid the massive
88 * literal pool we get on ARM. Or perhaps just encourage each module to use
92 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
93 static int init_func_watchdog_init(void)
95 # if defined(CONFIG_HW_WATCHDOG) && \
96 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
97 defined(CONFIG_SH) || \
98 defined(CONFIG_DESIGNWARE_WATCHDOG) || \
99 defined(CONFIG_IMX_WATCHDOG))
101 puts(" Watchdog enabled\n");
108 int init_func_watchdog_reset(void)
114 #endif /* CONFIG_WATCHDOG */
116 __weak
void board_add_ram_info(int use_default
)
118 /* please define platform specific board_add_ram_info() */
121 static int init_baud_rate(void)
123 gd
->baudrate
= env_get_ulong("baudrate", 10, CONFIG_BAUDRATE
);
127 static int display_text_info(void)
129 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
130 ulong bss_start
, bss_end
, text_base
;
132 bss_start
= (ulong
)&__bss_start
;
133 bss_end
= (ulong
)&__bss_end
;
135 #ifdef CONFIG_SYS_TEXT_BASE
136 text_base
= CONFIG_SYS_TEXT_BASE
;
138 text_base
= CONFIG_SYS_MONITOR_BASE
;
141 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
142 text_base
, bss_start
, bss_end
);
148 #ifdef CONFIG_SYSRESET
149 static int print_resetinfo(void)
155 ret
= uclass_first_device_err(UCLASS_SYSRESET
, &dev
);
157 debug("%s: No sysreset device found (error: %d)\n",
159 /* Not all boards have sysreset drivers available during early
160 * boot, so don't fail if one can't be found.
165 if (!sysreset_get_status(dev
, status
, sizeof(status
)))
166 printf("%s", status
);
172 #if defined(CONFIG_DISPLAY_CPUINFO) && CONFIG_IS_ENABLED(CPU)
173 static int print_cpuinfo(void)
179 ret
= uclass_first_device_err(UCLASS_CPU
, &dev
);
181 debug("%s: Could not get CPU device (err = %d)\n",
186 ret
= cpu_get_desc(dev
, desc
, sizeof(desc
));
188 debug("%s: Could not get CPU description (err = %d)\n",
193 printf("CPU: %s\n", desc
);
199 static int announce_dram_init(void)
205 static int show_dram_config(void)
207 unsigned long long size
;
209 #ifdef CONFIG_NR_DRAM_BANKS
212 debug("\nRAM Configuration:\n");
213 for (i
= size
= 0; i
< CONFIG_NR_DRAM_BANKS
; i
++) {
214 size
+= gd
->bd
->bi_dram
[i
].size
;
215 debug("Bank #%d: %llx ", i
,
216 (unsigned long long)(gd
->bd
->bi_dram
[i
].start
));
218 print_size(gd
->bd
->bi_dram
[i
].size
, "\n");
226 print_size(size
, "");
227 board_add_ram_info(0);
233 __weak
int dram_init_banksize(void)
235 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
236 gd
->bd
->bi_dram
[0].start
= CONFIG_SYS_SDRAM_BASE
;
237 gd
->bd
->bi_dram
[0].size
= get_effective_memsize();
243 #if defined(CONFIG_SYS_I2C)
244 static int init_func_i2c(void)
247 #ifdef CONFIG_SYS_I2C
250 i2c_init(CONFIG_SYS_I2C_SPEED
, CONFIG_SYS_I2C_SLAVE
);
257 #if defined(CONFIG_VID)
258 __weak
int init_func_vid(void)
264 static int setup_mon_len(void)
266 #if defined(__ARM__) || defined(__MICROBLAZE__)
267 gd
->mon_len
= (ulong
)&__bss_end
- (ulong
)_start
;
268 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
269 gd
->mon_len
= (ulong
)&_end
- (ulong
)_init
;
270 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
271 gd
->mon_len
= CONFIG_SYS_MONITOR_LEN
;
272 #elif defined(CONFIG_NDS32) || defined(CONFIG_SH) || defined(CONFIG_RISCV)
273 gd
->mon_len
= (ulong
)(&__bss_end
) - (ulong
)(&_start
);
274 #elif defined(CONFIG_SYS_MONITOR_BASE)
275 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
276 gd
->mon_len
= (ulong
)&__bss_end
- CONFIG_SYS_MONITOR_BASE
;
281 static int setup_spl_handoff(void)
283 #if CONFIG_IS_ENABLED(HANDOFF)
284 gd
->spl_handoff
= bloblist_find(BLOBLISTT_SPL_HANDOFF
,
285 sizeof(struct spl_handoff
));
286 debug("Found SPL hand-off info %p\n", gd
->spl_handoff
);
292 __weak
int arch_cpu_init(void)
297 __weak
int mach_cpu_init(void)
302 /* Get the top of usable RAM */
303 __weak ulong
board_get_usable_ram_top(ulong total_size
)
305 #ifdef CONFIG_SYS_SDRAM_BASE
307 * Detect whether we have so much RAM that it goes past the end of our
308 * 32-bit address space. If so, clip the usable RAM so it doesn't.
310 if (gd
->ram_top
< CONFIG_SYS_SDRAM_BASE
)
312 * Will wrap back to top of 32-bit space when reservations
320 static int setup_dest_addr(void)
322 debug("Monitor len: %08lX\n", gd
->mon_len
);
324 * Ram is setup, size stored in gd !!
326 debug("Ram size: %08lX\n", (ulong
)gd
->ram_size
);
327 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
329 * Subtract specified amount of memory to hide so that it won't
330 * get "touched" at all by U-Boot. By fixing up gd->ram_size
331 * the Linux kernel should now get passed the now "corrected"
332 * memory size and won't touch it either. This should work
333 * for arch/ppc and arch/powerpc. Only Linux board ports in
334 * arch/powerpc with bootwrapper support, that recalculate the
335 * memory size from the SDRAM controller setup will have to
338 gd
->ram_size
-= CONFIG_SYS_MEM_TOP_HIDE
;
340 #ifdef CONFIG_SYS_SDRAM_BASE
341 gd
->ram_base
= CONFIG_SYS_SDRAM_BASE
;
343 gd
->ram_top
= gd
->ram_base
+ get_effective_memsize();
344 gd
->ram_top
= board_get_usable_ram_top(gd
->mon_len
);
345 gd
->relocaddr
= gd
->ram_top
;
346 debug("Ram top: %08lX\n", (ulong
)gd
->ram_top
);
347 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
349 * We need to make sure the location we intend to put secondary core
350 * boot code is reserved and not used by any part of u-boot
352 if (gd
->relocaddr
> determine_mp_bootpg(NULL
)) {
353 gd
->relocaddr
= determine_mp_bootpg(NULL
);
354 debug("Reserving MP boot page to %08lx\n", gd
->relocaddr
);
361 /* reserve protected RAM */
362 static int reserve_pram(void)
366 reg
= env_get_ulong("pram", 10, CONFIG_PRAM
);
367 gd
->relocaddr
-= (reg
<< 10); /* size is in kB */
368 debug("Reserving %ldk for protected RAM at %08lx\n", reg
,
372 #endif /* CONFIG_PRAM */
374 /* Round memory pointer down to next 4 kB limit */
375 static int reserve_round_4k(void)
377 gd
->relocaddr
&= ~(4096 - 1);
382 __weak
int reserve_mmu(void)
384 #if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
385 /* reserve TLB table */
386 gd
->arch
.tlb_size
= PGTABLE_SIZE
;
387 gd
->relocaddr
-= gd
->arch
.tlb_size
;
389 /* round down to next 64 kB limit */
390 gd
->relocaddr
&= ~(0x10000 - 1);
392 gd
->arch
.tlb_addr
= gd
->relocaddr
;
393 debug("TLB table from %08lx to %08lx\n", gd
->arch
.tlb_addr
,
394 gd
->arch
.tlb_addr
+ gd
->arch
.tlb_size
);
396 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
398 * Record allocated tlb_addr in case gd->tlb_addr to be overwritten
399 * with location within secure ram.
401 gd
->arch
.tlb_allocated
= gd
->arch
.tlb_addr
;
409 static int reserve_video(void)
411 #ifdef CONFIG_DM_VIDEO
415 addr
= gd
->relocaddr
;
416 ret
= video_reserve(&addr
);
419 gd
->relocaddr
= addr
;
420 #elif defined(CONFIG_LCD)
421 # ifdef CONFIG_FB_ADDR
422 gd
->fb_base
= CONFIG_FB_ADDR
;
424 /* reserve memory for LCD display (always full pages) */
425 gd
->relocaddr
= lcd_setmem(gd
->relocaddr
);
426 gd
->fb_base
= gd
->relocaddr
;
427 # endif /* CONFIG_FB_ADDR */
428 #elif defined(CONFIG_VIDEO) && \
429 (!defined(CONFIG_PPC)) && \
430 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
431 !defined(CONFIG_M68K)
432 /* reserve memory for video display (always full pages) */
433 gd
->relocaddr
= video_setmem(gd
->relocaddr
);
434 gd
->fb_base
= gd
->relocaddr
;
440 static int reserve_trace(void)
443 gd
->relocaddr
-= CONFIG_TRACE_BUFFER_SIZE
;
444 gd
->trace_buff
= map_sysmem(gd
->relocaddr
, CONFIG_TRACE_BUFFER_SIZE
);
445 debug("Reserving %dk for trace data at: %08lx\n",
446 CONFIG_TRACE_BUFFER_SIZE
>> 10, gd
->relocaddr
);
452 static int reserve_uboot(void)
454 if (!(gd
->flags
& GD_FLG_SKIP_RELOC
)) {
456 * reserve memory for U-Boot code, data & bss
457 * round down to next 4 kB limit
459 gd
->relocaddr
-= gd
->mon_len
;
460 gd
->relocaddr
&= ~(4096 - 1);
461 #if defined(CONFIG_E500) || defined(CONFIG_MIPS)
462 /* round down to next 64 kB limit so that IVPR stays aligned */
463 gd
->relocaddr
&= ~(65536 - 1);
466 debug("Reserving %ldk for U-Boot at: %08lx\n",
467 gd
->mon_len
>> 10, gd
->relocaddr
);
470 gd
->start_addr_sp
= gd
->relocaddr
;
475 /* reserve memory for malloc() area */
476 static int reserve_malloc(void)
478 gd
->start_addr_sp
= gd
->start_addr_sp
- TOTAL_MALLOC_LEN
;
479 debug("Reserving %dk for malloc() at: %08lx\n",
480 TOTAL_MALLOC_LEN
>> 10, gd
->start_addr_sp
);
484 /* (permanently) allocate a Board Info struct */
485 static int reserve_board(void)
488 gd
->start_addr_sp
-= sizeof(bd_t
);
489 gd
->bd
= (bd_t
*)map_sysmem(gd
->start_addr_sp
, sizeof(bd_t
));
490 memset(gd
->bd
, '\0', sizeof(bd_t
));
491 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
492 sizeof(bd_t
), gd
->start_addr_sp
);
497 static int setup_machine(void)
499 #ifdef CONFIG_MACH_TYPE
500 gd
->bd
->bi_arch_number
= CONFIG_MACH_TYPE
; /* board id for Linux */
505 static int reserve_global_data(void)
507 gd
->start_addr_sp
-= sizeof(gd_t
);
508 gd
->new_gd
= (gd_t
*)map_sysmem(gd
->start_addr_sp
, sizeof(gd_t
));
509 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
510 sizeof(gd_t
), gd
->start_addr_sp
);
514 static int reserve_fdt(void)
516 #ifndef CONFIG_OF_EMBED
518 * If the device tree is sitting immediately above our image then we
519 * must relocate it. If it is embedded in the data section, then it
520 * will be relocated with other data.
523 gd
->fdt_size
= ALIGN(fdt_totalsize(gd
->fdt_blob
) + 0x1000, 32);
525 gd
->start_addr_sp
-= gd
->fdt_size
;
526 gd
->new_fdt
= map_sysmem(gd
->start_addr_sp
, gd
->fdt_size
);
527 debug("Reserving %lu Bytes for FDT at: %08lx\n",
528 gd
->fdt_size
, gd
->start_addr_sp
);
535 static int reserve_bootstage(void)
537 #ifdef CONFIG_BOOTSTAGE
538 int size
= bootstage_get_size();
540 gd
->start_addr_sp
-= size
;
541 gd
->new_bootstage
= map_sysmem(gd
->start_addr_sp
, size
);
542 debug("Reserving %#x Bytes for bootstage at: %08lx\n", size
,
549 __weak
int arch_reserve_stacks(void)
554 static int reserve_stacks(void)
556 /* make stack pointer 16-byte aligned */
557 gd
->start_addr_sp
-= 16;
558 gd
->start_addr_sp
&= ~0xf;
561 * let the architecture-specific code tailor gd->start_addr_sp and
564 return arch_reserve_stacks();
567 static int reserve_bloblist(void)
569 #ifdef CONFIG_BLOBLIST
570 gd
->start_addr_sp
-= CONFIG_BLOBLIST_SIZE
;
571 gd
->new_bloblist
= map_sysmem(gd
->start_addr_sp
, CONFIG_BLOBLIST_SIZE
);
577 static int display_new_sp(void)
579 debug("New Stack Pointer is: %08lx\n", gd
->start_addr_sp
);
584 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
586 static int setup_board_part1(void)
591 * Save local variables to board info struct
593 bd
->bi_memstart
= CONFIG_SYS_SDRAM_BASE
; /* start of memory */
594 bd
->bi_memsize
= gd
->ram_size
; /* size in bytes */
596 #ifdef CONFIG_SYS_SRAM_BASE
597 bd
->bi_sramstart
= CONFIG_SYS_SRAM_BASE
; /* start of SRAM */
598 bd
->bi_sramsize
= CONFIG_SYS_SRAM_SIZE
; /* size of SRAM */
601 #if defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
602 bd
->bi_immr_base
= CONFIG_SYS_IMMR
; /* base of IMMR register */
604 #if defined(CONFIG_M68K)
605 bd
->bi_mbar_base
= CONFIG_SYS_MBAR
; /* base of internal registers */
607 #if defined(CONFIG_MPC83xx)
608 bd
->bi_immrbar
= CONFIG_SYS_IMMR
;
615 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
616 static int setup_board_part2(void)
620 bd
->bi_intfreq
= gd
->cpu_clk
; /* Internal Freq, in Hz */
621 bd
->bi_busfreq
= gd
->bus_clk
; /* Bus Freq, in Hz */
622 #if defined(CONFIG_CPM2)
623 bd
->bi_cpmfreq
= gd
->arch
.cpm_clk
;
624 bd
->bi_brgfreq
= gd
->arch
.brg_clk
;
625 bd
->bi_sccfreq
= gd
->arch
.scc_clk
;
626 bd
->bi_vco
= gd
->arch
.vco_out
;
627 #endif /* CONFIG_CPM2 */
628 #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
629 bd
->bi_pcifreq
= gd
->pci_clk
;
631 #if defined(CONFIG_EXTRA_CLOCK)
632 bd
->bi_inpfreq
= gd
->arch
.inp_clk
; /* input Freq in Hz */
633 bd
->bi_vcofreq
= gd
->arch
.vco_clk
; /* vco Freq in Hz */
634 bd
->bi_flbfreq
= gd
->arch
.flb_clk
; /* flexbus Freq in Hz */
642 static int init_post(void)
644 post_bootmode_init();
645 post_run(NULL
, POST_ROM
| post_bootmode_get(0));
651 static int reloc_fdt(void)
653 #ifndef CONFIG_OF_EMBED
654 if (gd
->flags
& GD_FLG_SKIP_RELOC
)
657 memcpy(gd
->new_fdt
, gd
->fdt_blob
, gd
->fdt_size
);
658 gd
->fdt_blob
= gd
->new_fdt
;
665 static int reloc_bootstage(void)
667 #ifdef CONFIG_BOOTSTAGE
668 if (gd
->flags
& GD_FLG_SKIP_RELOC
)
670 if (gd
->new_bootstage
) {
671 int size
= bootstage_get_size();
673 debug("Copying bootstage from %p to %p, size %x\n",
674 gd
->bootstage
, gd
->new_bootstage
, size
);
675 memcpy(gd
->new_bootstage
, gd
->bootstage
, size
);
676 gd
->bootstage
= gd
->new_bootstage
;
683 static int reloc_bloblist(void)
685 #ifdef CONFIG_BLOBLIST
686 if (gd
->flags
& GD_FLG_SKIP_RELOC
)
688 if (gd
->new_bloblist
) {
689 int size
= CONFIG_BLOBLIST_SIZE
;
691 debug("Copying bloblist from %p to %p, size %x\n",
692 gd
->bloblist
, gd
->new_bloblist
, size
);
693 memcpy(gd
->new_bloblist
, gd
->bloblist
, size
);
694 gd
->bloblist
= gd
->new_bloblist
;
701 static int setup_reloc(void)
703 if (gd
->flags
& GD_FLG_SKIP_RELOC
) {
704 debug("Skipping relocation due to flag\n");
708 #ifdef CONFIG_SYS_TEXT_BASE
710 gd
->reloc_off
= gd
->relocaddr
- (unsigned long)__image_copy_start
;
711 #elif defined(CONFIG_M68K)
713 * On all ColdFire arch cpu, monitor code starts always
714 * just after the default vector table location, so at 0x400
716 gd
->reloc_off
= gd
->relocaddr
- (CONFIG_SYS_TEXT_BASE
+ 0x400);
717 #elif !defined(CONFIG_SANDBOX)
718 gd
->reloc_off
= gd
->relocaddr
- CONFIG_SYS_TEXT_BASE
;
721 memcpy(gd
->new_gd
, (char *)gd
, sizeof(gd_t
));
723 debug("Relocation Offset is: %08lx\n", gd
->reloc_off
);
724 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
725 gd
->relocaddr
, (ulong
)map_to_sysmem(gd
->new_gd
),
731 #ifdef CONFIG_OF_BOARD_FIXUP
732 static int fix_fdt(void)
734 return board_fix_fdt((void *)gd
->fdt_blob
);
738 /* ARM calls relocate_code from its crt0.S */
739 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
740 !CONFIG_IS_ENABLED(X86_64)
742 static int jump_to_copy(void)
744 if (gd
->flags
& GD_FLG_SKIP_RELOC
)
747 * x86 is special, but in a nice way. It uses a trampoline which
748 * enables the dcache if possible.
750 * For now, other archs use relocate_code(), which is implemented
751 * similarly for all archs. When we do generic relocation, hopefully
752 * we can make all archs enable the dcache prior to relocation.
754 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
756 * SDRAM and console are now initialised. The final stack can now
757 * be setup in SDRAM. Code execution will continue in Flash, but
758 * with the stack in SDRAM and Global Data in temporary memory
761 arch_setup_gd(gd
->new_gd
);
762 board_init_f_r_trampoline(gd
->start_addr_sp
);
764 relocate_code(gd
->start_addr_sp
, gd
->new_gd
, gd
->relocaddr
);
771 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
772 static int initf_bootstage(void)
774 bool from_spl
= IS_ENABLED(CONFIG_SPL_BOOTSTAGE
) &&
775 IS_ENABLED(CONFIG_BOOTSTAGE_STASH
);
778 ret
= bootstage_init(!from_spl
);
782 const void *stash
= map_sysmem(CONFIG_BOOTSTAGE_STASH_ADDR
,
783 CONFIG_BOOTSTAGE_STASH_SIZE
);
785 ret
= bootstage_unstash(stash
, CONFIG_BOOTSTAGE_STASH_SIZE
);
786 if (ret
&& ret
!= -ENOENT
) {
787 debug("Failed to unstash bootstage: err=%d\n", ret
);
792 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F
, "board_init_f");
797 static int initf_console_record(void)
799 #if defined(CONFIG_CONSOLE_RECORD) && CONFIG_VAL(SYS_MALLOC_F_LEN)
800 return console_record_init();
806 static int initf_dm(void)
808 #if defined(CONFIG_DM) && CONFIG_VAL(SYS_MALLOC_F_LEN)
811 bootstage_start(BOOTSTATE_ID_ACCUM_DM_F
, "dm_f");
812 ret
= dm_init_and_scan(true);
813 bootstage_accum(BOOTSTATE_ID_ACCUM_DM_F
);
817 #ifdef CONFIG_TIMER_EARLY
818 ret
= dm_timer_init();
826 /* Architecture-specific memory reservation */
827 __weak
int reserve_arch(void)
832 __weak
int arch_cpu_init_dm(void)
837 static const init_fnc_t init_sequence_f
[] = {
839 #ifdef CONFIG_OF_CONTROL
847 initf_bootstage
, /* uses its own timer, so does not need DM */
848 #ifdef CONFIG_BLOBLIST
852 initf_console_record
,
853 #if defined(CONFIG_HAVE_FSP)
856 arch_cpu_init
, /* basic arch cpu dependent setup */
857 mach_cpu_init
, /* SoC/machine dependent CPU setup */
860 #if defined(CONFIG_BOARD_EARLY_INIT_F)
863 #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
864 /* get CPU and bus clocks according to the environment variable */
865 get_clocks
, /* get CPU and bus clocks (etc.) */
867 #if !defined(CONFIG_M68K)
868 timer_init
, /* initialize timer */
870 #if defined(CONFIG_BOARD_POSTCLK_INIT)
873 env_init
, /* initialize environment */
874 init_baud_rate
, /* initialze baudrate settings */
875 serial_init
, /* serial communications setup */
876 console_init_f
, /* stage 1 init of console */
877 display_options
, /* say that we are here */
878 display_text_info
, /* show debugging info if required */
879 #if defined(CONFIG_PPC) || defined(CONFIG_SH) || defined(CONFIG_X86)
882 #if defined(CONFIG_SYSRESET)
885 #if defined(CONFIG_DISPLAY_CPUINFO)
886 print_cpuinfo
, /* display cpu info (and speed) */
888 #if defined(CONFIG_DTB_RESELECT)
891 #if defined(CONFIG_DISPLAY_BOARDINFO)
894 INIT_FUNC_WATCHDOG_INIT
895 #if defined(CONFIG_MISC_INIT_F)
898 INIT_FUNC_WATCHDOG_RESET
899 #if defined(CONFIG_SYS_I2C)
902 #if defined(CONFIG_VID) && !defined(CONFIG_SPL)
906 dram_init
, /* configure available RAM banks */
910 INIT_FUNC_WATCHDOG_RESET
911 #if defined(CONFIG_SYS_DRAM_TEST)
913 #endif /* CONFIG_SYS_DRAM_TEST */
914 INIT_FUNC_WATCHDOG_RESET
919 INIT_FUNC_WATCHDOG_RESET
921 * Now that we have DRAM mapped and working, we can
922 * relocate the code and continue running from DRAM.
924 * Reserve memory at end of RAM for (top down in that order):
925 * - area that won't get touched by U-Boot and Linux (optional)
926 * - kernel log buffer
930 * - board info struct
954 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
958 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
959 INIT_FUNC_WATCHDOG_RESET
963 #ifdef CONFIG_OF_BOARD_FIXUP
966 INIT_FUNC_WATCHDOG_RESET
971 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
976 #if defined(CONFIG_XTENSA)
979 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
980 !CONFIG_IS_ENABLED(X86_64)
986 void board_init_f(ulong boot_flags
)
988 gd
->flags
= boot_flags
;
989 gd
->have_console
= 0;
991 if (initcall_run_list(init_sequence_f
))
994 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
995 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) && \
997 /* NOTREACHED - jump_to_copy() does not return */
1002 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
1004 * For now this code is only used on x86.
1006 * init_sequence_f_r is the list of init functions which are run when
1007 * U-Boot is executing from Flash with a semi-limited 'C' environment.
1008 * The following limitations must be considered when implementing an
1010 * - 'static' variables are read-only
1011 * - Global Data (gd->xxx) is read/write
1013 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1014 * supported). It _should_, if possible, copy global data to RAM and
1015 * initialise the CPU caches (to speed up the relocation process)
1017 * NOTE: At present only x86 uses this route, but it is intended that
1018 * all archs will move to this when generic relocation is implemented.
1020 static const init_fnc_t init_sequence_f_r
[] = {
1021 #if !CONFIG_IS_ENABLED(X86_64)
1028 void board_init_f_r(void)
1030 if (initcall_run_list(init_sequence_f_r
))
1034 * The pre-relocation drivers may be using memory that has now gone
1035 * away. Mark serial as unavailable - this will fall back to the debug
1036 * UART if available.
1038 * Do the same with log drivers since the memory may not be available.
1040 gd
->flags
&= ~(GD_FLG_SERIAL_READY
| GD_FLG_LOG_READY
);
1046 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1047 * Transfer execution from Flash to RAM by calculating the address
1048 * of the in-RAM copy of board_init_r() and calling it
1050 (board_init_r
+ gd
->reloc_off
)((gd_t
*)gd
, gd
->relocaddr
);
1052 /* NOTREACHED - board_init_r() does not return */
1055 #endif /* CONFIG_X86 */