drivers/arm/cci/cci.c

   1 /*
   2  * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
   3  *
   4  * SPDX-License-Identifier: BSD-3-Clause
   5  */
   6
   7 #include <assert.h>
   8 #include <stdbool.h>
   9 #include <stdint.h>
  10
  11 #include <arch.h>
  12 #include <arch_helpers.h>
  13 #include <common/debug.h>
  14 #include <drivers/arm/cci.h>
  15 #include <lib/mmio.h>
  16
  17 #define MAKE_CCI_PART_NUMBER(hi, lo)    (((hi) << 8) | (lo))
  18 #define CCI_PART_LO_MASK                U(0xff)
  19 #define CCI_PART_HI_MASK                U(0xf)
  20
  21 /* CCI part number codes read from Peripheral ID registers 0 and 1 */
  22 #define CCI400_PART_NUM         0x420
  23 #define CCI500_PART_NUM         0x422
  24 #define CCI550_PART_NUM         0x423
  25
  26 #define CCI400_SLAVE_PORTS      5
  27 #define CCI500_SLAVE_PORTS      7
  28 #define CCI550_SLAVE_PORTS      7
  29
  30 static uintptr_t cci_base;
  31 static const int *cci_slave_if_map;
  32
  33 #if ENABLE_ASSERTIONS
  34 static unsigned int max_master_id;
  35 static int cci_num_slave_ports;
  36
  37 static bool validate_cci_map(const int *map)
  38 {
  39         unsigned int valid_cci_map = 0U;
  40         int slave_if_id;
  41         unsigned int i;
  42
  43         /* Validate the map */
  44         for (i = 0U; i <= max_master_id; i++) {
  45                 slave_if_id = map[i];
  46
  47                 if (slave_if_id < 0)
  48                         continue;
  49
  50                 if (slave_if_id >= cci_num_slave_ports) {
  51                         ERROR("Slave interface ID is invalid\n");
  52                         return false;
  53                 }
  54
  55                 if ((valid_cci_map & (1U << slave_if_id)) != 0U) {
  56                         ERROR("Multiple masters are assigned same slave interface ID\n");
  57                         return false;
  58                 }
  59                 valid_cci_map |= 1U << slave_if_id;
  60         }
  61
  62         if (valid_cci_map == 0U) {
  63                 ERROR("No master is assigned a valid slave interface\n");
  64                 return false;
  65         }
  66
  67         return true;
  68 }
  69
  70 /*
  71  * Read CCI part number from Peripheral ID registers
  72  */
  73 static unsigned int read_cci_part_number(uintptr_t base)
  74 {
  75         unsigned int part_lo, part_hi;
  76
  77         part_lo = mmio_read_32(base + PERIPHERAL_ID0) & CCI_PART_LO_MASK;
  78         part_hi = mmio_read_32(base + PERIPHERAL_ID1) & CCI_PART_HI_MASK;
  79
  80         return MAKE_CCI_PART_NUMBER(part_hi, part_lo);
  81 }
  82
  83 /*
  84  * Identify a CCI device, and return the number of slaves. Return -1 for an
  85  * unidentified device.
  86  */
  87 static int get_slave_ports(unsigned int part_num)
  88 {
  89         int num_slave_ports = -1;
  90
  91         switch (part_num) {
  92
  93         case CCI400_PART_NUM:
  94                 num_slave_ports = CCI400_SLAVE_PORTS;
  95                 break;
  96         case CCI500_PART_NUM:
  97                 num_slave_ports = CCI500_SLAVE_PORTS;
  98                 break;
  99         case CCI550_PART_NUM:
 100                 num_slave_ports = CCI550_SLAVE_PORTS;
 101                 break;
 102         default:
 103                 /* Do nothing in default case */
 104                 break;
 105         }
 106
 107         return num_slave_ports;
 108 }
 109 #endif /* ENABLE_ASSERTIONS */
 110
 111 void __init cci_init(uintptr_t base, const int *map,
 112                                 unsigned int num_cci_masters)
 113 {
 114         assert(map != NULL);
 115         assert(base != 0U);
 116
 117         cci_base = base;
 118         cci_slave_if_map = map;
 119
 120 #if ENABLE_ASSERTIONS
 121         /*
 122          * Master Id's are assigned from zero, So in an array of size n
 123          * the max master id is (n - 1).
 124          */
 125         max_master_id = num_cci_masters - 1U;
 126         cci_num_slave_ports = get_slave_ports(read_cci_part_number(base));
 127 #endif
 128         assert(cci_num_slave_ports >= 0);
 129
 130         assert(validate_cci_map(map));
 131 }
 132
 133 void cci_enable_snoop_dvm_reqs(unsigned int master_id)
 134 {
 135         int slave_if_id = cci_slave_if_map[master_id];
 136
 137         assert(master_id <= max_master_id);
 138         assert((slave_if_id < cci_num_slave_ports) && (slave_if_id >= 0));
 139         assert(cci_base != 0U);
 140
 141         /*
 142          * Enable Snoops and DVM messages, no need for Read/Modify/Write as
 143          * rest of bits are write ignore
 144          */
 145         mmio_write_32(cci_base +
 146                       SLAVE_IFACE_OFFSET(slave_if_id) + SNOOP_CTRL_REG,
 147                       DVM_EN_BIT | SNOOP_EN_BIT);
 148
 149         /*
 150          * Wait for the completion of the write to the Snoop Control Register
 151          * before testing the change_pending bit
 152          */
 153         dsbish();
 154
 155         /* Wait for the dust to settle down */
 156         while ((mmio_read_32(cci_base + STATUS_REG) & CHANGE_PENDING_BIT) != 0U)
 157                 ;
 158 }
 159
 160 void cci_disable_snoop_dvm_reqs(unsigned int master_id)
 161 {
 162         int slave_if_id = cci_slave_if_map[master_id];
 163
 164         assert(master_id <= max_master_id);
 165         assert((slave_if_id < cci_num_slave_ports) && (slave_if_id >= 0));
 166         assert(cci_base != 0U);
 167
 168         /*
 169          * Disable Snoops and DVM messages, no need for Read/Modify/Write as
 170          * rest of bits are write ignore.
 171          */
 172         mmio_write_32(cci_base +
 173                       SLAVE_IFACE_OFFSET(slave_if_id) + SNOOP_CTRL_REG,
 174                       ~(DVM_EN_BIT | SNOOP_EN_BIT));
 175
 176         /*
 177          * Wait for the completion of the write to the Snoop Control Register
 178          * before testing the change_pending bit
 179          */
 180         dsbish();
 181
 182         /* Wait for the dust to settle down */
 183         while ((mmio_read_32(cci_base + STATUS_REG) & CHANGE_PENDING_BIT) != 0U)
 184                 ;
 185 }
 186