2 * Copyright (C) 2018 Marvell International Ltd.
3 * Copyright (C) 2018 Icenowy Zheng <icenowy@aosc.io>
5 * SPDX-License-Identifier: BSD-3-Clause
6 * https://spdx.org/licenses
10 * This driver is for Mentor Graphics Inventra MI2CV IP core, which is used
11 * for Marvell and Allwinner SoCs in ATF.
15 #include <delay_timer.h>
17 #include <mentor/mi2cv.h>
18 #include <mentor_i2c_plat.h>
21 #if LOG_LEVEL >= LOG_LEVEL_VERBOSE
25 #define I2C_TIMEOUT_VALUE 0x500
26 #define I2C_MAX_RETRY_CNT 1000
27 #define I2C_CMD_WRITE 0x0
28 #define I2C_CMD_READ 0x1
30 #define I2C_DATA_ADDR_7BIT_OFFS 0x1
31 #define I2C_DATA_ADDR_7BIT_MASK (0xFF << I2C_DATA_ADDR_7BIT_OFFS)
33 #define I2C_CONTROL_ACK 0x00000004
34 #define I2C_CONTROL_IFLG 0x00000008
35 #define I2C_CONTROL_STOP 0x00000010
36 #define I2C_CONTROL_START 0x00000020
37 #define I2C_CONTROL_TWSIEN 0x00000040
38 #define I2C_CONTROL_INTEN 0x00000080
40 #define I2C_STATUS_START 0x08
41 #define I2C_STATUS_REPEATED_START 0x10
42 #define I2C_STATUS_ADDR_W_ACK 0x18
43 #define I2C_STATUS_DATA_W_ACK 0x28
44 #define I2C_STATUS_LOST_ARB_DATA_ADDR_TRANSFER 0x38
45 #define I2C_STATUS_ADDR_R_ACK 0x40
46 #define I2C_STATUS_DATA_R_ACK 0x50
47 #define I2C_STATUS_DATA_R_NAK 0x58
48 #define I2C_STATUS_LOST_ARB_GENERAL_CALL 0x78
49 #define I2C_STATUS_IDLE 0xF8
51 #define I2C_UNSTUCK_TRIGGER 0x1
52 #define I2C_UNSTUCK_ONGOING 0x2
53 #define I2C_UNSTUCK_ERROR 0x4
55 static struct mentor_i2c_regs
*base
;
57 static int mentor_i2c_lost_arbitration(uint32_t *status
)
59 *status
= mmio_read_32((uintptr_t)&base
->status
);
60 if ((*status
== I2C_STATUS_LOST_ARB_DATA_ADDR_TRANSFER
) ||
61 (*status
== I2C_STATUS_LOST_ARB_GENERAL_CALL
))
67 static void mentor_i2c_interrupt_clear(void)
71 reg
= mmio_read_32((uintptr_t)&base
->control
);
72 #ifndef I2C_INTERRUPT_CLEAR_INVERTED
73 reg
&= ~(I2C_CONTROL_IFLG
);
75 reg
|= I2C_CONTROL_IFLG
;
77 mmio_write_32((uintptr_t)&base
->control
, reg
);
78 /* Wait for 1 us for the clear to take effect */
82 static int mentor_i2c_interrupt_get(void)
86 /* get the interrupt flag bit */
87 reg
= mmio_read_32((uintptr_t)&base
->control
);
88 reg
&= I2C_CONTROL_IFLG
;
89 return reg
&& I2C_CONTROL_IFLG
;
92 static int mentor_i2c_wait_interrupt(void)
96 while (!mentor_i2c_interrupt_get() && (timeout
++ < I2C_TIMEOUT_VALUE
))
98 if (timeout
>= I2C_TIMEOUT_VALUE
)
104 static int mentor_i2c_start_bit_set(void)
109 if (mentor_i2c_interrupt_get())
113 mmio_write_32((uintptr_t)&base
->control
,
114 mmio_read_32((uintptr_t)&base
->control
) |
117 /* in case that the int flag was set before i.e. repeated start bit */
119 VERBOSE("%s: repeated start Bit\n", __func__
);
120 mentor_i2c_interrupt_clear();
123 if (mentor_i2c_wait_interrupt()) {
124 ERROR("Start clear bit timeout\n");
128 /* check that start bit went down */
129 if ((mmio_read_32((uintptr_t)&base
->control
) &
130 I2C_CONTROL_START
) != 0) {
131 ERROR("Start bit didn't went down\n");
135 /* check the status */
136 if (mentor_i2c_lost_arbitration(&status
)) {
137 ERROR("%s - %d: Lost arbitration, got status %x\n",
138 __func__
, __LINE__
, status
);
141 if ((status
!= I2C_STATUS_START
) &&
142 (status
!= I2C_STATUS_REPEATED_START
)) {
143 ERROR("Got status %x after enable start bit.\n", status
);
150 static int mentor_i2c_stop_bit_set(void)
155 /* Generate stop bit */
156 mmio_write_32((uintptr_t)&base
->control
,
157 mmio_read_32((uintptr_t)&base
->control
) |
159 mentor_i2c_interrupt_clear();
162 /* Read control register, check the control stop bit */
163 while ((mmio_read_32((uintptr_t)&base
->control
) & I2C_CONTROL_STOP
) &&
164 (timeout
++ < I2C_TIMEOUT_VALUE
))
166 if (timeout
>= I2C_TIMEOUT_VALUE
) {
167 ERROR("Stop bit didn't went down\n");
171 /* check that stop bit went down */
172 if ((mmio_read_32((uintptr_t)&base
->control
) & I2C_CONTROL_STOP
) != 0) {
173 ERROR("Stop bit didn't went down\n");
177 /* check the status */
178 if (mentor_i2c_lost_arbitration(&status
)) {
179 ERROR("%s - %d: Lost arbitration, got status %x\n",
180 __func__
, __LINE__
, status
);
183 if (status
!= I2C_STATUS_IDLE
) {
184 ERROR("Got status %x after enable stop bit.\n", status
);
191 static int mentor_i2c_address_set(uint8_t chain
, int command
)
193 uint32_t reg
, status
;
195 reg
= (chain
<< I2C_DATA_ADDR_7BIT_OFFS
) & I2C_DATA_ADDR_7BIT_MASK
;
197 mmio_write_32((uintptr_t)&base
->data
, reg
);
200 mentor_i2c_interrupt_clear();
202 if (mentor_i2c_wait_interrupt()) {
203 ERROR("Start clear bit timeout\n");
207 /* check the status */
208 if (mentor_i2c_lost_arbitration(&status
)) {
209 ERROR("%s - %d: Lost arbitration, got status %x\n",
210 __func__
, __LINE__
, status
);
213 if (((status
!= I2C_STATUS_ADDR_R_ACK
) && (command
== I2C_CMD_READ
)) ||
214 ((status
!= I2C_STATUS_ADDR_W_ACK
) && (command
== I2C_CMD_WRITE
))) {
215 /* only in debug, since in boot we try to read the SPD
216 * of both DRAM, and we don't want error messages in cas
217 * DIMM doesn't exist.
219 INFO("%s: ERROR - status %x addr in %s mode.\n", __func__
,
220 status
, (command
== I2C_CMD_WRITE
) ? "Write" : "Read");
228 * The I2C module contains a clock divider to generate the SCL clock.
229 * This function calculates and sets the <N> and <M> fields in the I2C Baud
230 * Rate Register (t=01) to obtain given 'requested_speed'.
231 * The requested_speed will be equal to:
232 * CONFIG_SYS_TCLK / (10 * (M + 1) * (2 << N))
233 * Where M is the value represented by bits[6:3] and N is the value represented
234 * by bits[2:0] of "I2C Baud Rate Register".
235 * Therefore max M which can be set is 16 (2^4) and max N is 8 (2^3). So the
236 * lowest possible baudrate is:
237 * CONFIG_SYS_TCLK/(10 * (16 +1) * (2 << 8), which equals to:
238 * CONFIG_SYS_TCLK/87040. Assuming that CONFIG_SYS_TCLK=250MHz, the lowest
239 * possible frequency is ~2,872KHz.
241 static unsigned int mentor_i2c_bus_speed_set(unsigned int requested_speed
)
243 unsigned int n
, m
, freq
, margin
, min_margin
= 0xffffffff;
244 unsigned int actual_n
= 0, actual_m
= 0;
247 /* Calculate N and M for the TWSI clock baud rate */
248 for (n
= 0; n
< 8; n
++) {
249 for (m
= 0; m
< 16; m
++) {
250 freq
= CONFIG_SYS_TCLK
/ (10 * (m
+ 1) * (2 << n
));
251 val
= requested_speed
- freq
;
252 margin
= (val
> 0) ? val
: -val
;
254 if ((freq
<= requested_speed
) &&
255 (margin
< min_margin
)) {
262 VERBOSE("%s: actual_n = %u, actual_m = %u\n",
263 __func__
, actual_n
, actual_m
);
264 /* Set the baud rate */
265 mmio_write_32((uintptr_t)&base
->baudrate
, (actual_m
<< 3) | actual_n
);
271 static int mentor_i2c_probe(uint8_t chip
)
275 ret
= mentor_i2c_start_bit_set();
277 mentor_i2c_stop_bit_set();
278 ERROR("%s - %d: %s", __func__
, __LINE__
,
279 "mentor_i2c_start_bit_set failed\n");
283 ret
= mentor_i2c_address_set(chip
, I2C_CMD_WRITE
);
285 mentor_i2c_stop_bit_set();
286 ERROR("%s - %d: %s", __func__
, __LINE__
,
287 "mentor_i2c_address_set failed\n");
291 mentor_i2c_stop_bit_set();
293 VERBOSE("%s: successful I2C probe\n", __func__
);
299 /* regular i2c transaction */
300 static int mentor_i2c_data_receive(uint8_t *p_block
, uint32_t block_size
)
302 uint32_t reg
, status
, block_size_read
= block_size
;
304 /* Wait for cause interrupt */
305 if (mentor_i2c_wait_interrupt()) {
306 ERROR("Start clear bit timeout\n");
309 while (block_size_read
) {
310 if (block_size_read
== 1) {
311 reg
= mmio_read_32((uintptr_t)&base
->control
);
312 reg
&= ~(I2C_CONTROL_ACK
);
313 mmio_write_32((uintptr_t)&base
->control
, reg
);
315 mentor_i2c_interrupt_clear();
317 if (mentor_i2c_wait_interrupt()) {
318 ERROR("Start clear bit timeout\n");
321 /* check the status */
322 if (mentor_i2c_lost_arbitration(&status
)) {
323 ERROR("%s - %d: Lost arbitration, got status %x\n",
324 __func__
, __LINE__
, status
);
327 if ((status
!= I2C_STATUS_DATA_R_ACK
) &&
328 (block_size_read
!= 1)) {
329 ERROR("Status %x in read transaction\n", status
);
332 if ((status
!= I2C_STATUS_DATA_R_NAK
) &&
333 (block_size_read
== 1)) {
334 ERROR("Status %x in Rd Terminate\n", status
);
339 *p_block
= (uint8_t) mmio_read_32((uintptr_t)&base
->data
);
340 VERBOSE("%s: place %d read %x\n", __func__
,
341 block_size
- block_size_read
, *p_block
);
349 static int mentor_i2c_data_transmit(uint8_t *p_block
, uint32_t block_size
)
351 uint32_t status
, block_size_write
= block_size
;
353 if (mentor_i2c_wait_interrupt()) {
354 ERROR("Start clear bit timeout\n");
358 while (block_size_write
) {
360 mmio_write_32((uintptr_t)&base
->data
, (uint32_t) *p_block
);
361 VERBOSE("%s: index = %d, data = %x\n", __func__
,
362 block_size
- block_size_write
, *p_block
);
366 mentor_i2c_interrupt_clear();
368 if (mentor_i2c_wait_interrupt()) {
369 ERROR("Start clear bit timeout\n");
373 /* check the status */
374 if (mentor_i2c_lost_arbitration(&status
)) {
375 ERROR("%s - %d: Lost arbitration, got status %x\n",
376 __func__
, __LINE__
, status
);
379 if (status
!= I2C_STATUS_DATA_W_ACK
) {
380 ERROR("Status %x in write transaction\n", status
);
388 static int mentor_i2c_target_offset_set(uint8_t chip
, uint32_t addr
, int alen
)
390 uint8_t off_block
[2];
393 if (alen
== 2) { /* 2-byte addresses support */
394 off_block
[0] = (addr
>> 8) & 0xff;
395 off_block
[1] = addr
& 0xff;
397 } else { /* 1-byte addresses support */
398 off_block
[0] = addr
& 0xff;
401 VERBOSE("%s: off_size = %x addr1 = %x addr2 = %x\n", __func__
,
402 off_size
, off_block
[0], off_block
[1]);
403 return mentor_i2c_data_transmit(off_block
, off_size
);
406 #ifdef I2C_CAN_UNSTUCK
407 static int mentor_i2c_unstuck(int ret
)
411 if (ret
!= -ETIMEDOUT
)
413 VERBOSE("Trying to \"unstuck i2c\"... ");
415 mmio_write_32((uintptr_t)&base
->unstuck
, I2C_UNSTUCK_TRIGGER
);
417 v
= mmio_read_32((uintptr_t)&base
->unstuck
);
418 } while (v
& I2C_UNSTUCK_ONGOING
);
420 if (v
& I2C_UNSTUCK_ERROR
) {
421 VERBOSE("failed - soft reset i2c\n");
431 static int mentor_i2c_unstuck(int ret
)
433 VERBOSE("Cannot \"unstuck i2c\" - soft reset i2c\n");
441 void i2c_init(void *i2c_base
)
443 /* For I2C speed and slave address, now we do not set them since
444 * we just provide the working speed and slave address otherwhere
447 base
= (struct mentor_i2c_regs
*)i2c_base
;
449 /* Reset the I2C logic */
450 mmio_write_32((uintptr_t)&base
->soft_reset
, 0);
454 mentor_i2c_bus_speed_set(CONFIG_SYS_I2C_SPEED
);
456 /* Enable the I2C and slave */
457 mmio_write_32((uintptr_t)&base
->control
,
458 I2C_CONTROL_TWSIEN
| I2C_CONTROL_ACK
);
460 /* set the I2C slave address */
461 mmio_write_32((uintptr_t)&base
->xtnd_slave_addr
, 0);
462 mmio_write_32((uintptr_t)&base
->slave_address
, CONFIG_SYS_I2C_SLAVE
);
464 /* unmask I2C interrupt */
465 mmio_write_32((uintptr_t)&base
->control
,
466 mmio_read_32((uintptr_t)&base
->control
) |
473 * i2c_read: - Read multiple bytes from an i2c device
475 * The higher level routines take into account that this function is only
476 * called with len < page length of the device (see configuration file)
478 * @chip: address of the chip which is to be read
479 * @addr: i2c data address within the chip
480 * @alen: length of the i2c data address (1..2 bytes)
481 * @buffer: where to write the data
482 * @len: how much byte do we want to read
483 * @return: 0 in case of success
485 int i2c_read(uint8_t chip
, uint32_t addr
, int alen
, uint8_t *buffer
, int len
)
488 uint32_t counter
= 0;
491 mentor_i2c_probe(chip
);
495 if (ret
!= -EAGAIN
&& ret
) {
496 ERROR("i2c transaction failed, after %d retries\n",
498 mentor_i2c_stop_bit_set();
502 /* wait for 1 us for the interrupt clear to take effect */
507 ret
= mentor_i2c_start_bit_set();
509 ret
= mentor_i2c_unstuck(ret
);
513 /* if EEPROM device */
515 ret
= mentor_i2c_address_set(chip
, I2C_CMD_WRITE
);
519 ret
= mentor_i2c_target_offset_set(chip
, addr
, alen
);
522 ret
= mentor_i2c_start_bit_set();
527 ret
= mentor_i2c_address_set(chip
, I2C_CMD_READ
);
531 ret
= mentor_i2c_data_receive(buffer
, len
);
535 ret
= mentor_i2c_stop_bit_set();
536 } while ((ret
== -EAGAIN
) && (counter
< I2C_MAX_RETRY_CNT
));
538 if (counter
== I2C_MAX_RETRY_CNT
) {
539 ERROR("I2C transactions failed, got EAGAIN %d times\n",
543 mmio_write_32((uintptr_t)&base
->control
,
544 mmio_read_32((uintptr_t)&base
->control
) |
552 * i2c_write: - Write multiple bytes to an i2c device
554 * The higher level routines take into account that this function is only
555 * called with len < page length of the device (see configuration file)
557 * @chip: address of the chip which is to be written
558 * @addr: i2c data address within the chip
559 * @alen: length of the i2c data address (1..2 bytes)
560 * @buffer: where to find the data to be written
561 * @len: how much byte do we want to read
562 * @return: 0 in case of success
564 int i2c_write(uint8_t chip
, uint32_t addr
, int alen
, uint8_t *buffer
, int len
)
567 uint32_t counter
= 0;
570 if (ret
!= -EAGAIN
&& ret
) {
571 ERROR("i2c transaction failed\n");
572 mentor_i2c_stop_bit_set();
575 /* wait for 1 us for the interrupt clear to take effect */
580 ret
= mentor_i2c_start_bit_set();
582 ret
= mentor_i2c_unstuck(ret
);
586 ret
= mentor_i2c_address_set(chip
, I2C_CMD_WRITE
);
590 /* if EEPROM device */
592 ret
= mentor_i2c_target_offset_set(chip
, addr
, alen
);
597 ret
= mentor_i2c_data_transmit(buffer
, len
);
601 ret
= mentor_i2c_stop_bit_set();
602 } while ((ret
== -EAGAIN
) && (counter
< I2C_MAX_RETRY_CNT
));
604 if (counter
== I2C_MAX_RETRY_CNT
) {
605 ERROR("I2C transactions failed, got EAGAIN %d times\n",