2 * Copyright (c) 2015-2018, Renesas Electronics Corporation. All rights reserved.
4 * SPDX-License-Identifier: BSD-3-Clause
11 #include "emmc_config.h"
14 #include "emmc_registers.h"
16 #include "rcar_private.h"
18 st_mmc_base mmc_drv_obj
;
20 EMMC_ERROR_CODE
rcar_emmc_memcard_power(uint8_t mode
)
24 /* power on (Vcc&Vccq is always power on) */
25 mmc_drv_obj
.card_power_enable
= TRUE
;
27 /* power off (Vcc&Vccq is always power on) */
28 mmc_drv_obj
.card_power_enable
= FALSE
;
29 mmc_drv_obj
.mount
= FALSE
;
30 mmc_drv_obj
.selected
= FALSE
;
35 static __inline
void emmc_set_retry_count(uint32_t retry
)
37 mmc_drv_obj
.retries_after_fail
= retry
;
40 static __inline
void emmc_set_data_timeout(uint32_t data_timeout
)
42 mmc_drv_obj
.data_timeout
= data_timeout
;
45 static void emmc_memset(uint8_t *buff
, uint8_t data
, uint32_t cnt
)
57 static void emmc_driver_config(void)
59 emmc_set_retry_count(EMMC_RETRY_COUNT
);
60 emmc_set_data_timeout(EMMC_RW_DATA_TIMEOUT
);
63 static void emmc_drv_init(void)
65 emmc_memset((uint8_t *) (&mmc_drv_obj
), 0, sizeof(st_mmc_base
));
66 mmc_drv_obj
.card_present
= HAL_MEMCARD_CARD_IS_IN
;
67 mmc_drv_obj
.data_timeout
= EMMC_RW_DATA_TIMEOUT
;
68 mmc_drv_obj
.bus_width
= HAL_MEMCARD_DATA_WIDTH_1_BIT
;
71 static EMMC_ERROR_CODE
emmc_dev_finalize(void)
73 EMMC_ERROR_CODE result
;
77 * the power supply of eMMC device is always turning on.
78 * RST_n : Hi --> Low level.
80 result
= rcar_emmc_memcard_power(FALSE
);
82 /* host controller reset */
83 SETR_32(SD_INFO1
, 0x00000000U
); /* all interrupt clear */
84 SETR_32(SD_INFO2
, SD_INFO2_CLEAR
); /* all interrupt clear */
85 SETR_32(SD_INFO1_MASK
, 0x00000000U
); /* all interrupt disable */
86 SETR_32(SD_INFO2_MASK
, SD_INFO2_CLEAR
); /* all interrupt disable */
87 SETR_32(SD_CLK_CTRL
, 0x00000000U
); /* MMC clock stop */
89 dataL
= mmio_read_32(CPG_SMSTPCR3
);
90 if ((dataL
& CPG_MSTP_MMC
) == 0U) {
91 dataL
|= (CPG_MSTP_MMC
);
92 mmio_write_32(CPG_CPGWPR
, (~dataL
));
93 mmio_write_32(CPG_SMSTPCR3
, dataL
);
99 static EMMC_ERROR_CODE
emmc_dev_init(void)
101 /* Enable clock supply to eMMC. */
102 mstpcr_write(CPG_SMSTPCR3
, CPG_MSTPSR3
, CPG_MSTP_MMC
);
105 mmio_write_32(CPG_CPGWPR
, ~((uint32_t) (BIT9
| BIT0
))); /* SD phy 200MHz */
107 /* Stop SDnH clock & SDn=200MHz */
108 mmio_write_32(CPG_SDxCKCR
, (BIT9
| BIT0
));
110 /* MMCIF initialize */
111 SETR_32(SD_INFO1
, 0x00000000U
); /* all interrupt clear */
112 SETR_32(SD_INFO2
, SD_INFO2_CLEAR
); /* all interrupt clear */
113 SETR_32(SD_INFO1_MASK
, 0x00000000U
); /* all interrupt disable */
114 SETR_32(SD_INFO2_MASK
, SD_INFO2_CLEAR
); /* all interrupt disable */
116 SETR_32(HOST_MODE
, 0x00000000U
); /* SD_BUF access width = 64-bit */
117 SETR_32(SD_OPTION
, 0x0000C0EEU
); /* Bus width = 1bit, timeout=MAX */
118 SETR_32(SD_CLK_CTRL
, 0x00000000U
); /* Automatic Control=Disable, Clock Output=Disable */
123 static EMMC_ERROR_CODE
emmc_reset_controller(void)
125 EMMC_ERROR_CODE retult
;
127 /* initialize mmc driver */
131 retult
= emmc_dev_init();
132 if (EMMC_SUCCESS
!= retult
) {
136 mmc_drv_obj
.initialize
= TRUE
;
142 EMMC_ERROR_CODE
emmc_terminate(void)
144 EMMC_ERROR_CODE result
;
146 result
= emmc_dev_finalize();
148 emmc_memset((uint8_t *) (&mmc_drv_obj
), 0, sizeof(st_mmc_base
));
153 EMMC_ERROR_CODE
rcar_emmc_init(void)
155 EMMC_ERROR_CODE retult
;
157 retult
= emmc_reset_controller();
158 if (EMMC_SUCCESS
!= retult
) {
162 emmc_driver_config();