1 // SPDX-License-Identifier: GPL-2.0+
3 * drivers/usb/gadget/dwc2_udc_otg.c
4 * Designware DWC2 on-chip full/high speed USB OTG 2.0 device controllers
6 * Copyright (C) 2008 for Samsung Electronics
8 * BSP Support for Samsung's UDC driver
10 * git://git.kernel.org/pub/scm/linux/kernel/git/kki_ap/linux-2.6-samsung.git
12 * State machine bugfixes:
13 * Marek Szyprowski <m.szyprowski@samsung.com>
16 * Marek Szyprowski <m.szyprowski@samsung.com>
17 * Lukasz Majewski <l.majewski@samsumg.com>
23 #include <generic-phy.h>
27 #include <linux/errno.h>
28 #include <linux/list.h>
30 #include <linux/usb/ch9.h>
31 #include <linux/usb/otg.h>
32 #include <linux/usb/gadget.h>
34 #include <asm/byteorder.h>
35 #include <asm/unaligned.h>
38 #include <asm/mach-types.h>
40 #include <power/regulator.h>
42 #include "dwc2_udc_otg_regs.h"
43 #include "dwc2_udc_otg_priv.h"
45 /***********************************************************/
47 #define OTG_DMA_MODE 1
52 #define DEBUG_OUT_EP 0
55 #include <usb/dwc2_udc.h>
60 static char *state_names
[] = {
63 "DATA_STATE_NEED_ZLP",
64 "WAIT_FOR_OUT_STATUS",
67 "WAIT_FOR_OUT_COMPLETE",
68 "WAIT_FOR_IN_COMPLETE",
69 "WAIT_FOR_NULL_COMPLETE",
72 #define DRIVER_VERSION "15 March 2009"
74 struct dwc2_udc
*the_controller
;
76 static const char driver_name
[] = "dwc2-udc";
77 static const char ep0name
[] = "ep0-control";
80 static unsigned int ep0_fifo_size
= 64;
81 static unsigned int ep_fifo_size
= 512;
82 static unsigned int ep_fifo_size2
= 1024;
83 static int reset_available
= 1;
85 static struct usb_ctrlrequest
*usb_ctrl
;
86 static dma_addr_t usb_ctrl_dma_addr
;
91 static int dwc2_ep_enable(struct usb_ep
*ep
,
92 const struct usb_endpoint_descriptor
*);
93 static int dwc2_ep_disable(struct usb_ep
*ep
);
94 static struct usb_request
*dwc2_alloc_request(struct usb_ep
*ep
,
96 static void dwc2_free_request(struct usb_ep
*ep
, struct usb_request
*);
98 static int dwc2_queue(struct usb_ep
*ep
, struct usb_request
*, gfp_t gfp_flags
);
99 static int dwc2_dequeue(struct usb_ep
*ep
, struct usb_request
*);
100 static int dwc2_fifo_status(struct usb_ep
*ep
);
101 static void dwc2_fifo_flush(struct usb_ep
*ep
);
102 static void dwc2_ep0_read(struct dwc2_udc
*dev
);
103 static void dwc2_ep0_kick(struct dwc2_udc
*dev
, struct dwc2_ep
*ep
);
104 static void dwc2_handle_ep0(struct dwc2_udc
*dev
);
105 static int dwc2_ep0_write(struct dwc2_udc
*dev
);
106 static int write_fifo_ep0(struct dwc2_ep
*ep
, struct dwc2_request
*req
);
107 static void done(struct dwc2_ep
*ep
, struct dwc2_request
*req
, int status
);
108 static void stop_activity(struct dwc2_udc
*dev
,
109 struct usb_gadget_driver
*driver
);
110 static int udc_enable(struct dwc2_udc
*dev
);
111 static void udc_set_address(struct dwc2_udc
*dev
, unsigned char address
);
112 static void reconfig_usbd(struct dwc2_udc
*dev
);
113 static void set_max_pktsize(struct dwc2_udc
*dev
, enum usb_device_speed speed
);
114 static void nuke(struct dwc2_ep
*ep
, int status
);
115 static int dwc2_udc_set_halt(struct usb_ep
*_ep
, int value
);
116 static void dwc2_udc_set_nak(struct dwc2_ep
*ep
);
118 void set_udc_gadget_private_data(void *p
)
120 debug_cond(DEBUG_SETUP
!= 0,
121 "%s: the_controller: 0x%p, p: 0x%p\n", __func__
,
123 the_controller
->gadget
.dev
.device_data
= p
;
126 void *get_udc_gadget_private_data(struct usb_gadget
*gadget
)
128 return gadget
->dev
.device_data
;
131 static struct usb_ep_ops dwc2_ep_ops
= {
132 .enable
= dwc2_ep_enable
,
133 .disable
= dwc2_ep_disable
,
135 .alloc_request
= dwc2_alloc_request
,
136 .free_request
= dwc2_free_request
,
139 .dequeue
= dwc2_dequeue
,
141 .set_halt
= dwc2_udc_set_halt
,
142 .fifo_status
= dwc2_fifo_status
,
143 .fifo_flush
= dwc2_fifo_flush
,
146 #define create_proc_files() do {} while (0)
147 #define remove_proc_files() do {} while (0)
149 /***********************************************************/
151 struct dwc2_usbotg_reg
*reg
;
153 bool dfu_usb_get_reset(void)
155 return !!(readl(®
->gintsts
) & INT_RESET
);
158 __weak
void otg_phy_init(struct dwc2_udc
*dev
) {}
159 __weak
void otg_phy_off(struct dwc2_udc
*dev
) {}
161 /***********************************************************/
163 #include "dwc2_udc_otg_xfer_dma.c"
166 * udc_disable - disable USB device controller
168 static void udc_disable(struct dwc2_udc
*dev
)
170 debug_cond(DEBUG_SETUP
!= 0, "%s: %p\n", __func__
, dev
);
172 udc_set_address(dev
, 0);
174 dev
->ep0state
= WAIT_FOR_SETUP
;
175 dev
->gadget
.speed
= USB_SPEED_UNKNOWN
;
176 dev
->usb_address
= 0;
182 * udc_reinit - initialize software state
184 static void udc_reinit(struct dwc2_udc
*dev
)
188 debug_cond(DEBUG_SETUP
!= 0, "%s: %p\n", __func__
, dev
);
190 /* device/ep0 records init */
191 INIT_LIST_HEAD(&dev
->gadget
.ep_list
);
192 INIT_LIST_HEAD(&dev
->gadget
.ep0
->ep_list
);
193 dev
->ep0state
= WAIT_FOR_SETUP
;
195 /* basic endpoint records init */
196 for (i
= 0; i
< DWC2_MAX_ENDPOINTS
; i
++) {
197 struct dwc2_ep
*ep
= &dev
->ep
[i
];
200 list_add_tail(&ep
->ep
.ep_list
, &dev
->gadget
.ep_list
);
204 INIT_LIST_HEAD(&ep
->queue
);
208 /* the rest was statically initialized, and is read-only */
211 #define BYTES2MAXP(x) (x / 8)
212 #define MAXP2BYTES(x) (x * 8)
214 /* until it's enabled, this UDC should be completely invisible
217 static int udc_enable(struct dwc2_udc
*dev
)
219 debug_cond(DEBUG_SETUP
!= 0, "%s: %p\n", __func__
, dev
);
224 debug_cond(DEBUG_SETUP
!= 0,
225 "DWC2 USB 2.0 OTG Controller Core Initialized : 0x%x\n",
226 readl(®
->gintmsk
));
228 dev
->gadget
.speed
= USB_SPEED_UNKNOWN
;
233 #if !CONFIG_IS_ENABLED(DM_USB_GADGET)
235 Register entry point for the peripheral controller driver.
237 int usb_gadget_register_driver(struct usb_gadget_driver
*driver
)
239 struct dwc2_udc
*dev
= the_controller
;
241 unsigned long flags
= 0;
243 debug_cond(DEBUG_SETUP
!= 0, "%s: %s\n", __func__
, "no name");
246 || (driver
->speed
!= USB_SPEED_FULL
247 && driver
->speed
!= USB_SPEED_HIGH
)
248 || !driver
->bind
|| !driver
->disconnect
|| !driver
->setup
)
255 spin_lock_irqsave(&dev
->lock
, flags
);
256 /* first hook up the driver ... */
257 dev
->driver
= driver
;
258 spin_unlock_irqrestore(&dev
->lock
, flags
);
260 if (retval
) { /* TODO */
261 printf("target device_add failed, error %d\n", retval
);
265 retval
= driver
->bind(&dev
->gadget
);
267 debug_cond(DEBUG_SETUP
!= 0,
268 "%s: bind to driver --> error %d\n",
269 dev
->gadget
.name
, retval
);
276 debug_cond(DEBUG_SETUP
!= 0,
277 "Registered gadget driver %s\n", dev
->gadget
.name
);
284 * Unregister entry point for the peripheral controller driver.
286 int usb_gadget_unregister_driver(struct usb_gadget_driver
*driver
)
288 struct dwc2_udc
*dev
= the_controller
;
289 unsigned long flags
= 0;
293 if (!driver
|| driver
!= dev
->driver
)
296 spin_lock_irqsave(&dev
->lock
, flags
);
298 stop_activity(dev
, driver
);
299 spin_unlock_irqrestore(&dev
->lock
, flags
);
301 driver
->unbind(&dev
->gadget
);
303 disable_irq(IRQ_OTG
);
308 #else /* !CONFIG_IS_ENABLED(DM_USB_GADGET) */
310 static int dwc2_gadget_start(struct usb_gadget
*g
,
311 struct usb_gadget_driver
*driver
)
313 struct dwc2_udc
*dev
= the_controller
;
315 debug_cond(DEBUG_SETUP
!= 0, "%s: %s\n", __func__
, "no name");
318 (driver
->speed
!= USB_SPEED_FULL
&&
319 driver
->speed
!= USB_SPEED_HIGH
) ||
320 !driver
->bind
|| !driver
->disconnect
|| !driver
->setup
)
329 /* first hook up the driver ... */
330 dev
->driver
= driver
;
332 debug_cond(DEBUG_SETUP
!= 0,
333 "Registered gadget driver %s\n", dev
->gadget
.name
);
334 return udc_enable(dev
);
337 static int dwc2_gadget_stop(struct usb_gadget
*g
)
339 struct dwc2_udc
*dev
= the_controller
;
348 stop_activity(dev
, dev
->driver
);
355 #endif /* !CONFIG_IS_ENABLED(DM_USB_GADGET) */
358 * done - retire a request; caller blocked irqs
360 static void done(struct dwc2_ep
*ep
, struct dwc2_request
*req
, int status
)
362 unsigned int stopped
= ep
->stopped
;
364 debug("%s: %s %p, req = %p, stopped = %d\n",
365 __func__
, ep
->ep
.name
, ep
, &req
->req
, stopped
);
367 list_del_init(&req
->queue
);
369 if (likely(req
->req
.status
== -EINPROGRESS
))
370 req
->req
.status
= status
;
372 status
= req
->req
.status
;
374 if (status
&& status
!= -ESHUTDOWN
) {
375 debug("complete %s req %p stat %d len %u/%u\n",
376 ep
->ep
.name
, &req
->req
, status
,
377 req
->req
.actual
, req
->req
.length
);
380 /* don't modify queue heads during completion callback */
384 printf("calling complete callback\n");
386 int i
, len
= req
->req
.length
;
388 printf("pkt[%d] = ", req
->req
.length
);
391 for (i
= 0; i
< len
; i
++) {
392 printf("%02x", ((u8
*)req
->req
.buf
)[i
]);
399 spin_unlock(&ep
->dev
->lock
);
400 req
->req
.complete(&ep
->ep
, &req
->req
);
401 spin_lock(&ep
->dev
->lock
);
403 debug("callback completed\n");
405 ep
->stopped
= stopped
;
409 * nuke - dequeue ALL requests
411 static void nuke(struct dwc2_ep
*ep
, int status
)
413 struct dwc2_request
*req
;
415 debug("%s: %s %p\n", __func__
, ep
->ep
.name
, ep
);
417 /* called with irqs blocked */
418 while (!list_empty(&ep
->queue
)) {
419 req
= list_entry(ep
->queue
.next
, struct dwc2_request
, queue
);
420 done(ep
, req
, status
);
424 static void stop_activity(struct dwc2_udc
*dev
,
425 struct usb_gadget_driver
*driver
)
429 /* don't disconnect drivers more than once */
430 if (dev
->gadget
.speed
== USB_SPEED_UNKNOWN
)
432 dev
->gadget
.speed
= USB_SPEED_UNKNOWN
;
434 /* prevent new request submissions, kill any outstanding requests */
435 for (i
= 0; i
< DWC2_MAX_ENDPOINTS
; i
++) {
436 struct dwc2_ep
*ep
= &dev
->ep
[i
];
438 nuke(ep
, -ESHUTDOWN
);
441 /* report disconnect; the driver is already quiesced */
443 spin_unlock(&dev
->lock
);
444 driver
->disconnect(&dev
->gadget
);
445 spin_lock(&dev
->lock
);
448 /* re-init driver-visible data structures */
452 static void reconfig_usbd(struct dwc2_udc
*dev
)
454 /* 2. Soft-reset OTG Core and then unreset again. */
456 unsigned int uTemp
= writel(CORE_SOFT_RESET
, ®
->grstctl
);
457 uint32_t dflt_gusbcfg
;
458 uint32_t rx_fifo_sz
, tx_fifo_sz
, np_tx_fifo_sz
;
462 debug("Reseting OTG controller\n");
465 0<<15 /* PHY Low Power Clock sel*/
466 |1<<14 /* Non-Periodic TxFIFO Rewind Enable*/
467 |0x5<<10 /* Turnaround time*/
468 |0<<9 | 0<<8 /* [0:HNP disable,1:HNP enable][ 0:SRP disable*/
469 /* 1:SRP enable] H1= 1,1*/
470 |0<<7 /* Ulpi DDR sel*/
471 |0<<6 /* 0: high speed utmi+, 1: full speed serial*/
472 |0<<4 /* 0: utmi+, 1:ulpi*/
473 #ifdef CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8
474 |0<<3 /* phy i/f 0:8bit, 1:16bit*/
476 |1<<3 /* phy i/f 0:8bit, 1:16bit*/
478 |0x7<<0; /* HS/FS Timeout**/
480 if (dev
->pdata
->usb_gusbcfg
)
481 dflt_gusbcfg
= dev
->pdata
->usb_gusbcfg
;
483 writel(dflt_gusbcfg
, ®
->gusbcfg
);
485 /* 3. Put the OTG device core in the disconnected state.*/
486 uTemp
= readl(®
->dctl
);
487 uTemp
|= SOFT_DISCONNECT
;
488 writel(uTemp
, ®
->dctl
);
492 /* 4. Make the OTG device core exit from the disconnected state.*/
493 uTemp
= readl(®
->dctl
);
494 uTemp
= uTemp
& ~SOFT_DISCONNECT
;
495 writel(uTemp
, ®
->dctl
);
497 /* 5. Configure OTG Core to initial settings of device mode.*/
498 /* [][1: full speed(30Mhz) 0:high speed]*/
499 writel(EP_MISS_CNT(1) | DEV_SPEED_HIGH_SPEED_20
, ®
->dcfg
);
503 /* 6. Unmask the core interrupts*/
504 writel(GINTMSK_INIT
, ®
->gintmsk
);
506 /* 7. Set NAK bit of EP0, EP1, EP2*/
507 writel(DEPCTL_EPDIS
|DEPCTL_SNAK
, ®
->out_endp
[EP0_CON
].doepctl
);
508 writel(DEPCTL_EPDIS
|DEPCTL_SNAK
, ®
->in_endp
[EP0_CON
].diepctl
);
510 for (i
= 1; i
< DWC2_MAX_ENDPOINTS
; i
++) {
511 writel(DEPCTL_EPDIS
|DEPCTL_SNAK
, ®
->out_endp
[i
].doepctl
);
512 writel(DEPCTL_EPDIS
|DEPCTL_SNAK
, ®
->in_endp
[i
].diepctl
);
515 /* 8. Unmask EPO interrupts*/
516 writel(((1 << EP0_CON
) << DAINT_OUT_BIT
)
517 | (1 << EP0_CON
), ®
->daintmsk
);
519 /* 9. Unmask device OUT EP common interrupts*/
520 writel(DOEPMSK_INIT
, ®
->doepmsk
);
522 /* 10. Unmask device IN EP common interrupts*/
523 writel(DIEPMSK_INIT
, ®
->diepmsk
);
525 rx_fifo_sz
= RX_FIFO_SIZE
;
526 np_tx_fifo_sz
= NPTX_FIFO_SIZE
;
527 tx_fifo_sz
= PTX_FIFO_SIZE
;
529 if (dev
->pdata
->rx_fifo_sz
)
530 rx_fifo_sz
= dev
->pdata
->rx_fifo_sz
;
531 if (dev
->pdata
->np_tx_fifo_sz
)
532 np_tx_fifo_sz
= dev
->pdata
->np_tx_fifo_sz
;
533 if (dev
->pdata
->tx_fifo_sz
)
534 tx_fifo_sz
= dev
->pdata
->tx_fifo_sz
;
536 /* 11. Set Rx FIFO Size (in 32-bit words) */
537 writel(rx_fifo_sz
, ®
->grxfsiz
);
539 /* 12. Set Non Periodic Tx FIFO Size */
540 writel((np_tx_fifo_sz
<< 16) | rx_fifo_sz
,
543 /* retrieve the number of IN Endpoints (excluding ep0) */
544 max_hw_ep
= (readl(®
->ghwcfg4
) & GHWCFG4_NUM_IN_EPS_MASK
) >>
545 GHWCFG4_NUM_IN_EPS_SHIFT
;
546 pdata_hw_ep
= dev
->pdata
->tx_fifo_sz_nb
;
548 /* tx_fifo_sz_nb should equal to number of IN Endpoint */
549 if (pdata_hw_ep
&& max_hw_ep
!= pdata_hw_ep
)
550 pr_warn("Got %d hw endpoint but %d tx-fifo-size in array !!\n",
551 max_hw_ep
, pdata_hw_ep
);
553 for (i
= 0; i
< max_hw_ep
; i
++) {
555 tx_fifo_sz
= dev
->pdata
->tx_fifo_sz_array
[i
];
557 writel((rx_fifo_sz
+ np_tx_fifo_sz
+ (tx_fifo_sz
* i
)) |
558 tx_fifo_sz
<< 16, ®
->dieptxf
[i
]);
560 /* Flush the RX FIFO */
561 writel(RX_FIFO_FLUSH
, ®
->grstctl
);
562 while (readl(®
->grstctl
) & RX_FIFO_FLUSH
)
563 debug("%s: waiting for DWC2_UDC_OTG_GRSTCTL\n", __func__
);
565 /* Flush all the Tx FIFO's */
566 writel(TX_FIFO_FLUSH_ALL
, ®
->grstctl
);
567 writel(TX_FIFO_FLUSH_ALL
| TX_FIFO_FLUSH
, ®
->grstctl
);
568 while (readl(®
->grstctl
) & TX_FIFO_FLUSH
)
569 debug("%s: waiting for DWC2_UDC_OTG_GRSTCTL\n", __func__
);
571 /* 13. Clear NAK bit of EP0, EP1, EP2*/
573 /* EP0: Control OUT */
574 writel(DEPCTL_EPDIS
| DEPCTL_CNAK
,
575 ®
->out_endp
[EP0_CON
].doepctl
);
577 /* 14. Initialize OTG Link Core.*/
578 writel(GAHBCFG_INIT
, ®
->gahbcfg
);
581 static void set_max_pktsize(struct dwc2_udc
*dev
, enum usb_device_speed speed
)
583 unsigned int ep_ctrl
;
586 if (speed
== USB_SPEED_HIGH
) {
589 ep_fifo_size2
= 1024;
590 dev
->gadget
.speed
= USB_SPEED_HIGH
;
595 dev
->gadget
.speed
= USB_SPEED_FULL
;
598 dev
->ep
[0].ep
.maxpacket
= ep0_fifo_size
;
599 for (i
= 1; i
< DWC2_MAX_ENDPOINTS
; i
++)
600 dev
->ep
[i
].ep
.maxpacket
= ep_fifo_size
;
602 /* EP0 - Control IN (64 bytes)*/
603 ep_ctrl
= readl(®
->in_endp
[EP0_CON
].diepctl
);
604 writel(ep_ctrl
|(0<<0), ®
->in_endp
[EP0_CON
].diepctl
);
606 /* EP0 - Control OUT (64 bytes)*/
607 ep_ctrl
= readl(®
->out_endp
[EP0_CON
].doepctl
);
608 writel(ep_ctrl
|(0<<0), ®
->out_endp
[EP0_CON
].doepctl
);
611 static int dwc2_ep_enable(struct usb_ep
*_ep
,
612 const struct usb_endpoint_descriptor
*desc
)
615 struct dwc2_udc
*dev
;
616 unsigned long flags
= 0;
618 debug("%s: %p\n", __func__
, _ep
);
620 ep
= container_of(_ep
, struct dwc2_ep
, ep
);
621 if (!_ep
|| !desc
|| ep
->desc
|| _ep
->name
== ep0name
622 || desc
->bDescriptorType
!= USB_DT_ENDPOINT
623 || ep
->bEndpointAddress
!= desc
->bEndpointAddress
624 || ep_maxpacket(ep
) <
625 le16_to_cpu(get_unaligned(&desc
->wMaxPacketSize
))) {
627 debug("%s: bad ep or descriptor\n", __func__
);
631 /* xfer types must match, except that interrupt ~= bulk */
632 if (ep
->bmAttributes
!= desc
->bmAttributes
633 && ep
->bmAttributes
!= USB_ENDPOINT_XFER_BULK
634 && desc
->bmAttributes
!= USB_ENDPOINT_XFER_INT
) {
636 debug("%s: %s type mismatch\n", __func__
, _ep
->name
);
640 /* hardware _could_ do smaller, but driver doesn't */
641 if ((desc
->bmAttributes
== USB_ENDPOINT_XFER_BULK
&&
642 le16_to_cpu(get_unaligned(&desc
->wMaxPacketSize
)) >
643 ep_maxpacket(ep
)) || !get_unaligned(&desc
->wMaxPacketSize
)) {
645 debug("%s: bad %s maxpacket\n", __func__
, _ep
->name
);
650 if (!dev
->driver
|| dev
->gadget
.speed
== USB_SPEED_UNKNOWN
) {
652 debug("%s: bogus device state\n", __func__
);
659 ep
->ep
.maxpacket
= le16_to_cpu(get_unaligned(&desc
->wMaxPacketSize
));
661 /* Reset halt state */
662 dwc2_udc_set_nak(ep
);
663 dwc2_udc_set_halt(_ep
, 0);
665 spin_lock_irqsave(&ep
->dev
->lock
, flags
);
666 dwc2_udc_ep_activate(ep
);
667 spin_unlock_irqrestore(&ep
->dev
->lock
, flags
);
669 debug("%s: enabled %s, stopped = %d, maxpacket = %d\n",
670 __func__
, _ep
->name
, ep
->stopped
, ep
->ep
.maxpacket
);
677 static int dwc2_ep_disable(struct usb_ep
*_ep
)
680 unsigned long flags
= 0;
682 debug("%s: %p\n", __func__
, _ep
);
684 ep
= container_of(_ep
, struct dwc2_ep
, ep
);
685 if (!_ep
|| !ep
->desc
) {
686 debug("%s: %s not enabled\n", __func__
,
687 _ep
? ep
->ep
.name
: NULL
);
691 spin_lock_irqsave(&ep
->dev
->lock
, flags
);
693 /* Nuke all pending requests */
694 nuke(ep
, -ESHUTDOWN
);
699 spin_unlock_irqrestore(&ep
->dev
->lock
, flags
);
701 debug("%s: disabled %s\n", __func__
, _ep
->name
);
705 static struct usb_request
*dwc2_alloc_request(struct usb_ep
*ep
,
708 struct dwc2_request
*req
;
710 debug("%s: %s %p\n", __func__
, ep
->name
, ep
);
712 req
= memalign(CONFIG_SYS_CACHELINE_SIZE
, sizeof(*req
));
716 memset(req
, 0, sizeof *req
);
717 INIT_LIST_HEAD(&req
->queue
);
722 static void dwc2_free_request(struct usb_ep
*ep
, struct usb_request
*_req
)
724 struct dwc2_request
*req
;
726 debug("%s: %p\n", __func__
, ep
);
728 req
= container_of(_req
, struct dwc2_request
, req
);
729 WARN_ON(!list_empty(&req
->queue
));
733 /* dequeue JUST ONE request */
734 static int dwc2_dequeue(struct usb_ep
*_ep
, struct usb_request
*_req
)
737 struct dwc2_request
*req
;
738 unsigned long flags
= 0;
740 debug("%s: %p\n", __func__
, _ep
);
742 ep
= container_of(_ep
, struct dwc2_ep
, ep
);
743 if (!_ep
|| ep
->ep
.name
== ep0name
)
746 spin_lock_irqsave(&ep
->dev
->lock
, flags
);
748 /* make sure it's actually queued on this endpoint */
749 list_for_each_entry(req
, &ep
->queue
, queue
) {
750 if (&req
->req
== _req
)
753 if (&req
->req
!= _req
) {
754 spin_unlock_irqrestore(&ep
->dev
->lock
, flags
);
758 done(ep
, req
, -ECONNRESET
);
760 spin_unlock_irqrestore(&ep
->dev
->lock
, flags
);
765 * Return bytes in EP FIFO
767 static int dwc2_fifo_status(struct usb_ep
*_ep
)
772 ep
= container_of(_ep
, struct dwc2_ep
, ep
);
774 debug("%s: bad ep\n", __func__
);
778 debug("%s: %d\n", __func__
, ep_index(ep
));
780 /* LPD can't report unclaimed bytes from IN fifos */
790 static void dwc2_fifo_flush(struct usb_ep
*_ep
)
794 ep
= container_of(_ep
, struct dwc2_ep
, ep
);
795 if (unlikely(!_ep
|| (!ep
->desc
&& ep
->ep
.name
!= ep0name
))) {
796 debug("%s: bad ep\n", __func__
);
800 debug("%s: %d\n", __func__
, ep_index(ep
));
803 static const struct usb_gadget_ops dwc2_udc_ops
= {
804 /* current versions must always be self-powered */
805 #if CONFIG_IS_ENABLED(DM_USB_GADGET)
806 .udc_start
= dwc2_gadget_start
,
807 .udc_stop
= dwc2_gadget_stop
,
811 static struct dwc2_udc memory
= {
814 .ops
= &dwc2_udc_ops
,
815 .ep0
= &memory
.ep
[0].ep
,
819 /* control endpoint */
824 .maxpacket
= EP0_FIFO_SIZE
,
828 .bEndpointAddress
= 0,
831 .ep_type
= ep_control
,
834 /* first group of endpoints */
837 .name
= "ep1in-bulk",
839 .maxpacket
= EP_FIFO_SIZE
,
843 .bEndpointAddress
= USB_DIR_IN
| 1,
844 .bmAttributes
= USB_ENDPOINT_XFER_BULK
,
846 .ep_type
= ep_bulk_out
,
852 .name
= "ep2out-bulk",
854 .maxpacket
= EP_FIFO_SIZE
,
858 .bEndpointAddress
= USB_DIR_OUT
| 2,
859 .bmAttributes
= USB_ENDPOINT_XFER_BULK
,
861 .ep_type
= ep_bulk_in
,
869 .maxpacket
= EP_FIFO_SIZE
,
873 .bEndpointAddress
= USB_DIR_IN
| 3,
874 .bmAttributes
= USB_ENDPOINT_XFER_INT
,
876 .ep_type
= ep_interrupt
,
882 * probe - binds to the platform device
885 int dwc2_udc_probe(struct dwc2_plat_otg_data
*pdata
)
887 struct dwc2_udc
*dev
= &memory
;
890 debug("%s: %p\n", __func__
, pdata
);
894 reg
= (struct dwc2_usbotg_reg
*)pdata
->regs_otg
;
896 dev
->gadget
.is_dualspeed
= 1; /* Hack only*/
897 dev
->gadget
.is_otg
= 0;
898 dev
->gadget
.is_a_peripheral
= 0;
899 dev
->gadget
.b_hnp_enable
= 0;
900 dev
->gadget
.a_hnp_support
= 0;
901 dev
->gadget
.a_alt_hnp_support
= 0;
903 the_controller
= dev
;
905 usb_ctrl
= memalign(CONFIG_SYS_CACHELINE_SIZE
,
906 ROUND(sizeof(struct usb_ctrlrequest
),
907 CONFIG_SYS_CACHELINE_SIZE
));
909 pr_err("No memory available for UDC!\n");
913 usb_ctrl_dma_addr
= (dma_addr_t
) usb_ctrl
;
920 int dwc2_udc_handle_interrupt(void)
922 u32 intr_status
= readl(®
->gintsts
);
923 u32 gintmsk
= readl(®
->gintmsk
);
925 if (intr_status
& gintmsk
)
926 return dwc2_udc_irq(1, (void *)the_controller
);
931 #if !CONFIG_IS_ENABLED(DM_USB_GADGET)
933 int usb_gadget_handle_interrupts(int index
)
935 return dwc2_udc_handle_interrupt();
938 #else /* CONFIG_IS_ENABLED(DM_USB_GADGET) */
940 struct dwc2_priv_data
{
941 struct clk_bulk clks
;
942 struct reset_ctl_bulk resets
;
945 struct udevice
*usb33d_supply
;
948 int dm_usb_gadget_handle_interrupts(struct udevice
*dev
)
950 return dwc2_udc_handle_interrupt();
953 int dwc2_phy_setup(struct udevice
*dev
, struct phy
**array
, int *num_phys
)
956 struct phy
*usb_phys
;
958 /* Return if no phy declared */
959 if (!dev_read_prop(dev
, "phys", NULL
))
962 count
= dev_count_phandle_with_args(dev
, "phys", "#phy-cells");
966 usb_phys
= devm_kcalloc(dev
, count
, sizeof(struct phy
),
971 for (i
= 0; i
< count
; i
++) {
972 ret
= generic_phy_get_by_index(dev
, i
, &usb_phys
[i
]);
973 if (ret
&& ret
!= -ENOENT
) {
974 dev_err(dev
, "Failed to get USB PHY%d for %s\n",
980 for (i
= 0; i
< count
; i
++) {
981 ret
= generic_phy_init(&usb_phys
[i
]);
983 dev_err(dev
, "Can't init USB PHY%d for %s\n",
989 for (i
= 0; i
< count
; i
++) {
990 ret
= generic_phy_power_on(&usb_phys
[i
]);
992 dev_err(dev
, "Can't power USB PHY%d for %s\n",
994 goto phys_poweron_err
;
1004 for (i
= count
- 1; i
>= 0; i
--)
1005 generic_phy_power_off(&usb_phys
[i
]);
1007 for (i
= 0; i
< count
; i
++)
1008 generic_phy_exit(&usb_phys
[i
]);
1014 generic_phy_exit(&usb_phys
[i
]);
1019 void dwc2_phy_shutdown(struct udevice
*dev
, struct phy
*usb_phys
, int num_phys
)
1023 for (i
= 0; i
< num_phys
; i
++) {
1024 if (!generic_phy_valid(&usb_phys
[i
]))
1027 ret
= generic_phy_power_off(&usb_phys
[i
]);
1028 ret
|= generic_phy_exit(&usb_phys
[i
]);
1030 dev_err(dev
, "Can't shutdown USB PHY%d for %s\n",
1036 static int dwc2_udc_otg_ofdata_to_platdata(struct udevice
*dev
)
1038 struct dwc2_plat_otg_data
*platdata
= dev_get_platdata(dev
);
1039 int node
= dev_of_offset(dev
);
1041 void (*set_params
)(struct dwc2_plat_otg_data
*data
);
1043 if (usb_get_dr_mode(node
) != USB_DR_MODE_PERIPHERAL
) {
1044 dev_dbg(dev
, "Invalid mode\n");
1048 platdata
->regs_otg
= dev_read_addr(dev
);
1050 platdata
->rx_fifo_sz
= dev_read_u32_default(dev
, "g-rx-fifo-size", 0);
1051 platdata
->np_tx_fifo_sz
= dev_read_u32_default(dev
,
1052 "g-np-tx-fifo-size", 0);
1053 platdata
->tx_fifo_sz
= dev_read_u32_default(dev
, "g-tx-fifo-size", 0);
1055 platdata
->force_b_session_valid
=
1056 dev_read_bool(dev
, "force-b-session-valid");
1058 /* force platdata according compatible */
1059 drvdata
= dev_get_driver_data(dev
);
1061 set_params
= (void *)drvdata
;
1062 set_params(platdata
);
1068 static void dwc2_set_stm32mp1_hsotg_params(struct dwc2_plat_otg_data
*p
)
1070 p
->activate_stm_id_vb_detection
= true;
1072 0 << 15 /* PHY Low Power Clock sel*/
1073 | 0x9 << 10 /* USB Turnaround time (0x9 for HS phy) */
1074 | 0 << 9 /* [0:HNP disable,1:HNP enable]*/
1075 | 0 << 8 /* [0:SRP disable 1:SRP enable]*/
1076 | 0 << 6 /* 0: high speed utmi+, 1: full speed serial*/
1077 | 0x7 << 0; /* FS timeout calibration**/
1080 static int dwc2_udc_otg_reset_init(struct udevice
*dev
,
1081 struct reset_ctl_bulk
*resets
)
1085 ret
= reset_get_bulk(dev
, resets
);
1086 if (ret
== -ENOTSUPP
)
1092 ret
= reset_assert_bulk(resets
);
1096 ret
= reset_deassert_bulk(resets
);
1099 reset_release_bulk(resets
);
1106 static int dwc2_udc_otg_clk_init(struct udevice
*dev
,
1107 struct clk_bulk
*clks
)
1111 ret
= clk_get_bulk(dev
, clks
);
1118 ret
= clk_enable_bulk(clks
);
1120 clk_release_bulk(clks
);
1127 static int dwc2_udc_otg_probe(struct udevice
*dev
)
1129 struct dwc2_plat_otg_data
*platdata
= dev_get_platdata(dev
);
1130 struct dwc2_priv_data
*priv
= dev_get_priv(dev
);
1131 struct dwc2_usbotg_reg
*usbotg_reg
=
1132 (struct dwc2_usbotg_reg
*)platdata
->regs_otg
;
1135 ret
= dwc2_udc_otg_clk_init(dev
, &priv
->clks
);
1139 ret
= dwc2_udc_otg_reset_init(dev
, &priv
->resets
);
1143 ret
= dwc2_phy_setup(dev
, &priv
->phys
, &priv
->num_phys
);
1147 if (CONFIG_IS_ENABLED(DM_REGULATOR
) &&
1148 platdata
->activate_stm_id_vb_detection
&&
1149 !platdata
->force_b_session_valid
) {
1150 ret
= device_get_supply_regulator(dev
, "usb33d-supply",
1151 &priv
->usb33d_supply
);
1153 dev_err(dev
, "can't get voltage level detector supply\n");
1156 ret
= regulator_set_enable(priv
->usb33d_supply
, true);
1158 dev_err(dev
, "can't enable voltage level detector supply\n");
1161 /* Enable vbus sensing */
1162 setbits_le32(&usbotg_reg
->ggpio
,
1163 GGPIO_STM32_OTG_GCCFG_VBDEN
|
1164 GGPIO_STM32_OTG_GCCFG_IDEN
);
1167 if (platdata
->force_b_session_valid
)
1168 /* Override B session bits : value and enable */
1169 setbits_le32(&usbotg_reg
->gotgctl
, B_VALOEN
| B_VALOVAL
);
1171 ret
= dwc2_udc_probe(platdata
);
1175 the_controller
->driver
= 0;
1177 ret
= usb_add_gadget_udc((struct device
*)dev
, &the_controller
->gadget
);
1182 static int dwc2_udc_otg_remove(struct udevice
*dev
)
1184 struct dwc2_priv_data
*priv
= dev_get_priv(dev
);
1186 usb_del_gadget_udc(&the_controller
->gadget
);
1188 reset_release_bulk(&priv
->resets
);
1190 clk_release_bulk(&priv
->clks
);
1192 dwc2_phy_shutdown(dev
, priv
->phys
, priv
->num_phys
);
1194 return dm_scan_fdt_dev(dev
);
1197 static const struct udevice_id dwc2_udc_otg_ids
[] = {
1198 { .compatible
= "snps,dwc2" },
1199 { .compatible
= "st,stm32mp1-hsotg",
1200 .data
= (ulong
)dwc2_set_stm32mp1_hsotg_params
},
1204 U_BOOT_DRIVER(dwc2_udc_otg
) = {
1205 .name
= "dwc2-udc-otg",
1206 .id
= UCLASS_USB_GADGET_GENERIC
,
1207 .of_match
= dwc2_udc_otg_ids
,
1208 .ofdata_to_platdata
= dwc2_udc_otg_ofdata_to_platdata
,
1209 .probe
= dwc2_udc_otg_probe
,
1210 .remove
= dwc2_udc_otg_remove
,
1211 .platdata_auto_alloc_size
= sizeof(struct dwc2_plat_otg_data
),
1212 .priv_auto_alloc_size
= sizeof(struct dwc2_priv_data
),
1215 int dwc2_udc_B_session_valid(struct udevice
*dev
)
1217 struct dwc2_plat_otg_data
*platdata
= dev_get_platdata(dev
);
1218 struct dwc2_usbotg_reg
*usbotg_reg
=
1219 (struct dwc2_usbotg_reg
*)platdata
->regs_otg
;
1221 return readl(&usbotg_reg
->gotgctl
) & B_SESSION_VALID
;
1223 #endif /* CONFIG_IS_ENABLED(DM_USB_GADGET) */