2 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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28 * POSSIBILITY OF SUCH DAMAGE.
33 /memreserve/ 0x80000000 0x00010000;
40 compatible = "arm,vfp-base", "arm,vexpress";
41 interrupt-parent = <&gic>;
48 serial0 = &v2m_serial0;
49 serial1 = &v2m_serial1;
50 serial2 = &v2m_serial2;
51 serial3 = &v2m_serial3;
55 compatible = "arm,psci";
57 cpu_suspend = <0xc4000001>;
58 cpu_off = <0x84000002>;
59 cpu_on = <0xc4000003>;
60 sys_poweroff = <0x84000008>;
61 sys_reset = <0x84000009>;
70 compatible = "arm,armv8";
72 enable-method = "psci";
76 compatible = "arm,armv8";
78 enable-method = "psci";
82 compatible = "arm,armv8";
84 enable-method = "psci";
88 compatible = "arm,armv8";
90 enable-method = "psci";
94 compatible = "arm,armv8";
96 enable-method = "psci";
100 compatible = "arm,armv8";
102 enable-method = "psci";
106 compatible = "arm,armv8";
108 enable-method = "psci";
112 compatible = "arm,armv8";
114 enable-method = "psci";
119 device_type = "memory";
120 reg = <0x00000000 0x80000000 0 0x7F000000>,
121 <0x00000008 0x80000000 0 0x80000000>;
124 gic: interrupt-controller@2f000000 {
125 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
126 #interrupt-cells = <3>;
127 #address-cells = <0>;
128 interrupt-controller;
129 reg = <0x0 0x2f000000 0 0x10000>,
130 <0x0 0x2c000000 0 0x2000>,
131 <0x0 0x2c010000 0 0x2000>,
132 <0x0 0x2c02F000 0 0x2000>;
133 interrupts = <1 9 0xf04>;
137 compatible = "arm,armv8-timer";
138 interrupts = <1 13 0xff01>,
142 clock-frequency = <100000000>;
146 compatible = "arm,armv7-timer-mem";
147 reg = <0x0 0x2a810000 0x0 0x10000>;
148 clock-frequency = <100000000>;
149 #address-cells = <2>;
154 interrupts = <0 26 4>;
155 reg = <0x0 0x2a830000 0x0 0x10000>;
160 compatible = "arm,armv8-pmuv3";
161 interrupts = <0 60 4>,
168 compatible = "simple-bus";
170 #address-cells = <2>;
172 ranges = <0 0 0 0x08000000 0x04000000>,
173 <1 0 0 0x14000000 0x04000000>,
174 <2 0 0 0x18000000 0x04000000>,
175 <3 0 0 0x1c000000 0x04000000>,
176 <4 0 0 0x0c000000 0x04000000>,
177 <5 0 0 0x10000000 0x04000000>;
179 #interrupt-cells = <1>;
180 interrupt-map-mask = <0 0 63>;
181 interrupt-map = <0 0 0 &gic 0 0 4>,
191 <0 0 10 &gic 0 10 4>,
192 <0 0 11 &gic 0 11 4>,
193 <0 0 12 &gic 0 12 4>,
194 <0 0 13 &gic 0 13 4>,
195 <0 0 14 &gic 0 14 4>,
196 <0 0 15 &gic 0 15 4>,
197 <0 0 16 &gic 0 16 4>,
198 <0 0 17 &gic 0 17 4>,
199 <0 0 18 &gic 0 18 4>,
200 <0 0 19 &gic 0 19 4>,
201 <0 0 20 &gic 0 20 4>,
202 <0 0 21 &gic 0 21 4>,
203 <0 0 22 &gic 0 22 4>,
204 <0 0 23 &gic 0 23 4>,
205 <0 0 24 &gic 0 24 4>,
206 <0 0 25 &gic 0 25 4>,
207 <0 0 26 &gic 0 26 4>,
208 <0 0 27 &gic 0 27 4>,
209 <0 0 28 &gic 0 28 4>,
210 <0 0 29 &gic 0 29 4>,
211 <0 0 30 &gic 0 30 4>,
212 <0 0 31 &gic 0 31 4>,
213 <0 0 32 &gic 0 32 4>,
214 <0 0 33 &gic 0 33 4>,
215 <0 0 34 &gic 0 34 4>,
216 <0 0 35 &gic 0 35 4>,
217 <0 0 36 &gic 0 36 4>,
218 <0 0 37 &gic 0 37 4>,
219 <0 0 38 &gic 0 38 4>,
220 <0 0 39 &gic 0 39 4>,
221 <0 0 40 &gic 0 40 4>,
222 <0 0 41 &gic 0 41 4>,
223 <0 0 42 &gic 0 42 4>;
225 /include/ "rtsm_ve-motherboard.dtsi"
230 compatible = "panel";
243 vmode = "FB_VMODE_NONINTERLACED";
244 tim2 = "TIM2_BCD", "TIM2_IPC";
245 cntl = "CNTL_LCDTFT", "CNTL_BGR", "CNTL_LCDVCOMP(1)";
246 caps = "CLCD_CAP_5551", "CLCD_CAP_565", "CLCD_CAP_888";