2 * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
4 * SPDX-License-Identifier: BSD-3-Clause
8 arm,v2m-memory-map = "rs1";
9 compatible = "arm,vexpress,v2m-p1", "simple-bus";
10 #address-cells = <2>; /* SMB chipselect number and offset */
15 compatible = "smsc,lan91c111";
16 reg = <2 0x02000000 0x10000>;
17 interrupts = <0 15 4>;
20 v2m_clk24mhz: clk24mhz {
21 compatible = "fixed-clock";
23 clock-frequency = <24000000>;
24 clock-output-names = "v2m:clk24mhz";
27 v2m_refclk1mhz: refclk1mhz {
28 compatible = "fixed-clock";
30 clock-frequency = <1000000>;
31 clock-output-names = "v2m:refclk1mhz";
34 v2m_refclk32khz: refclk32khz {
35 compatible = "fixed-clock";
37 clock-frequency = <32768>;
38 clock-output-names = "v2m:refclk32khz";
42 compatible = "arm,amba-bus", "simple-bus";
45 ranges = <0 3 0 0x200000>;
47 v2m_sysreg: sysreg@10000 {
48 compatible = "arm,vexpress-sysreg";
49 reg = <0x010000 0x1000>;
54 v2m_sysctl: sysctl@20000 {
55 compatible = "arm,sp810", "arm,primecell";
56 reg = <0x020000 0x1000>;
57 clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&v2m_clk24mhz>;
58 clock-names = "refclk", "timclk", "apb_pclk";
60 clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3";
63 v2m_serial0: uart@90000 {
64 compatible = "arm,pl011", "arm,primecell";
65 reg = <0x090000 0x1000>;
67 clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
68 clock-names = "uartclk", "apb_pclk";
71 v2m_serial1: uart@a0000 {
72 compatible = "arm,pl011", "arm,primecell";
73 reg = <0x0a0000 0x1000>;
75 clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
76 clock-names = "uartclk", "apb_pclk";
79 v2m_serial2: uart@b0000 {
80 compatible = "arm,pl011", "arm,primecell";
81 reg = <0x0b0000 0x1000>;
83 clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
84 clock-names = "uartclk", "apb_pclk";
87 v2m_serial3: uart@c0000 {
88 compatible = "arm,pl011", "arm,primecell";
89 reg = <0x0c0000 0x1000>;
91 clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
92 clock-names = "uartclk", "apb_pclk";
96 compatible = "arm,sp805", "arm,primecell";
97 reg = <0x0f0000 0x1000>;
99 clocks = <&v2m_refclk32khz>, <&v2m_clk24mhz>;
100 clock-names = "wdogclk", "apb_pclk";
103 v2m_timer01: timer@110000 {
104 compatible = "arm,sp804", "arm,primecell";
105 reg = <0x110000 0x1000>;
106 interrupts = <0 2 4>;
107 clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&v2m_clk24mhz>;
108 clock-names = "timclken1", "timclken2", "apb_pclk";
111 v2m_timer23: timer@120000 {
112 compatible = "arm,sp804", "arm,primecell";
113 reg = <0x120000 0x1000>;
114 interrupts = <0 3 4>;
115 clocks = <&v2m_sysctl 2>, <&v2m_sysctl 3>, <&v2m_clk24mhz>;
116 clock-names = "timclken1", "timclken2", "apb_pclk";
120 compatible = "arm,pl031", "arm,primecell";
121 reg = <0x170000 0x1000>;
122 interrupts = <0 4 4>;
123 clocks = <&v2m_clk24mhz>;
124 clock-names = "apb_pclk";
127 virtio_block@130000 {
128 compatible = "virtio,mmio";
129 reg = <0x130000 0x1000>;
130 interrupts = <0 0x2a 4>;
134 v2m_fixed_3v3: fixedregulator@0 {
135 compatible = "regulator-fixed";
136 regulator-name = "3V3";
137 regulator-min-microvolt = <3300000>;
138 regulator-max-microvolt = <3300000>;
144 compatible = "arm,vexpress,config-bus", "simple-bus";
145 arm,vexpress,config-bridge = <&v2m_sysreg>;
148 * Not supported in FVP models
151 * compatible = "arm,vexpress-reset";
152 * arm,vexpress-sysreg,func = <5 0>;
157 compatible = "arm,vexpress-muxfpga";
158 arm,vexpress-sysreg,func = <7 0>;
162 * Not used - Superseded by PSCI sys_poweroff
165 * compatible = "arm,vexpress-shutdown";
166 * arm,vexpress-sysreg,func = <8 0>;
171 * Not used - Superseded by PSCI sys_reset
174 * compatible = "arm,vexpress-reboot";
175 * arm,vexpress-sysreg,func = <9 0>;
180 compatible = "arm,vexpress-dvimode";
181 arm,vexpress-sysreg,func = <11 0>;