2 * Copyright (c) 2019, Arm Limited. All rights reserved.
4 * SPDX-License-Identifier: BSD-3-Clause
10 model = "V2F-1XV7 Cortex-A7x1 SMM";
11 compatible = "arm,vexpress,v2f-1xv7", "arm,vexpress";
12 interrupt-parent = <&gic>;
22 compatible = "arm,cortex-a7";
28 device_type = "memory";
29 reg = <0 0x80000000 0 0x80000000>; /* 2GB @ 2GB */
32 gic: interrupt-controller@2c001000 {
33 compatible = "arm,cortex-a15-gic";
34 #interrupt-cells = <3>;
37 reg = <0 0x2c001000 0 0x1000>,
38 <0 0x2c002000 0 0x1000>,
39 <0 0x2c004000 0 0x2000>,
40 <0 0x2c006000 0 0x2000>;
41 interrupts = <1 9 0xf04>;
44 smbclk: refclk24mhzx2 {
45 /* Reference 24MHz clock x 2 */
46 compatible = "fixed-clock";
48 clock-frequency = <48000000>;
49 clock-output-names = "smclk";
53 compatible = "simple-bus";
57 ranges = <0 0 0 0x08000000 0x04000000>,
58 <1 0 0 0x14000000 0x04000000>,
59 <2 0 0 0x18000000 0x04000000>,
60 <3 0 0 0x1c000000 0x04000000>,
61 <4 0 0 0x0c000000 0x04000000>,
62 <5 0 0 0x10000000 0x04000000>;
64 #interrupt-cells = <1>;
65 interrupt-map-mask = <0 0 63>;
66 interrupt-map = <0 0 0 &gic 0 0 4>,
74 /include/ "rtsm_ve-motherboard-aarch32.dtsi"