include/configs/m53menlo.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2
   3 /*
   4  * Menlosystems M53Menlo configuration
   5  * Copyright (C) 2012-2017 Marek Vasut <marex@denx.de>
   6  * Copyright (C) 2014-2017 Olaf Mandel <o.mandel@menlosystems.com>
   7  */
   8
   9 #ifndef __M53MENLO_CONFIG_H__
  10 #define __M53MENLO_CONFIG_H__
  11
  12 #include <asm/arch/imx-regs.h>
  13
  14 #define CONFIG_REVISION_TAG
  15 #define CONFIG_SYS_FSL_CLK
  16
  17 #define CONFIG_TIMESTAMP                /* Print image info with timestamp */
  18
  19 /*
  20  * Memory configurations
  21  */
  22 #define PHYS_SDRAM_1                    CSD0_BASE_ADDR
  23 #define PHYS_SDRAM_1_SIZE               (gd->bd->bi_dram[0].size)
  24 #define PHYS_SDRAM_2                    CSD1_BASE_ADDR
  25 #define PHYS_SDRAM_2_SIZE               (gd->bd->bi_dram[1].size)
  26 #define PHYS_SDRAM_SIZE                 (gd->ram_size)
  27 #define CONFIG_SYS_MALLOC_LEN           (10 * 1024 * 1024)
  28 #define CONFIG_SYS_MEMTEST_START        0x70000000
  29 #define CONFIG_SYS_MEMTEST_END          0x8ff00000
  30
  31 #define CONFIG_SYS_SDRAM_BASE           (PHYS_SDRAM_1)
  32 #define CONFIG_SYS_INIT_RAM_ADDR        (IRAM_BASE_ADDR)
  33 #define CONFIG_SYS_INIT_RAM_SIZE        (IRAM_SIZE)
  34
  35 #define CONFIG_SYS_INIT_SP_OFFSET \
  36         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  37 #define CONFIG_SYS_INIT_SP_ADDR \
  38         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
  39
  40 /*
  41  * U-Boot general configurations
  42  */
  43 #define CONFIG_SYS_CBSIZE       1024            /* Console I/O buffer size */
  44 #define CONFIG_SYS_MAXARGS      32              /* Max number of command args */
  45 #define CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE
  46                                                 /* Boot argument buffer size */
  47
  48 /*
  49  * Serial Driver
  50  */
  51 #define CONFIG_MXC_UART
  52 #define CONFIG_MXC_UART_BASE            UART1_BASE
  53
  54 /*
  55  * MMC Driver
  56  */
  57 #ifdef CONFIG_CMD_MMC
  58 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
  59 #define CONFIG_SYS_FSL_ESDHC_NUM        1
  60 #endif
  61
  62 /*
  63  * NAND
  64  */
  65 #define CONFIG_ENV_SIZE                 (16 * 1024)
  66 #ifdef CONFIG_CMD_NAND
  67 #define CONFIG_SYS_MAX_NAND_DEVICE      1
  68 #define CONFIG_SYS_NAND_BASE            NFC_BASE_ADDR_AXI
  69 #define CONFIG_MXC_NAND_REGS_BASE       NFC_BASE_ADDR_AXI
  70 #define CONFIG_MXC_NAND_IP_REGS_BASE    NFC_BASE_ADDR
  71 #define CONFIG_SYS_NAND_LARGEPAGE
  72 #define CONFIG_MXC_NAND_HWECC
  73 #define CONFIG_SYS_NAND_USE_FLASH_BBT
  74
  75 /* Environment is in NAND */
  76 #define CONFIG_ENV_SIZE_REDUND          CONFIG_ENV_SIZE
  77 #define CONFIG_ENV_SECT_SIZE            (128 * 1024)
  78 #define CONFIG_ENV_RANGE                (4 * CONFIG_ENV_SECT_SIZE)
  79 #define CONFIG_ENV_OFFSET               (8 * CONFIG_ENV_SECT_SIZE) /* 1 MiB */
  80 #define CONFIG_ENV_OFFSET_REDUND        \
  81                 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)
  82 #endif
  83
  84 /*
  85  * Ethernet on SOC (FEC)
  86  */
  87 #ifdef CONFIG_CMD_NET
  88 #define CONFIG_FEC_MXC
  89 #define IMX_FEC_BASE                    FEC_BASE_ADDR
  90 #define CONFIG_FEC_MXC_PHYADDR          0x0
  91 #define CONFIG_MII
  92 #define CONFIG_DISCOVER_PHY
  93 #define CONFIG_FEC_XCV_TYPE             RMII
  94 #define CONFIG_ETHPRIME                 "FEC0"
  95 #endif
  96
  97 /*
  98  * I2C
  99  */
 100 #ifdef CONFIG_CMD_I2C
 101 #define CONFIG_SYS_I2C
 102 #define CONFIG_SYS_I2C_MXC
 103 #define CONFIG_SYS_I2C_MXC_I2C1         /* enable I2C bus 1 */
 104 #define CONFIG_SYS_I2C_MXC_I2C2         /* enable I2C bus 2 */
 105 #define CONFIG_SYS_I2C_MXC_I2C3         /* enable I2C bus 3 */
 106 #define CONFIG_SYS_RTC_BUS_NUM          1 /* I2C2 */
 107 #endif
 108
 109 /*
 110  * RTC
 111  */
 112 #ifdef CONFIG_CMD_DATE
 113 #define CONFIG_SYS_I2C_RTC_ADDR         0x68
 114 #define CONFIG_SYS_M41T11_BASE_YEAR     2000
 115 #endif
 116
 117 /*
 118  * USB
 119  */
 120 #ifdef CONFIG_CMD_USB
 121 #define CONFIG_MXC_USB_PORT             1
 122 #define CONFIG_MXC_USB_PORTSC           (PORT_PTS_UTMI | PORT_PTS_PTW)
 123 #define CONFIG_MXC_USB_FLAGS            0
 124 #endif
 125
 126 /*
 127  * SATA
 128  */
 129 #ifdef CONFIG_CMD_SATA
 130 #define CONFIG_SYS_SATA_MAX_DEVICE      1
 131 #define CONFIG_DWC_AHSATA_PORT_ID       0
 132 #define CONFIG_DWC_AHSATA_BASE_ADDR     SATA_BASE_ADDR
 133 #define CONFIG_LBA48
 134 #endif
 135
 136 /*
 137  * LCD
 138  */
 139 #ifdef CONFIG_VIDEO
 140 #define CONFIG_VIDEO_BMP_RLE8
 141 #define CONFIG_VIDEO_BMP_GZIP
 142 #define CONFIG_SPLASH_SCREEN
 143 #define CONFIG_SPLASHIMAGE_GUARD
 144 #define CONFIG_SPLASH_SCREEN_ALIGN
 145 #define CONFIG_BMP_16BPP
 146 #define CONFIG_VIDEO_LOGO
 147 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE  (2 << 20)
 148 #endif
 149
 150 /* LVDS display */
 151 #define CONFIG_SYS_LDB_CLOCK                    33260000
 152 #define CONFIG_IMX_VIDEO_SKIP
 153 #define CONFIG_SPLASH_SOURCE
 154
 155 /* IIM Fuses */
 156 #define CONFIG_FSL_IIM
 157
 158 /* Watchdog */
 159 #define CONFIG_WATCHDOG_TIMEOUT_MSECS 8000
 160
 161 /*
 162  * Boot Linux
 163  */
 164 #define CONFIG_CMDLINE_TAG
 165 #define CONFIG_INITRD_TAG
 166 #define CONFIG_REVISION_TAG
 167 #define CONFIG_SETUP_MEMORY_TAGS
 168 #define CONFIG_BOOTFILE         "boot/fitImage"
 169 #define CONFIG_LOADADDR         0x70800000
 170 #define CONFIG_BOOTCOMMAND      "run mmc_mmc"
 171 #define CONFIG_SYS_LOAD_ADDR    CONFIG_LOADADDR
 172
 173 /*
 174  * NAND SPL
 175  */
 176 #define CONFIG_SPL_TARGET               "u-boot-with-nand-spl.imx"
 177 #define CONFIG_SPL_PAD_TO               0x8000
 178 #define CONFIG_SPL_STACK                0x70004000
 179
 180 #define CONFIG_SYS_NAND_U_BOOT_OFFS     CONFIG_SPL_PAD_TO
 181 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
 182 #define CONFIG_SYS_NAND_OOBSIZE         64
 183 #define CONFIG_SYS_NAND_PAGE_COUNT      64
 184 #define CONFIG_SYS_NAND_SIZE            (256 * 1024 * 1024)
 185 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   0
 186
 187 /*
 188  * Extra Environments
 189  */
 190 #define CONFIG_PREBOOT          "run try_bootscript"
 191 #define CONFIG_HOSTNAME         "m53menlo"
 192
 193 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 194         "consdev=ttymxc0\0"                                             \
 195         "baudrate=115200\0"                                             \
 196         "bootscript=boot.scr\0"                                         \
 197         "mmcdev=0\0"                                                    \
 198         "mmcpart=1\0"                                                   \
 199         "rootpath=/srv/\0"                                              \
 200         "kernel_addr_r=0x72000000\0"                                    \
 201         "mtdids=" CONFIG_MTDIDS_DEFAULT "\0"                            \
 202         "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"                        \
 203         "netdev=eth0\0"                                                 \
 204         "splashsource=mmc_fs\0"                                         \
 205         "splashfile=boot/usplash.bmp.gz\0"                              \
 206         "splashimage=0x88000000\0"                                      \
 207         "splashpos=m,m\0"                                               \
 208         "addcons="                                                      \
 209                 "setenv bootargs ${bootargs} "                          \
 210                 "console=${consdev},${baudrate}\0"                      \
 211         "addip="                                                        \
 212                 "setenv bootargs ${bootargs} "                          \
 213                 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
 214                 ":${hostname}:${netdev}:off\0"                          \
 215         "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"              \
 216         "addmisc="                                                      \
 217                 "setenv bootargs ${bootargs} ${miscargs}\0"             \
 218         "addargs=run addcons addmisc addmtd\0"                          \
 219         "mmcload="                                                      \
 220                 "mmc rescan ; load mmc ${mmcdev}:${mmcpart} "           \
 221                 "${kernel_addr_r} ${bootfile}\0"                        \
 222         "miscargs=nohlt panic=1\0"                                      \
 223         "mmcargs=setenv bootargs root=/dev/mmcblk0p${mmcpart} rw "      \
 224                 "rootwait\0"                                            \
 225         "mmc_mmc="                                                      \
 226                 "run mmcload mmcargs addargs ; "                        \
 227                 "bootm ${kernel_addr_r}\0"                              \
 228         "netload=tftp ${kernel_addr_r} ${hostname}/${bootfile}\0"       \
 229         "net_nfs="                                                      \
 230                 "run netload nfsargs addip addargs ; "                  \
 231                 "bootm ${kernel_addr_r}\0"                              \
 232         "nfsargs="                                                      \
 233                 "setenv bootargs root=/dev/nfs rw "                     \
 234                 "nfsroot=${serverip}:${rootpath}${hostname},v3,tcp\0"   \
 235         "try_bootscript="                                               \
 236                 "mmc rescan;"                                           \
 237                 "if test -e mmc 0:1 ${bootscript} ; then "              \
 238                 "if load mmc 0:1 ${kernel_addr_r} ${bootscript};"       \
 239                 "then ; "                                               \
 240                         "echo Running bootscript... ; "                 \
 241                         "source ${kernel_addr_r} ; "                    \
 242                 "fi ; "                                                 \
 243                 "fi\0"
 244
 245 #endif  /* __M53MENLO_CONFIG_H__ */