include/drivers/st/stm32_uart_regs.h

   1 /*
   2  * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
   3  *
   4  * SPDX-License-Identifier: BSD-3-Clause
   5  */
   6
   7 #ifndef STM32_UART_REGS_H
   8 #define STM32_UART_REGS_H
   9
  10 #include <utils_def.h>
  11
  12 #define USART_CR1               U(0x00)
  13 #define USART_CR2               U(0x04)
  14 #define USART_CR3               U(0x08)
  15 #define USART_BRR               U(0x0C)
  16 #define USART_GTPR              U(0x10)
  17 #define USART_RTOR              U(0x14)
  18 #define USART_RQR               U(0x18)
  19 #define USART_ISR               U(0x1C)
  20 #define USART_ICR               U(0x20)
  21 #define USART_RDR               U(0x24)
  22 #define USART_TDR               U(0x28)
  23 #define USART_PRESC             U(0x2C)
  24
  25 /* USART_CR1 register fields */
  26 #define USART_CR1_UE            BIT(0)
  27 #define USART_CR1_UESM          BIT(1)
  28 #define USART_CR1_RE            BIT(2)
  29 #define USART_CR1_TE            BIT(3)
  30 #define USART_CR1_IDLEIE        BIT(4)
  31 #define USART_CR1_RXNEIE        BIT(5)
  32 #define USART_CR1_TCIE          BIT(6)
  33 #define USART_CR1_TXEIE         BIT(7)
  34 #define USART_CR1_PEIE          BIT(8)
  35 #define USART_CR1_PS            BIT(9)
  36 #define USART_CR1_PCE           BIT(10)
  37 #define USART_CR1_WAKE          BIT(11)
  38 #define USART_CR1_M             (BIT(28) | BIT(12))
  39 #define USART_CR1_M0            BIT(12)
  40 #define USART_CR1_MME           BIT(13)
  41 #define USART_CR1_CMIE          BIT(14)
  42 #define USART_CR1_OVER8         BIT(15)
  43 #define USART_CR1_DEDT          GENMASK(20, 16)
  44 #define USART_CR1_DEDT_0        BIT(16)
  45 #define USART_CR1_DEDT_1        BIT(17)
  46 #define USART_CR1_DEDT_2        BIT(18)
  47 #define USART_CR1_DEDT_3        BIT(19)
  48 #define USART_CR1_DEDT_4        BIT(20)
  49 #define USART_CR1_DEAT          GENMASK(25, 21)
  50 #define USART_CR1_DEAT_0        BIT(21)
  51 #define USART_CR1_DEAT_1        BIT(22)
  52 #define USART_CR1_DEAT_2        BIT(23)
  53 #define USART_CR1_DEAT_3        BIT(24)
  54 #define USART_CR1_DEAT_4        BIT(25)
  55 #define USART_CR1_RTOIE         BIT(26)
  56 #define USART_CR1_EOBIE         BIT(27)
  57 #define USART_CR1_M1            BIT(28)
  58 #define USART_CR1_FIFOEN        BIT(29)
  59 #define USART_CR1_TXFEIE        BIT(30)
  60 #define USART_CR1_RXFFIE        BIT(31)
  61
  62 /* USART_CR2 register fields */
  63 #define USART_CR2_SLVEN         BIT(0)
  64 #define USART_CR2_DIS_NSS       BIT(3)
  65 #define USART_CR2_ADDM7         BIT(4)
  66 #define USART_CR2_LBDL          BIT(5)
  67 #define USART_CR2_LBDIE         BIT(6)
  68 #define USART_CR2_LBCL          BIT(8)
  69 #define USART_CR2_CPHA          BIT(9)
  70 #define USART_CR2_CPOL          BIT(10)
  71 #define USART_CR2_CLKEN         BIT(11)
  72 #define USART_CR2_STOP          GENMASK(13, 12)
  73 #define USART_CR2_STOP_0        BIT(12)
  74 #define USART_CR2_STOP_1        BIT(13)
  75 #define USART_CR2_LINEN         BIT(14)
  76 #define USART_CR2_SWAP          BIT(15)
  77 #define USART_CR2_RXINV         BIT(16)
  78 #define USART_CR2_TXINV         BIT(17)
  79 #define USART_CR2_DATAINV       BIT(18)
  80 #define USART_CR2_MSBFIRST      BIT(19)
  81 #define USART_CR2_ABREN         BIT(20)
  82 #define USART_CR2_ABRMODE       GENMASK(22, 21)
  83 #define USART_CR2_ABRMODE_0     BIT(21)
  84 #define USART_CR2_ABRMODE_1     BIT(22)
  85 #define USART_CR2_RTOEN         BIT(23)
  86 #define USART_CR2_ADD           GENMASK(31, 24)
  87
  88 /* USART_CR3 register fields */
  89 #define USART_CR3_EIE           BIT(0)
  90 #define USART_CR3_IREN          BIT(1)
  91 #define USART_CR3_IRLP          BIT(2)
  92 #define USART_CR3_HDSEL         BIT(3)
  93 #define USART_CR3_NACK          BIT(4)
  94 #define USART_CR3_SCEN          BIT(5)
  95 #define USART_CR3_DMAR          BIT(6)
  96 #define USART_CR3_DMAT          BIT(7)
  97 #define USART_CR3_RTSE          BIT(8)
  98 #define USART_CR3_CTSE          BIT(9)
  99 #define USART_CR3_CTSIE         BIT(10)
 100 #define USART_CR3_ONEBIT        BIT(11)
 101 #define USART_CR3_OVRDIS        BIT(12)
 102 #define USART_CR3_DDRE          BIT(13)
 103 #define USART_CR3_DEM           BIT(14)
 104 #define USART_CR3_DEP           BIT(15)
 105 #define USART_CR3_SCARCNT       GENMASK(19, 17)
 106 #define USART_CR3_SCARCNT_0     BIT(17)
 107 #define USART_CR3_SCARCNT_1     BIT(18)
 108 #define USART_CR3_SCARCNT_2     BIT(19)
 109 #define USART_CR3_WUS           GENMASK(21, 20)
 110 #define USART_CR3_WUS_0         BIT(20)
 111 #define USART_CR3_WUS_1         BIT(21)
 112 #define USART_CR3_WUFIE         BIT(22)
 113 #define USART_CR3_TXFTIE        BIT(23)
 114 #define USART_CR3_TCBGTIE       BIT(24)
 115 #define USART_CR3_RXFTCFG       GENMASK(27, 25)
 116 #define USART_CR3_RXFTCFG_0     BIT(25)
 117 #define USART_CR3_RXFTCFG_1     BIT(26)
 118 #define USART_CR3_RXFTCFG_2     BIT(27)
 119 #define USART_CR3_RXFTIE        BIT(28)
 120 #define USART_CR3_TXFTCFG       GENMASK(31, 29)
 121 #define USART_CR3_TXFTCFG_0     BIT(29)
 122 #define USART_CR3_TXFTCFG_1     BIT(30)
 123 #define USART_CR3_TXFTCFG_2     BIT(31)
 124
 125 /* USART_BRR register fields */
 126 #define USART_BRR_DIV_FRACTION  GENMASK(3, 0)
 127 #define USART_BRR_DIV_MANTISSA  GENMASK(15, 4)
 128
 129 /* USART_GTPR register fields */
 130 #define USART_GTPR_PSC          GENMASK(7, 0)
 131 #define USART_GTPR_GT           GENMASK(15, 8)
 132
 133 /* USART_RTOR register fields */
 134 #define USART_RTOR_RTO          GENMASK(23, 0)
 135 #define USART_RTOR_BLEN         GENMASK(31, 24)
 136
 137 /* USART_RQR register fields */
 138 #define USART_RQR_ABRRQ         BIT(0)
 139 #define USART_RQR_SBKRQ         BIT(1)
 140 #define USART_RQR_MMRQ          BIT(2)
 141 #define USART_RQR_RXFRQ         BIT(3)
 142 #define USART_RQR_TXFRQ         BIT(4)
 143
 144 /* USART_ISR register fields */
 145 #define USART_ISR_PE            BIT(0)
 146 #define USART_ISR_FE            BIT(1)
 147 #define USART_ISR_NE            BIT(2)
 148 #define USART_ISR_ORE           BIT(3)
 149 #define USART_ISR_IDLE          BIT(4)
 150 #define USART_ISR_RXNE          BIT(5)
 151 #define USART_ISR_TC            BIT(6)
 152 #define USART_ISR_TXE           BIT(7)
 153 #define USART_ISR_LBDF          BIT(8)
 154 #define USART_ISR_CTSIF         BIT(9)
 155 #define USART_ISR_CTS           BIT(10)
 156 #define USART_ISR_RTOF          BIT(11)
 157 #define USART_ISR_EOBF          BIT(12)
 158 #define USART_ISR_UDR           BIT(13)
 159 #define USART_ISR_ABRE          BIT(14)
 160 #define USART_ISR_ABRF          BIT(15)
 161 #define USART_ISR_BUSY          BIT(16)
 162 #define USART_ISR_CMF           BIT(17)
 163 #define USART_ISR_SBKF          BIT(18)
 164 #define USART_ISR_RWU           BIT(19)
 165 #define USART_ISR_WUF           BIT(20)
 166 #define USART_ISR_TEACK         BIT(21)
 167 #define USART_ISR_REACK         BIT(22)
 168 #define USART_ISR_TXFE          BIT(23)
 169 #define USART_ISR_RXFF          BIT(24)
 170 #define USART_ISR_TCBGT         BIT(25)
 171 #define USART_ISR_RXFT          BIT(26)
 172 #define USART_ISR_TXFT          BIT(27)
 173
 174 /* USART_ICR register fields */
 175 #define USART_ICR_PECF          BIT(0)
 176 #define USART_ICR_FECF          BIT(1)
 177 #define USART_ICR_NCF           BIT(2)
 178 #define USART_ICR_ORECF         BIT(3)
 179 #define USART_ICR_IDLECF        BIT(4)
 180 #define USART_ICR_TCCF          BIT(6)
 181 #define USART_ICR_TCBGT         BIT(7)
 182 #define USART_ICR_LBDCF         BIT(8)
 183 #define USART_ICR_CTSCF         BIT(9)
 184 #define USART_ICR_RTOCF         BIT(11)
 185 #define USART_ICR_EOBCF         BIT(12)
 186 #define USART_ICR_UDRCF         BIT(13)
 187 #define USART_ICR_CMCF          BIT(17)
 188 #define USART_ICR_WUCF          BIT(20)
 189
 190 /* USART_RDR register fields */
 191 #define USART_RDR_RDR           GENMASK(8, 0)
 192
 193 /* USART_TDR register fields */
 194 #define USART_TDR_TDR           GENMASK(8, 0)
 195
 196 /* USART_PRESC register fields */
 197 #define USART_PRESC_PRESCALER   GENMASK(3, 0)
 198
 199 #endif /* STM32_UART_REGS_H */