ad80c57724c6e8cdd3364a88890afe6616ee237b
[project/bcm63xx/atf.git] / include / drivers / ti / uart / uart_16550.h
1 /*
2 * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #ifndef UART_16550_H
8 #define UART_16550_H
9
10 #include <console.h>
11
12 /* UART16550 Registers */
13 #define UARTTX 0x0
14 #define UARTRX 0x0
15 #define UARTDLL 0x0
16 #define UARTIER 0x4
17 #define UARTDLLM 0x4
18 #define UARTIIR 0x8
19 #define UARTFCR 0x8
20 #define UARTLCR 0xc
21 #define UARTMCR 0x10
22 #define UARTLSR 0x14
23 #define UARTMSR 0x18
24 #define UARTSPR 0x1c
25 #define UARTCSR 0x20
26 /* Some instances have MDR1 defined as well */
27 #define UARTMDR1 0x20
28 #define UARTRXFIFOCFG 0x24
29 #define UARTMIE 0x28
30 #define UARTVNDR 0x2c
31 #define UARTASR 0x3c
32
33 /* FIFO Control Register bits */
34 #define UARTFCR_FIFOMD_16450 (0 << 6)
35 #define UARTFCR_FIFOMD_16550 (1 << 6)
36 #define UARTFCR_RXTRIG_1 (0 << 6)
37 #define UARTFCR_RXTRIG_4 (1 << 6)
38 #define UARTFCR_RXTRIG_8 (2 << 6)
39 #define UARTFCR_RXTRIG_16 (3 << 6)
40 #define UARTFCR_TXTRIG_1 (0 << 4)
41 #define UARTFCR_TXTRIG_4 (1 << 4)
42 #define UARTFCR_TXTRIG_8 (2 << 4)
43 #define UARTFCR_TXTRIG_16 (3 << 4)
44 #define UARTFCR_DMAEN (1 << 3) /* Enable DMA mode */
45 #define UARTFCR_TXCLR (1 << 2) /* Clear contents of Tx FIFO */
46 #define UARTFCR_RXCLR (1 << 1) /* Clear contents of Rx FIFO */
47 #define UARTFCR_FIFOEN (1 << 0) /* Enable the Tx/Rx FIFO */
48
49 /* Line Control Register bits */
50 #define UARTLCR_DLAB (1 << 7) /* Divisor Latch Access */
51 #define UARTLCR_SETB (1 << 6) /* Set BREAK Condition */
52 #define UARTLCR_SETP (1 << 5) /* Set Parity to LCR[4] */
53 #define UARTLCR_EVEN (1 << 4) /* Even Parity Format */
54 #define UARTLCR_PAR (1 << 3) /* Parity */
55 #define UARTLCR_STOP (1 << 2) /* Stop Bit */
56 #define UARTLCR_WORDSZ_5 0 /* Word Length of 5 */
57 #define UARTLCR_WORDSZ_6 1 /* Word Length of 6 */
58 #define UARTLCR_WORDSZ_7 2 /* Word Length of 7 */
59 #define UARTLCR_WORDSZ_8 3 /* Word Length of 8 */
60
61 /* Line Status Register bits */
62 #define UARTLSR_RXFIFOEMT (1 << 9) /* Rx Fifo Empty */
63 #define UARTLSR_TXFIFOFULL (1 << 8) /* Tx Fifo Full */
64 #define UARTLSR_RXFIFOERR (1 << 7) /* Rx Fifo Error */
65 #define UARTLSR_TEMT (1 << 6) /* Tx Shift Register Empty */
66 #define UARTLSR_THRE (1 << 5) /* Tx Holding Register Empty */
67 #define UARTLSR_BRK (1 << 4) /* Break Condition Detected */
68 #define UARTLSR_FERR (1 << 3) /* Framing Error */
69 #define UARTLSR_PERR (1 << 3) /* Parity Error */
70 #define UARTLSR_OVRF (1 << 2) /* Rx Overrun Error */
71 #define UARTLSR_RDR_BIT (0) /* Rx Data Ready Bit */
72 #define UARTLSR_RDR (1 << UARTLSR_RDR_BIT) /* Rx Data Ready */
73
74 #define CONSOLE_T_16550_BASE CONSOLE_T_DRVDATA
75
76 #ifndef __ASSEMBLY__
77
78 #include <stdint.h>
79
80 typedef struct {
81 console_t console;
82 uintptr_t base;
83 } console_16550_t;
84
85 /*
86 * Initialize a new 16550 console instance and register it with the console
87 * framework. The |console| pointer must point to storage that will be valid
88 * for the lifetime of the console, such as a global or static local variable.
89 * Its contents will be reinitialized from scratch.
90 */
91 int console_16550_register(uintptr_t baseaddr, uint32_t clock, uint32_t baud,
92 console_16550_t *console);
93
94 #endif /*__ASSEMBLY__*/
95
96 #endif /* UART_16550_H */