2 * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
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30 #ifndef __PLAT_ARM_H__
31 #define __PLAT_ARM_H__
33 #include <arm_xlat_tables.h>
34 #include <bakery_lock.h>
38 #include <utils_def.h>
40 /*******************************************************************************
41 * Forward declarations
42 ******************************************************************************/
47 #define ARM_CASSERT_MMAP \
48 CASSERT((ARRAY_SIZE(plat_arm_mmap) + ARM_BL_REGIONS) \
49 <= MAX_MMAP_REGIONS, \
50 assert_max_mmap_regions);
53 * Utility functions common to ARM standard platforms
55 void arm_setup_page_tables(uintptr_t total_base
,
59 uintptr_t rodata_start
,
60 uintptr_t rodata_limit
62 , uintptr_t coh_start
,
67 #if defined(IMAGE_BL31) || (defined(AARCH32) && defined(IMAGE_BL32))
69 * Use this macro to instantiate lock before it is used in below
70 * arm_lock_xxx() macros
72 #define ARM_INSTANTIATE_LOCK DEFINE_BAKERY_LOCK(arm_lock);
75 * These are wrapper macros to the Coherent Memory Bakery Lock API.
77 #define arm_lock_init() bakery_lock_init(&arm_lock)
78 #define arm_lock_get() bakery_lock_get(&arm_lock)
79 #define arm_lock_release() bakery_lock_release(&arm_lock)
84 * Empty macros for all other BL stages other than BL31 and BL32
86 #define ARM_INSTANTIATE_LOCK
87 #define arm_lock_init()
88 #define arm_lock_get()
89 #define arm_lock_release()
91 #endif /* defined(IMAGE_BL31) || (defined(AARCH32) && defined(IMAGE_BL32)) */
93 #if ARM_RECOM_STATE_ID_ENC
95 * Macros used to parse state information from State-ID if it is using the
96 * recommended encoding for State-ID.
98 #define ARM_LOCAL_PSTATE_WIDTH 4
99 #define ARM_LOCAL_PSTATE_MASK ((1 << ARM_LOCAL_PSTATE_WIDTH) - 1)
101 /* Macros to construct the composite power state */
103 /* Make composite power state parameter till power level 0 */
104 #if PSCI_EXTENDED_STATE_ID
106 #define arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \
107 (((lvl0_state) << PSTATE_ID_SHIFT) | ((type) << PSTATE_TYPE_SHIFT))
109 #define arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \
110 (((lvl0_state) << PSTATE_ID_SHIFT) | \
111 ((pwr_lvl) << PSTATE_PWR_LVL_SHIFT) | \
112 ((type) << PSTATE_TYPE_SHIFT))
113 #endif /* __PSCI_EXTENDED_STATE_ID__ */
115 /* Make composite power state parameter till power level 1 */
116 #define arm_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type) \
117 (((lvl1_state) << ARM_LOCAL_PSTATE_WIDTH) | \
118 arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type))
120 /* Make composite power state parameter till power level 2 */
121 #define arm_make_pwrstate_lvl2(lvl2_state, lvl1_state, lvl0_state, pwr_lvl, type) \
122 (((lvl2_state) << (ARM_LOCAL_PSTATE_WIDTH * 2)) | \
123 arm_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type))
125 #endif /* __ARM_RECOM_STATE_ID_ENC__ */
128 /* IO storage utility functions */
129 void arm_io_setup(void);
131 /* Security utility functions */
132 void arm_tzc400_setup(void);
133 struct tzc_dmc500_driver_data
;
134 void arm_tzc_dmc500_setup(struct tzc_dmc500_driver_data
*plat_driver_data
);
136 /* Systimer utility function */
137 void arm_configure_sys_timer(void);
139 /* PM utility functions */
140 int arm_validate_power_state(unsigned int power_state
,
141 psci_power_state_t
*req_state
);
142 int arm_validate_ns_entrypoint(uintptr_t entrypoint
);
143 void arm_system_pwr_domain_resume(void);
144 void arm_program_trusted_mailbox(uintptr_t address
);
146 /* Topology utility function */
147 int arm_check_mpidr(u_register_t mpidr
);
149 /* BL1 utility functions */
150 void arm_bl1_early_platform_setup(void);
151 void arm_bl1_platform_setup(void);
152 void arm_bl1_plat_arch_setup(void);
154 /* BL2 utility functions */
155 void arm_bl2_early_platform_setup(struct meminfo
*mem_layout
);
156 void arm_bl2_platform_setup(void);
157 void arm_bl2_plat_arch_setup(void);
158 uint32_t arm_get_spsr_for_bl32_entry(void);
159 uint32_t arm_get_spsr_for_bl33_entry(void);
160 int arm_bl2_handle_post_image_load(unsigned int image_id
);
162 /* BL2U utility functions */
163 void arm_bl2u_early_platform_setup(struct meminfo
*mem_layout
,
165 void arm_bl2u_platform_setup(void);
166 void arm_bl2u_plat_arch_setup(void);
168 /* BL31 utility functions */
170 void arm_bl31_early_platform_setup(void *from_bl2
,
171 void *plat_params_from_bl2
);
173 void arm_bl31_early_platform_setup(struct bl31_params
*from_bl2
,
174 void *plat_params_from_bl2
);
175 #endif /* LOAD_IMAGE_V2 */
176 void arm_bl31_platform_setup(void);
177 void arm_bl31_plat_runtime_setup(void);
178 void arm_bl31_plat_arch_setup(void);
180 /* TSP utility functions */
181 void arm_tsp_early_platform_setup(void);
183 /* SP_MIN utility functions */
184 void arm_sp_min_early_platform_setup(void *from_bl2
,
185 void *plat_params_from_bl2
);
187 /* FIP TOC validity check */
188 int arm_io_is_toc_valid(void);
191 * Mandatory functions required in ARM standard platforms
193 unsigned int plat_arm_get_cluster_core_count(u_register_t mpidr
);
194 void plat_arm_gic_driver_init(void);
195 void plat_arm_gic_init(void);
196 void plat_arm_gic_cpuif_enable(void);
197 void plat_arm_gic_cpuif_disable(void);
198 void plat_arm_gic_redistif_on(void);
199 void plat_arm_gic_redistif_off(void);
200 void plat_arm_gic_pcpu_init(void);
201 void plat_arm_security_setup(void);
202 void plat_arm_pwrc_setup(void);
203 void plat_arm_interconnect_init(void);
204 void plat_arm_interconnect_enter_coherency(void);
205 void plat_arm_interconnect_exit_coherency(void);
208 unsigned int plat_arm_get_cpu_pe_count(u_register_t mpidr
);
213 * This function is called after loading SCP_BL2 image and it is used to perform
214 * any platform-specific actions required to handle the SCP firmware.
216 int plat_arm_bl2_handle_scp_bl2(struct image_info
*scp_bl2_image_info
);
220 * Optional functions required in ARM standard platforms
222 void plat_arm_io_setup(void);
223 int plat_arm_get_alt_image_source(
224 unsigned int image_id
,
225 uintptr_t *dev_handle
,
226 uintptr_t *image_spec
);
227 unsigned int plat_arm_calc_core_pos(u_register_t mpidr
);
228 const mmap_region_t
*plat_arm_get_mmap(void);
230 /* Allow platform to override psci_pm_ops during runtime */
231 const plat_psci_ops_t
*plat_arm_psci_override_pm_ops(plat_psci_ops_t
*ops
);
233 #endif /* __PLAT_ARM_H__ */