2 * Copyright (C) 2018 Marvell International Ltd.
4 * SPDX-License-Identifier: BSD-3-Clause
5 * https://spdx.org/licenses
13 #include <lib/cassert.h>
14 #include <lib/el3_runtime/cpu_data.h>
15 #include <lib/utils.h>
16 #include <lib/xlat_tables/xlat_tables.h>
19 * Extern declarations common to Marvell standard platforms
21 extern const mmap_region_t plat_marvell_mmap
[];
23 #define MARVELL_CASSERT_MMAP \
24 CASSERT((ARRAY_SIZE(plat_marvell_mmap) + MARVELL_BL_REGIONS) \
25 <= MAX_MMAP_REGIONS, \
26 assert_max_mmap_regions)
28 struct marvell_bl31_params
{
30 image_info_t
*bl31_image_info
;
31 entry_point_info_t
*bl32_ep_info
;
32 image_info_t
*bl32_image_info
;
33 entry_point_info_t
*bl33_ep_info
;
34 image_info_t
*bl33_image_info
;
38 * Utility functions common to Marvell standard platforms
40 void marvell_setup_page_tables(uintptr_t total_base
,
44 uintptr_t rodata_start
,
45 uintptr_t rodata_limit
47 , uintptr_t coh_start
,
52 /* Console utility functions */
53 void marvell_console_boot_init(void);
54 void marvell_console_boot_end(void);
55 void marvell_console_runtime_init(void);
56 void marvell_console_runtime_end(void);
58 /* IO storage utility functions */
59 void marvell_io_setup(void);
61 /* Systimer utility function */
62 void marvell_configure_sys_timer(void);
64 /* Topology utility function */
65 int marvell_check_mpidr(u_register_t mpidr
);
67 /* BLE utility functions */
68 int ble_plat_setup(int *skip
);
69 void plat_marvell_dram_update_topology(void);
70 void ble_plat_pcie_ep_setup(void);
71 struct pci_hw_cfg
*plat_get_pcie_hw_data(void);
73 /* BL1 utility functions */
74 void marvell_bl1_early_platform_setup(void);
75 void marvell_bl1_platform_setup(void);
76 void marvell_bl1_plat_arch_setup(void);
78 /* BL2 utility functions */
79 void marvell_bl2_early_platform_setup(meminfo_t
*mem_layout
);
80 void marvell_bl2_platform_setup(void);
81 void marvell_bl2_plat_arch_setup(void);
82 uint32_t marvell_get_spsr_for_bl32_entry(void);
83 uint32_t marvell_get_spsr_for_bl33_entry(void);
85 /* BL31 utility functions */
86 void marvell_bl31_early_platform_setup(void *from_bl2
,
87 uintptr_t soc_fw_config
,
89 void *plat_params_from_bl2
);
90 void marvell_bl31_platform_setup(void);
91 void marvell_bl31_plat_runtime_setup(void);
92 void marvell_bl31_plat_arch_setup(void);
94 /* Power management config to power off the SoC */
95 void *plat_marvell_get_pm_cfg(void);
97 /* Check if MSS AP CM3 firmware contains PM support */
98 _Bool
is_pm_fw_running(void);
100 /* Bootrom image recovery utility functions */
101 void *plat_marvell_get_skip_image_data(void);
103 /* FIP TOC validity check */
104 int marvell_io_is_toc_valid(void);
109 void marvell_psci_arch_init(int ap_idx
);
110 void plat_marvell_system_reset(void);
113 * Miscellaneous platform SMC routines
115 #ifdef MVEBU_PMU_IRQ_WA
116 void mvebu_pmu_interrupt_enable(void);
117 void mvebu_pmu_interrupt_disable(void);
121 * Optional functions required in Marvell standard platforms
123 void plat_marvell_io_setup(void);
124 int plat_marvell_get_alt_image_source(
125 unsigned int image_id
,
126 uintptr_t *dev_handle
,
127 uintptr_t *image_spec
);
128 unsigned int plat_marvell_calc_core_pos(u_register_t mpidr
);
130 const mmap_region_t
*plat_marvell_get_mmap(void);
131 void marvell_ble_prepare_exit(void);
132 void marvell_exit_bootrom(uintptr_t base
);
134 int plat_marvell_early_cpu_powerdown(void);
135 int bl2_plat_handle_scp_bl2(image_info_t
*scp_bl2_image_info
);
137 #endif /* PLAT_MARVELL_H */