include/plat/marvell/common/aarch64/cci_macros.S

   1 /*
   2  * Copyright (C) 2018 Marvell International Ltd.
   3  *
   4  * SPDX-License-Identifier:     BSD-3-Clause
   5  * https://spdx.org/licenses
   6  */
   7
   8 #ifndef CCI_MACROS_S
   9 #define CCI_MACROS_S
  10
  11 #include <drivers/arm/cci.h>
  12 #include <platform_def.h>
  13
  14 .section .rodata.cci_reg_name, "aS"
  15 cci_iface_regs:
  16         .asciz "cci_snoop_ctrl_cluster0", "cci_snoop_ctrl_cluster1" , ""
  17
  18         /* ------------------------------------------------
  19          * The below required platform porting macro prints
  20          * out relevant interconnect registers whenever an
  21          * unhandled exception is taken in BL31.
  22          * Clobbers: x0 - x9, sp
  23          * ------------------------------------------------
  24          */
  25         .macro print_cci_regs
  26         adr     x6, cci_iface_regs
  27         /* Store in x7 the base address of the first interface */
  28         mov_imm x7, (PLAT_MARVELL_CCI_BASE + SLAVE_IFACE_OFFSET(        \
  29                         PLAT_MARVELL_CCI_CLUSTER0_SL_IFACE_IX))
  30         ldr     w8, [x7, #SNOOP_CTRL_REG]
  31         /* Store in x7 the base address of the second interface */
  32         mov_imm x7, (PLAT_MARVELL_CCI_BASE + SLAVE_IFACE_OFFSET(        \
  33                         PLAT_MARVELL_CCI_CLUSTER1_SL_IFACE_IX))
  34         ldr     w9, [x7, #SNOOP_CTRL_REG]
  35         /* Store to the crash buf and print to console */
  36         bl      str_in_crash_buf_print
  37         .endm
  38
  39 #endif /* CCI_MACROS_S */