lib/extensions/sve/sve.c

   1 /*
   2  * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
   3  *
   4  * SPDX-License-Identifier: BSD-3-Clause
   5  */
   6
   7 #include <stdbool.h>
   8
   9 #include <arch.h>
  10 #include <arch_helpers.h>
  11 #include <lib/el3_runtime/pubsub.h>
  12 #include <lib/extensions/sve.h>
  13
  14 bool sve_supported(void)
  15 {
  16         uint64_t features;
  17
  18         features = read_id_aa64pfr0_el1() >> ID_AA64PFR0_SVE_SHIFT;
  19         return (features & ID_AA64PFR0_SVE_MASK) == 1U;
  20 }
  21
  22 static void *disable_sve_hook(const void *arg)
  23 {
  24         uint64_t cptr;
  25
  26         if (!sve_supported())
  27                 return (void *)-1;
  28
  29         /*
  30          * Disable SVE, SIMD and FP access for the Secure world.
  31          * As the SIMD/FP registers are part of the SVE Z-registers, any
  32          * use of SIMD/FP functionality will corrupt the SVE registers.
  33          * Therefore it is necessary to prevent use of SIMD/FP support
  34          * in the Secure world as well as SVE functionality.
  35          */
  36         cptr = read_cptr_el3();
  37         cptr = (cptr | TFP_BIT) & ~(CPTR_EZ_BIT);
  38         write_cptr_el3(cptr);
  39
  40         /*
  41          * No explicit ISB required here as ERET to switch to Secure
  42          * world covers it
  43          */
  44         return (void *)0;
  45 }
  46
  47 static void *enable_sve_hook(const void *arg)
  48 {
  49         uint64_t cptr;
  50
  51         if (!sve_supported())
  52                 return (void *)-1;
  53
  54         /*
  55          * Enable SVE, SIMD and FP access for the Non-secure world.
  56          */
  57         cptr = read_cptr_el3();
  58         cptr = (cptr | CPTR_EZ_BIT) & ~(TFP_BIT);
  59         write_cptr_el3(cptr);
  60
  61         /*
  62          * No explicit ISB required here as ERET to switch to Non-secure
  63          * world covers it
  64          */
  65         return (void *)0;
  66 }
  67
  68 void sve_enable(bool el2_unused)
  69 {
  70         uint64_t cptr;
  71
  72         if (!sve_supported())
  73                 return;
  74
  75 #if CTX_INCLUDE_FPREGS
  76         /*
  77          * CTX_INCLUDE_FPREGS is not supported on SVE enabled systems.
  78          */
  79         assert(0);
  80 #endif
  81         /*
  82          * Update CPTR_EL3 to enable access to SVE functionality for the
  83          * Non-secure world.
  84          * NOTE - assumed that CPTR_EL3.TFP is set to allow access to
  85          * the SIMD, floating-point and SVE support.
  86          *
  87          * CPTR_EL3.EZ: Set to 1 to enable access to SVE  functionality
  88          *  in the Non-secure world.
  89          */
  90         cptr = read_cptr_el3();
  91         cptr |= CPTR_EZ_BIT;
  92         write_cptr_el3(cptr);
  93
  94         /*
  95          * Need explicit ISB here to guarantee that update to ZCR_ELx
  96          * and CPTR_EL2.TZ do not result in trap to EL3.
  97          */
  98         isb();
  99
 100         /*
 101          * Ensure lower ELs have access to full vector length.
 102          */
 103         write_zcr_el3(ZCR_EL3_LEN_MASK);
 104
 105         if (el2_unused) {
 106                 /*
 107                  * Update CPTR_EL2 to enable access to SVE functionality
 108                  * for Non-secure world, EL2 and Non-secure EL1 and EL0.
 109                  * NOTE - assumed that CPTR_EL2.TFP is set to allow
 110                  * access to the SIMD, floating-point and SVE support.
 111                  *
 112                  * CPTR_EL2.TZ: Set to 0 to enable access to SVE support
 113                  *  for EL2 and Non-secure EL1 and EL0.
 114                  */
 115                 cptr = read_cptr_el2();
 116                 cptr &= ~(CPTR_EL2_TZ_BIT);
 117                 write_cptr_el2(cptr);
 118
 119                 /*
 120                  * Ensure lower ELs have access to full vector length.
 121                  */
 122                 write_zcr_el2(ZCR_EL2_LEN_MASK);
 123         }
 124         /*
 125          * No explicit ISB required here as ERET to switch to
 126          * Non-secure world covers it.
 127          */
 128 }
 129
 130 SUBSCRIBE_TO_EVENT(cm_exited_normal_world, disable_sve_hook);
 131 SUBSCRIBE_TO_EVENT(cm_entering_normal_world, enable_sve_hook);