projects / project / bcm63xx / u-boot.git / blob
? search:


fc92082b0bdf5777cac56004d77ca2646b47b4cb
[project/bcm63xx/u-boot.git] / lib / fdtdec.c
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (c) 2011 The Chromium OS Authors.
4 */
5
6 #ifndef USE_HOSTCC
7 #include <common.h>
8 #include <boot_fit.h>
9 #include <dm.h>
10 #include <dm/of_extra.h>
11 #include <errno.h>
12 #include <fdtdec.h>
13 #include <fdt_support.h>
14 #include <inttypes.h>
15 #include <linux/libfdt.h>
16 #include <serial.h>
17 #include <asm/sections.h>
18 #include <linux/ctype.h>
19 #include <linux/lzo.h>
20
21 DECLARE_GLOBAL_DATA_PTR;
22
23 /*
24 * Here are the type we know about. One day we might allow drivers to
25 * register. For now we just put them here. The COMPAT macro allows us to
26 * turn this into a sparse list later, and keeps the ID with the name.
27 *
28 * NOTE: This list is basically a TODO list for things that need to be
29 * converted to driver model. So don't add new things here unless there is a
30 * good reason why driver-model conversion is infeasible. Examples include
31 * things which are used before driver model is available.
32 */
33 #define COMPAT(id, name) name
34 static const char * const compat_names[COMPAT_COUNT] = {
35 COMPAT(UNKNOWN, "<none>"),
36 COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
37 COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
38 COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
39 COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
40 COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
41 COMPAT(SMSC_LAN9215, "smsc,lan9215"),
42 COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
43 COMPAT(SAMSUNG_S3C2440_I2C, "samsung,s3c2440-i2c"),
44 COMPAT(SAMSUNG_EXYNOS5_SOUND, "samsung,exynos-sound"),
45 COMPAT(WOLFSON_WM8994_CODEC, "wolfson,wm8994-codec"),
46 COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
47 COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
48 COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
49 COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
50 COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
51 COMPAT(SAMSUNG_EXYNOS_MMC, "samsung,exynos-mmc"),
52 COMPAT(GENERIC_SPI_FLASH, "spi-flash"),
53 COMPAT(MAXIM_98095_CODEC, "maxim,max98095-codec"),
54 COMPAT(SAMSUNG_EXYNOS5_I2C, "samsung,exynos5-hsi2c"),
55 COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
56 COMPAT(INTEL_MICROCODE, "intel,microcode"),
57 COMPAT(AMS_AS3722, "ams,as3722"),
58 COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
59 COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
60 COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
61 COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
62 COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
63 COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
64 COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
65 COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
66 COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
67 COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
68 COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),
69 COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"),
70 COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"),
71 COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
72 COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
73 COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
74 COMPAT(ALTERA_SOCFPGA_FPGA0, "altr,socfpga-a10-fpga-mgr"),
75 COMPAT(ALTERA_SOCFPGA_NOC, "altr,socfpga-a10-noc"),
76 COMPAT(ALTERA_SOCFPGA_CLK_INIT, "altr,socfpga-a10-clk-init")
77 };
78
79 const char *fdtdec_get_compatible(enum fdt_compat_id id)
80 {
81 /* We allow reading of the 'unknown' ID for testing purposes */
82 assert(id >= 0 && id < COMPAT_COUNT);
83 return compat_names[id];
84 }
85
86 fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
87 const char *prop_name, int index, int na,
88 int ns, fdt_size_t *sizep,
89 bool translate)
90 {
91 const fdt32_t *prop, *prop_end;
92 const fdt32_t *prop_addr, *prop_size, *prop_after_size;
93 int len;
94 fdt_addr_t addr;
95
96 debug("%s: %s: ", __func__, prop_name);
97
98 if (na > (sizeof(fdt_addr_t) / sizeof(fdt32_t))) {
99 debug("(na too large for fdt_addr_t type)\n");
100 return FDT_ADDR_T_NONE;
101 }
102
103 if (ns > (sizeof(fdt_size_t) / sizeof(fdt32_t))) {
104 debug("(ns too large for fdt_size_t type)\n");
105 return FDT_ADDR_T_NONE;
106 }
107
108 prop = fdt_getprop(blob, node, prop_name, &len);
109 if (!prop) {
110 debug("(not found)\n");
111 return FDT_ADDR_T_NONE;
112 }
113 prop_end = prop + (len / sizeof(*prop));
114
115 prop_addr = prop + (index * (na + ns));
116 prop_size = prop_addr + na;
117 prop_after_size = prop_size + ns;
118 if (prop_after_size > prop_end) {
119 debug("(not enough data: expected >= %d cells, got %d cells)\n",
120 (u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
121 return FDT_ADDR_T_NONE;
122 }
123
124 #if CONFIG_IS_ENABLED(OF_TRANSLATE)
125 if (translate)
126 addr = fdt_translate_address(blob, node, prop_addr);
127 else
128 #endif
129 addr = fdtdec_get_number(prop_addr, na);
130
131 if (sizep) {
132 *sizep = fdtdec_get_number(prop_size, ns);
133 debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
134 (unsigned long long)*sizep);
135 } else {
136 debug("addr=%08llx\n", (unsigned long long)addr);
137 }
138
139 return addr;
140 }
141
142 fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
143 int node, const char *prop_name,
144 int index, fdt_size_t *sizep,
145 bool translate)
146 {
147 int na, ns;
148
149 debug("%s: ", __func__);
150
151 na = fdt_address_cells(blob, parent);
152 if (na < 1) {
153 debug("(bad #address-cells)\n");
154 return FDT_ADDR_T_NONE;
155 }
156
157 ns = fdt_size_cells(blob, parent);
158 if (ns < 0) {
159 debug("(bad #size-cells)\n");
160 return FDT_ADDR_T_NONE;
161 }
162
163 debug("na=%d, ns=%d, ", na, ns);
164
165 return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
166 ns, sizep, translate);
167 }
168
169 fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
170 const char *prop_name, int index,
171 fdt_size_t *sizep,
172 bool translate)
173 {
174 int parent;
175
176 debug("%s: ", __func__);
177
178 parent = fdt_parent_offset(blob, node);
179 if (parent < 0) {
180 debug("(no parent found)\n");
181 return FDT_ADDR_T_NONE;
182 }
183
184 return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
185 index, sizep, translate);
186 }
187
188 fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
189 const char *prop_name, fdt_size_t *sizep)
190 {
191 int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
192
193 return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
194 sizeof(fdt_addr_t) / sizeof(fdt32_t),
195 ns, sizep, false);
196 }
197
198 fdt_addr_t fdtdec_get_addr(const void *blob, int node, const char *prop_name)
199 {
200 return fdtdec_get_addr_size(blob, node, prop_name, NULL);
201 }
202
203 #if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI)
204 int fdtdec_get_pci_addr(const void *blob, int node, enum fdt_pci_space type,
205 const char *prop_name, struct fdt_pci_addr *addr)
206 {
207 const u32 *cell;
208 int len;
209 int ret = -ENOENT;
210
211 debug("%s: %s: ", __func__, prop_name);
212
213 /*
214 * If we follow the pci bus bindings strictly, we should check
215 * the value of the node's parent node's #address-cells and
216 * #size-cells. They need to be 3 and 2 accordingly. However,
217 * for simplicity we skip the check here.
218 */
219 cell = fdt_getprop(blob, node, prop_name, &len);
220 if (!cell)
221 goto fail;
222
223 if ((len % FDT_PCI_REG_SIZE) == 0) {
224 int num = len / FDT_PCI_REG_SIZE;
225 int i;
226
227 for (i = 0; i < num; i++) {
228 debug("pci address #%d: %08lx %08lx %08lx\n", i,
229 (ulong)fdt32_to_cpu(cell[0]),
230 (ulong)fdt32_to_cpu(cell[1]),
231 (ulong)fdt32_to_cpu(cell[2]));
232 if ((fdt32_to_cpu(*cell) & type) == type) {
233 addr->phys_hi = fdt32_to_cpu(cell[0]);
234 addr->phys_mid = fdt32_to_cpu(cell[1]);
235 addr->phys_lo = fdt32_to_cpu(cell[1]);
236 break;
237 }
238
239 cell += (FDT_PCI_ADDR_CELLS +
240 FDT_PCI_SIZE_CELLS);
241 }
242
243 if (i == num) {
244 ret = -ENXIO;
245 goto fail;
246 }
247
248 return 0;
249 }
250
251 ret = -EINVAL;
252
253 fail:
254 debug("(not found)\n");
255 return ret;
256 }
257
258 int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
259 {
260 const char *list, *end;
261 int len;
262
263 list = fdt_getprop(blob, node, "compatible", &len);
264 if (!list)
265 return -ENOENT;
266
267 end = list + len;
268 while (list < end) {
269 len = strlen(list);
270 if (len >= strlen("pciVVVV,DDDD")) {
271 char *s = strstr(list, "pci");
272
273 /*
274 * check if the string is something like pciVVVV,DDDD.RR
275 * or just pciVVVV,DDDD
276 */
277 if (s && s[7] == ',' &&
278 (s[12] == '.' || s[12] == 0)) {
279 s += 3;
280 *vendor = simple_strtol(s, NULL, 16);
281
282 s += 5;
283 *device = simple_strtol(s, NULL, 16);
284
285 return 0;
286 }
287 }
288 list += (len + 1);
289 }
290
291 return -ENOENT;
292 }
293
294 int fdtdec_get_pci_bar32(struct udevice *dev, struct fdt_pci_addr *addr,
295 u32 *bar)
296 {
297 int barnum;
298
299 /* extract the bar number from fdt_pci_addr */
300 barnum = addr->phys_hi & 0xff;
301 if (barnum < PCI_BASE_ADDRESS_0 || barnum > PCI_CARDBUS_CIS)
302 return -EINVAL;
303
304 barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
305 *bar = dm_pci_read_bar32(dev, barnum);
306
307 return 0;
308 }
309 #endif
310
311 uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
312 uint64_t default_val)
313 {
314 const uint64_t *cell64;
315 int length;
316
317 cell64 = fdt_getprop(blob, node, prop_name, &length);
318 if (!cell64 || length < sizeof(*cell64))
319 return default_val;
320
321 return fdt64_to_cpu(*cell64);
322 }
323
324 int fdtdec_get_is_enabled(const void *blob, int node)
325 {
326 const char *cell;
327
328 /*
329 * It should say "okay", so only allow that. Some fdts use "ok" but
330 * this is a bug. Please fix your device tree source file. See here
331 * for discussion:
332 *
333 * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
334 */
335 cell = fdt_getprop(blob, node, "status", NULL);
336 if (cell)
337 return strcmp(cell, "okay") == 0;
338 return 1;
339 }
340
341 enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
342 {
343 enum fdt_compat_id id;
344
345 /* Search our drivers */
346 for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
347 if (fdt_node_check_compatible(blob, node,
348 compat_names[id]) == 0)
349 return id;
350 return COMPAT_UNKNOWN;
351 }
352
353 int fdtdec_next_compatible(const void *blob, int node, enum fdt_compat_id id)
354 {
355 return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
356 }
357
358 int fdtdec_next_compatible_subnode(const void *blob, int node,
359 enum fdt_compat_id id, int *depthp)
360 {
361 do {
362 node = fdt_next_node(blob, node, depthp);
363 } while (*depthp > 1);
364
365 /* If this is a direct subnode, and compatible, return it */
366 if (*depthp == 1 && 0 == fdt_node_check_compatible(
367 blob, node, compat_names[id]))
368 return node;
369
370 return -FDT_ERR_NOTFOUND;
371 }
372
373 int fdtdec_next_alias(const void *blob, const char *name, enum fdt_compat_id id,
374 int *upto)
375 {
376 #define MAX_STR_LEN 20
377 char str[MAX_STR_LEN + 20];
378 int node, err;
379
380 /* snprintf() is not available */
381 assert(strlen(name) < MAX_STR_LEN);
382 sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
383 node = fdt_path_offset(blob, str);
384 if (node < 0)
385 return node;
386 err = fdt_node_check_compatible(blob, node, compat_names[id]);
387 if (err < 0)
388 return err;
389 if (err)
390 return -FDT_ERR_NOTFOUND;
391 (*upto)++;
392 return node;
393 }
394
395 int fdtdec_find_aliases_for_id(const void *blob, const char *name,
396 enum fdt_compat_id id, int *node_list,
397 int maxcount)
398 {
399 memset(node_list, '\0', sizeof(*node_list) * maxcount);
400
401 return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
402 }
403
404 /* TODO: Can we tighten this code up a little? */
405 int fdtdec_add_aliases_for_id(const void *blob, const char *name,
406 enum fdt_compat_id id, int *node_list,
407 int maxcount)
408 {
409 int name_len = strlen(name);
410 int nodes[maxcount];
411 int num_found = 0;
412 int offset, node;
413 int alias_node;
414 int count;
415 int i, j;
416
417 /* find the alias node if present */
418 alias_node = fdt_path_offset(blob, "/aliases");
419
420 /*
421 * start with nothing, and we can assume that the root node can't
422 * match
423 */
424 memset(nodes, '\0', sizeof(nodes));
425
426 /* First find all the compatible nodes */
427 for (node = count = 0; node >= 0 && count < maxcount;) {
428 node = fdtdec_next_compatible(blob, node, id);
429 if (node >= 0)
430 nodes[count++] = node;
431 }
432 if (node >= 0)
433 debug("%s: warning: maxcount exceeded with alias '%s'\n",
434 __func__, name);
435
436 /* Now find all the aliases */
437 for (offset = fdt_first_property_offset(blob, alias_node);
438 offset > 0;
439 offset = fdt_next_property_offset(blob, offset)) {
440 const struct fdt_property *prop;
441 const char *path;
442 int number;
443 int found;
444
445 node = 0;
446 prop = fdt_get_property_by_offset(blob, offset, NULL);
447 path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
448 if (prop->len && 0 == strncmp(path, name, name_len))
449 node = fdt_path_offset(blob, prop->data);
450 if (node <= 0)
451 continue;
452
453 /* Get the alias number */
454 number = simple_strtoul(path + name_len, NULL, 10);
455 if (number < 0 || number >= maxcount) {
456 debug("%s: warning: alias '%s' is out of range\n",
457 __func__, path);
458 continue;
459 }
460
461 /* Make sure the node we found is actually in our list! */
462 found = -1;
463 for (j = 0; j < count; j++)
464 if (nodes[j] == node) {
465 found = j;
466 break;
467 }
468
469 if (found == -1) {
470 debug("%s: warning: alias '%s' points to a node "
471 "'%s' that is missing or is not compatible "
472 " with '%s'\n", __func__, path,
473 fdt_get_name(blob, node, NULL),
474 compat_names[id]);
475 continue;
476 }
477
478 /*
479 * Add this node to our list in the right place, and mark
480 * it as done.
481 */
482 if (fdtdec_get_is_enabled(blob, node)) {
483 if (node_list[number]) {
484 debug("%s: warning: alias '%s' requires that "
485 "a node be placed in the list in a "
486 "position which is already filled by "
487 "node '%s'\n", __func__, path,
488 fdt_get_name(blob, node, NULL));
489 continue;
490 }
491 node_list[number] = node;
492 if (number >= num_found)
493 num_found = number + 1;
494 }
495 nodes[found] = 0;
496 }
497
498 /* Add any nodes not mentioned by an alias */
499 for (i = j = 0; i < maxcount; i++) {
500 if (!node_list[i]) {
501 for (; j < maxcount; j++)
502 if (nodes[j] &&
503 fdtdec_get_is_enabled(blob, nodes[j]))
504 break;
505
506 /* Have we run out of nodes to add? */
507 if (j == maxcount)
508 break;
509
510 assert(!node_list[i]);
511 node_list[i] = nodes[j++];
512 if (i >= num_found)
513 num_found = i + 1;
514 }
515 }
516
517 return num_found;
518 }
519
520 int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
521 int *seqp)
522 {
523 int base_len = strlen(base);
524 const char *find_name;
525 int find_namelen;
526 int prop_offset;
527 int aliases;
528
529 find_name = fdt_get_name(blob, offset, &find_namelen);
530 debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
531
532 aliases = fdt_path_offset(blob, "/aliases");
533 for (prop_offset = fdt_first_property_offset(blob, aliases);
534 prop_offset > 0;
535 prop_offset = fdt_next_property_offset(blob, prop_offset)) {
536 const char *prop;
537 const char *name;
538 const char *slash;
539 int len, val;
540
541 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
542 debug(" - %s, %s\n", name, prop);
543 if (len < find_namelen || *prop != '/' || prop[len - 1] ||
544 strncmp(name, base, base_len))
545 continue;
546
547 slash = strrchr(prop, '/');
548 if (strcmp(slash + 1, find_name))
549 continue;
550 val = trailing_strtol(name);
551 if (val != -1) {
552 *seqp = val;
553 debug("Found seq %d\n", *seqp);
554 return 0;
555 }
556 }
557
558 debug("Not found\n");
559 return -ENOENT;
560 }
561
562 const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
563 {
564 int chosen_node;
565
566 if (!blob)
567 return NULL;
568 chosen_node = fdt_path_offset(blob, "/chosen");
569 return fdt_getprop(blob, chosen_node, name, NULL);
570 }
571
572 int fdtdec_get_chosen_node(const void *blob, const char *name)
573 {
574 const char *prop;
575
576 prop = fdtdec_get_chosen_prop(blob, name);
577 if (!prop)
578 return -FDT_ERR_NOTFOUND;
579 return fdt_path_offset(blob, prop);
580 }
581
582 int fdtdec_check_fdt(void)
583 {
584 /*
585 * We must have an FDT, but we cannot panic() yet since the console
586 * is not ready. So for now, just assert(). Boards which need an early
587 * FDT (prior to console ready) will need to make their own
588 * arrangements and do their own checks.
589 */
590 assert(!fdtdec_prepare_fdt());
591 return 0;
592 }
593
594 /*
595 * This function is a little odd in that it accesses global data. At some
596 * point if the architecture board.c files merge this will make more sense.
597 * Even now, it is common code.
598 */
599 int fdtdec_prepare_fdt(void)
600 {
601 if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
602 fdt_check_header(gd->fdt_blob)) {
603 #ifdef CONFIG_SPL_BUILD
604 puts("Missing DTB\n");
605 #else
606 puts("No valid device tree binary found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d <file.dtb>\n");
607 # ifdef DEBUG
608 if (gd->fdt_blob) {
609 printf("fdt_blob=%p\n", gd->fdt_blob);
610 print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
611 32, 0);
612 }
613 # endif
614 #endif
615 return -1;
616 }
617 return 0;
618 }
619
620 int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
621 {
622 const u32 *phandle;
623 int lookup;
624
625 debug("%s: %s\n", __func__, prop_name);
626 phandle = fdt_getprop(blob, node, prop_name, NULL);
627 if (!phandle)
628 return -FDT_ERR_NOTFOUND;
629
630 lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
631 return lookup;
632 }
633
634 /**
635 * Look up a property in a node and check that it has a minimum length.
636 *
637 * @param blob FDT blob
638 * @param node node to examine
639 * @param prop_name name of property to find
640 * @param min_len minimum property length in bytes
641 * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
642 found, or -FDT_ERR_BADLAYOUT if not enough data
643 * @return pointer to cell, which is only valid if err == 0
644 */
645 static const void *get_prop_check_min_len(const void *blob, int node,
646 const char *prop_name, int min_len,
647 int *err)
648 {
649 const void *cell;
650 int len;
651
652 debug("%s: %s\n", __func__, prop_name);
653 cell = fdt_getprop(blob, node, prop_name, &len);
654 if (!cell)
655 *err = -FDT_ERR_NOTFOUND;
656 else if (len < min_len)
657 *err = -FDT_ERR_BADLAYOUT;
658 else
659 *err = 0;
660 return cell;
661 }
662
663 int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
664 u32 *array, int count)
665 {
666 const u32 *cell;
667 int err = 0;
668
669 debug("%s: %s\n", __func__, prop_name);
670 cell = get_prop_check_min_len(blob, node, prop_name,
671 sizeof(u32) * count, &err);
672 if (!err) {
673 int i;
674
675 for (i = 0; i < count; i++)
676 array[i] = fdt32_to_cpu(cell[i]);
677 }
678 return err;
679 }
680
681 int fdtdec_get_int_array_count(const void *blob, int node,
682 const char *prop_name, u32 *array, int count)
683 {
684 const u32 *cell;
685 int len, elems;
686 int i;
687
688 debug("%s: %s\n", __func__, prop_name);
689 cell = fdt_getprop(blob, node, prop_name, &len);
690 if (!cell)
691 return -FDT_ERR_NOTFOUND;
692 elems = len / sizeof(u32);
693 if (count > elems)
694 count = elems;
695 for (i = 0; i < count; i++)
696 array[i] = fdt32_to_cpu(cell[i]);
697
698 return count;
699 }
700
701 const u32 *fdtdec_locate_array(const void *blob, int node,
702 const char *prop_name, int count)
703 {
704 const u32 *cell;
705 int err;
706
707 cell = get_prop_check_min_len(blob, node, prop_name,
708 sizeof(u32) * count, &err);
709 return err ? NULL : cell;
710 }
711
712 int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
713 {
714 const s32 *cell;
715 int len;
716
717 debug("%s: %s\n", __func__, prop_name);
718 cell = fdt_getprop(blob, node, prop_name, &len);
719 return cell != NULL;
720 }
721
722 int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
723 const char *list_name,
724 const char *cells_name,
725 int cell_count, int index,
726 struct fdtdec_phandle_args *out_args)
727 {
728 const __be32 *list, *list_end;
729 int rc = 0, size, cur_index = 0;
730 uint32_t count = 0;
731 int node = -1;
732 int phandle;
733
734 /* Retrieve the phandle list property */
735 list = fdt_getprop(blob, src_node, list_name, &size);
736 if (!list)
737 return -ENOENT;
738 list_end = list + size / sizeof(*list);
739
740 /* Loop over the phandles until all the requested entry is found */
741 while (list < list_end) {
742 rc = -EINVAL;
743 count = 0;
744
745 /*
746 * If phandle is 0, then it is an empty entry with no
747 * arguments. Skip forward to the next entry.
748 */
749 phandle = be32_to_cpup(list++);
750 if (phandle) {
751 /*
752 * Find the provider node and parse the #*-cells
753 * property to determine the argument length.
754 *
755 * This is not needed if the cell count is hard-coded
756 * (i.e. cells_name not set, but cell_count is set),
757 * except when we're going to return the found node
758 * below.
759 */
760 if (cells_name || cur_index == index) {
761 node = fdt_node_offset_by_phandle(blob,
762 phandle);
763 if (!node) {
764 debug("%s: could not find phandle\n",
765 fdt_get_name(blob, src_node,
766 NULL));
767 goto err;
768 }
769 }
770
771 if (cells_name) {
772 count = fdtdec_get_int(blob, node, cells_name,
773 -1);
774 if (count == -1) {
775 debug("%s: could not get %s for %s\n",
776 fdt_get_name(blob, src_node,
777 NULL),
778 cells_name,
779 fdt_get_name(blob, node,
780 NULL));
781 goto err;
782 }
783 } else {
784 count = cell_count;
785 }
786
787 /*
788 * Make sure that the arguments actually fit in the
789 * remaining property data length
790 */
791 if (list + count > list_end) {
792 debug("%s: arguments longer than property\n",
793 fdt_get_name(blob, src_node, NULL));
794 goto err;
795 }
796 }
797
798 /*
799 * All of the error cases above bail out of the loop, so at
800 * this point, the parsing is successful. If the requested
801 * index matches, then fill the out_args structure and return,
802 * or return -ENOENT for an empty entry.
803 */
804 rc = -ENOENT;
805 if (cur_index == index) {
806 if (!phandle)
807 goto err;
808
809 if (out_args) {
810 int i;
811
812 if (count > MAX_PHANDLE_ARGS) {
813 debug("%s: too many arguments %d\n",
814 fdt_get_name(blob, src_node,
815 NULL), count);
816 count = MAX_PHANDLE_ARGS;
817 }
818 out_args->node = node;
819 out_args->args_count = count;
820 for (i = 0; i < count; i++) {
821 out_args->args[i] =
822 be32_to_cpup(list++);
823 }
824 }
825
826 /* Found it! return success */
827 return 0;
828 }
829
830 node = -1;
831 list += count;
832 cur_index++;
833 }
834
835 /*
836 * Result will be one of:
837 * -ENOENT : index is for empty phandle
838 * -EINVAL : parsing error on data
839 * [1..n] : Number of phandle (count mode; when index = -1)
840 */
841 rc = index < 0 ? cur_index : -ENOENT;
842 err:
843 return rc;
844 }
845
846 int fdtdec_get_child_count(const void *blob, int node)
847 {
848 int subnode;
849 int num = 0;
850
851 fdt_for_each_subnode(subnode, blob, node)
852 num++;
853
854 return num;
855 }
856
857 int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
858 u8 *array, int count)
859 {
860 const u8 *cell;
861 int err;
862
863 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
864 if (!err)
865 memcpy(array, cell, count);
866 return err;
867 }
868
869 const u8 *fdtdec_locate_byte_array(const void *blob, int node,
870 const char *prop_name, int count)
871 {
872 const u8 *cell;
873 int err;
874
875 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
876 if (err)
877 return NULL;
878 return cell;
879 }
880
881 int fdtdec_get_config_int(const void *blob, const char *prop_name,
882 int default_val)
883 {
884 int config_node;
885
886 debug("%s: %s\n", __func__, prop_name);
887 config_node = fdt_path_offset(blob, "/config");
888 if (config_node < 0)
889 return default_val;
890 return fdtdec_get_int(blob, config_node, prop_name, default_val);
891 }
892
893 int fdtdec_get_config_bool(const void *blob, const char *prop_name)
894 {
895 int config_node;
896 const void *prop;
897
898 debug("%s: %s\n", __func__, prop_name);
899 config_node = fdt_path_offset(blob, "/config");
900 if (config_node < 0)
901 return 0;
902 prop = fdt_get_property(blob, config_node, prop_name, NULL);
903
904 return prop != NULL;
905 }
906
907 char *fdtdec_get_config_string(const void *blob, const char *prop_name)
908 {
909 const char *nodep;
910 int nodeoffset;
911 int len;
912
913 debug("%s: %s\n", __func__, prop_name);
914 nodeoffset = fdt_path_offset(blob, "/config");
915 if (nodeoffset < 0)
916 return NULL;
917
918 nodep = fdt_getprop(blob, nodeoffset, prop_name, &len);
919 if (!nodep)
920 return NULL;
921
922 return (char *)nodep;
923 }
924
925 int fdtdec_decode_region(const void *blob, int node, const char *prop_name,
926 fdt_addr_t *basep, fdt_size_t *sizep)
927 {
928 const fdt_addr_t *cell;
929 int len;
930
931 debug("%s: %s: %s\n", __func__, fdt_get_name(blob, node, NULL),
932 prop_name);
933 cell = fdt_getprop(blob, node, prop_name, &len);
934 if (!cell || (len < sizeof(fdt_addr_t) * 2)) {
935 debug("cell=%p, len=%d\n", cell, len);
936 return -1;
937 }
938
939 *basep = fdt_addr_to_cpu(*cell);
940 *sizep = fdt_size_to_cpu(cell[1]);
941 debug("%s: base=%08lx, size=%lx\n", __func__, (ulong)*basep,
942 (ulong)*sizep);
943
944 return 0;
945 }
946
947 u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
948 {
949 u64 number = 0;
950
951 while (cells--)
952 number = (number << 32) | fdt32_to_cpu(*ptr++);
953
954 return number;
955 }
956
957 int fdt_get_resource(const void *fdt, int node, const char *property,
958 unsigned int index, struct fdt_resource *res)
959 {
960 const fdt32_t *ptr, *end;
961 int na, ns, len, parent;
962 unsigned int i = 0;
963
964 parent = fdt_parent_offset(fdt, node);
965 if (parent < 0)
966 return parent;
967
968 na = fdt_address_cells(fdt, parent);
969 ns = fdt_size_cells(fdt, parent);
970
971 ptr = fdt_getprop(fdt, node, property, &len);
972 if (!ptr)
973 return len;
974
975 end = ptr + len / sizeof(*ptr);
976
977 while (ptr + na + ns <= end) {
978 if (i == index) {
979 res->start = fdtdec_get_number(ptr, na);
980 res->end = res->start;
981 res->end += fdtdec_get_number(&ptr[na], ns) - 1;
982 return 0;
983 }
984
985 ptr += na + ns;
986 i++;
987 }
988
989 return -FDT_ERR_NOTFOUND;
990 }
991
992 int fdt_get_named_resource(const void *fdt, int node, const char *property,
993 const char *prop_names, const char *name,
994 struct fdt_resource *res)
995 {
996 int index;
997
998 index = fdt_stringlist_search(fdt, node, prop_names, name);
999 if (index < 0)
1000 return index;
1001
1002 return fdt_get_resource(fdt, node, property, index, res);
1003 }
1004
1005 int fdtdec_decode_memory_region(const void *blob, int config_node,
1006 const char *mem_type, const char *suffix,
1007 fdt_addr_t *basep, fdt_size_t *sizep)
1008 {
1009 char prop_name[50];
1010 const char *mem;
1011 fdt_size_t size, offset_size;
1012 fdt_addr_t base, offset;
1013 int node;
1014
1015 if (config_node == -1) {
1016 config_node = fdt_path_offset(blob, "/config");
1017 if (config_node < 0) {
1018 debug("%s: Cannot find /config node\n", __func__);
1019 return -ENOENT;
1020 }
1021 }
1022 if (!suffix)
1023 suffix = "";
1024
1025 snprintf(prop_name, sizeof(prop_name), "%s-memory%s", mem_type,
1026 suffix);
1027 mem = fdt_getprop(blob, config_node, prop_name, NULL);
1028 if (!mem) {
1029 debug("%s: No memory type for '%s', using /memory\n", __func__,
1030 prop_name);
1031 mem = "/memory";
1032 }
1033
1034 node = fdt_path_offset(blob, mem);
1035 if (node < 0) {
1036 debug("%s: Failed to find node '%s': %s\n", __func__, mem,
1037 fdt_strerror(node));
1038 return -ENOENT;
1039 }
1040
1041 /*
1042 * Not strictly correct - the memory may have multiple banks. We just
1043 * use the first
1044 */
1045 if (fdtdec_decode_region(blob, node, "reg", &base, &size)) {
1046 debug("%s: Failed to decode memory region %s\n", __func__,
1047 mem);
1048 return -EINVAL;
1049 }
1050
1051 snprintf(prop_name, sizeof(prop_name), "%s-offset%s", mem_type,
1052 suffix);
1053 if (fdtdec_decode_region(blob, config_node, prop_name, &offset,
1054 &offset_size)) {
1055 debug("%s: Failed to decode memory region '%s'\n", __func__,
1056 prop_name);
1057 return -EINVAL;
1058 }
1059
1060 *basep = base + offset;
1061 *sizep = offset_size;
1062
1063 return 0;
1064 }
1065
1066 static int decode_timing_property(const void *blob, int node, const char *name,
1067 struct timing_entry *result)
1068 {
1069 int length, ret = 0;
1070 const u32 *prop;
1071
1072 prop = fdt_getprop(blob, node, name, &length);
1073 if (!prop) {
1074 debug("%s: could not find property %s\n",
1075 fdt_get_name(blob, node, NULL), name);
1076 return length;
1077 }
1078
1079 if (length == sizeof(u32)) {
1080 result->typ = fdtdec_get_int(blob, node, name, 0);
1081 result->min = result->typ;
1082 result->max = result->typ;
1083 } else {
1084 ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
1085 }
1086
1087 return ret;
1088 }
1089
1090 int fdtdec_decode_display_timing(const void *blob, int parent, int index,
1091 struct display_timing *dt)
1092 {
1093 int i, node, timings_node;
1094 u32 val = 0;
1095 int ret = 0;
1096
1097 timings_node = fdt_subnode_offset(blob, parent, "display-timings");
1098 if (timings_node < 0)
1099 return timings_node;
1100
1101 for (i = 0, node = fdt_first_subnode(blob, timings_node);
1102 node > 0 && i != index;
1103 node = fdt_next_subnode(blob, node))
1104 i++;
1105
1106 if (node < 0)
1107 return node;
1108
1109 memset(dt, 0, sizeof(*dt));
1110
1111 ret |= decode_timing_property(blob, node, "hback-porch",
1112 &dt->hback_porch);
1113 ret |= decode_timing_property(blob, node, "hfront-porch",
1114 &dt->hfront_porch);
1115 ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
1116 ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
1117 ret |= decode_timing_property(blob, node, "vback-porch",
1118 &dt->vback_porch);
1119 ret |= decode_timing_property(blob, node, "vfront-porch",
1120 &dt->vfront_porch);
1121 ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
1122 ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
1123 ret |= decode_timing_property(blob, node, "clock-frequency",
1124 &dt->pixelclock);
1125
1126 dt->flags = 0;
1127 val = fdtdec_get_int(blob, node, "vsync-active", -1);
1128 if (val != -1) {
1129 dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
1130 DISPLAY_FLAGS_VSYNC_LOW;
1131 }
1132 val = fdtdec_get_int(blob, node, "hsync-active", -1);
1133 if (val != -1) {
1134 dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
1135 DISPLAY_FLAGS_HSYNC_LOW;
1136 }
1137 val = fdtdec_get_int(blob, node, "de-active", -1);
1138 if (val != -1) {
1139 dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
1140 DISPLAY_FLAGS_DE_LOW;
1141 }
1142 val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
1143 if (val != -1) {
1144 dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
1145 DISPLAY_FLAGS_PIXDATA_NEGEDGE;
1146 }
1147
1148 if (fdtdec_get_bool(blob, node, "interlaced"))
1149 dt->flags |= DISPLAY_FLAGS_INTERLACED;
1150 if (fdtdec_get_bool(blob, node, "doublescan"))
1151 dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
1152 if (fdtdec_get_bool(blob, node, "doubleclk"))
1153 dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
1154
1155 return ret;
1156 }
1157
1158 int fdtdec_setup_memory_size(void)
1159 {
1160 int ret, mem;
1161 struct fdt_resource res;
1162
1163 mem = fdt_path_offset(gd->fdt_blob, "/memory");
1164 if (mem < 0) {
1165 debug("%s: Missing /memory node\n", __func__);
1166 return -EINVAL;
1167 }
1168
1169 ret = fdt_get_resource(gd->fdt_blob, mem, "reg", 0, &res);
1170 if (ret != 0) {
1171 debug("%s: Unable to decode first memory bank\n", __func__);
1172 return -EINVAL;
1173 }
1174
1175 gd->ram_size = (phys_size_t)(res.end - res.start + 1);
1176 debug("%s: Initial DRAM size %llx\n", __func__,
1177 (unsigned long long)gd->ram_size);
1178
1179 return 0;
1180 }
1181
1182 #if defined(CONFIG_NR_DRAM_BANKS)
1183 int fdtdec_setup_memory_banksize(void)
1184 {
1185 int bank, ret, mem, reg = 0;
1186 struct fdt_resource res;
1187
1188 mem = fdt_node_offset_by_prop_value(gd->fdt_blob, -1, "device_type",
1189 "memory", 7);
1190 if (mem < 0) {
1191 debug("%s: Missing /memory node\n", __func__);
1192 return -EINVAL;
1193 }
1194
1195 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1196 ret = fdt_get_resource(gd->fdt_blob, mem, "reg", reg++, &res);
1197 if (ret == -FDT_ERR_NOTFOUND) {
1198 reg = 0;
1199 mem = fdt_node_offset_by_prop_value(gd->fdt_blob, mem,
1200 "device_type",
1201 "memory", 7);
1202 if (mem == -FDT_ERR_NOTFOUND)
1203 break;
1204
1205 ret = fdt_get_resource(gd->fdt_blob, mem, "reg", reg++, &res);
1206 if (ret == -FDT_ERR_NOTFOUND)
1207 break;
1208 }
1209 if (ret != 0) {
1210 return -EINVAL;
1211 }
1212
1213 gd->bd->bi_dram[bank].start = (phys_addr_t)res.start;
1214 gd->bd->bi_dram[bank].size =
1215 (phys_size_t)(res.end - res.start + 1);
1216
1217 debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
1218 __func__, bank,
1219 (unsigned long long)gd->bd->bi_dram[bank].start,
1220 (unsigned long long)gd->bd->bi_dram[bank].size);
1221 }
1222
1223 return 0;
1224 }
1225 #endif
1226
1227 #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1228 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\
1229 CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO)
1230 static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
1231 {
1232 size_t sz_out = CONFIG_SPL_MULTI_DTB_FIT_UNCOMPRESS_SZ;
1233 ulong sz_in = sz_src;
1234 void *dst;
1235 int rc;
1236
1237 if (CONFIG_IS_ENABLED(GZIP))
1238 if (gzip_parse_header(src, sz_in) < 0)
1239 return -1;
1240 if (CONFIG_IS_ENABLED(LZO))
1241 if (!lzop_is_valid_header(src))
1242 return -EBADMSG;
1243
1244 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) {
1245 dst = malloc(sz_out);
1246 if (!dst) {
1247 puts("uncompress_blob: Unable to allocate memory\n");
1248 return -ENOMEM;
1249 }
1250 } else {
1251 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA)
1252 dst = (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR);
1253 # else
1254 return -ENOTSUPP;
1255 # endif
1256 }
1257
1258 if (CONFIG_IS_ENABLED(GZIP))
1259 rc = gunzip(dst, sz_out, (u8 *)src, &sz_in);
1260 else if (CONFIG_IS_ENABLED(LZO))
1261 rc = lzop_decompress(src, sz_in, dst, &sz_out);
1262
1263 if (rc < 0) {
1264 /* not a valid compressed blob */
1265 puts("uncompress_blob: Unable to uncompress\n");
1266 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC))
1267 free(dst);
1268 return -EBADMSG;
1269 }
1270 *dstp = dst;
1271 return 0;
1272 }
1273 # else
1274 static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
1275 {
1276 return -ENOTSUPP;
1277 }
1278 # endif
1279 #endif
1280
1281 #if defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
1282 /*
1283 * For CONFIG_OF_SEPARATE, the board may optionally implement this to
1284 * provide and/or fixup the fdt.
1285 */
1286 __weak void *board_fdt_blob_setup(void)
1287 {
1288 void *fdt_blob = NULL;
1289 #ifdef CONFIG_SPL_BUILD
1290 /* FDT is at end of BSS unless it is in a different memory region */
1291 if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
1292 fdt_blob = (ulong *)&_image_binary_end;
1293 else
1294 fdt_blob = (ulong *)&__bss_end;
1295 #else
1296 /* FDT is at end of image */
1297 fdt_blob = (ulong *)&_end;
1298 #endif
1299 return fdt_blob;
1300 }
1301 #endif
1302
1303 int fdtdec_setup(void)
1304 {
1305 #if CONFIG_IS_ENABLED(OF_CONTROL)
1306 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1307 void *fdt_blob;
1308 # endif
1309 # ifdef CONFIG_OF_EMBED
1310 /* Get a pointer to the FDT */
1311 # ifdef CONFIG_SPL_BUILD
1312 gd->fdt_blob = __dtb_dt_spl_begin;
1313 # else
1314 gd->fdt_blob = __dtb_dt_begin;
1315 # endif
1316 # elif defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
1317 /* Allow the board to override the fdt address. */
1318 gd->fdt_blob = board_fdt_blob_setup();
1319 # elif defined(CONFIG_OF_HOSTFILE)
1320 if (sandbox_read_fdt_from_file()) {
1321 puts("Failed to read control FDT\n");
1322 return -1;
1323 }
1324 # endif
1325 # ifndef CONFIG_SPL_BUILD
1326 /* Allow the early environment to override the fdt address */
1327 gd->fdt_blob = (void *)env_get_ulong("fdtcontroladdr", 16,
1328 (uintptr_t)gd->fdt_blob);
1329 # endif
1330
1331 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1332 /*
1333 * Try and uncompress the blob.
1334 * Unfortunately there is no way to know how big the input blob really
1335 * is. So let us set the maximum input size arbitrarily high. 16MB
1336 * ought to be more than enough for packed DTBs.
1337 */
1338 if (uncompress_blob(gd->fdt_blob, 0x1000000, &fdt_blob) == 0)
1339 gd->fdt_blob = fdt_blob;
1340
1341 /*
1342 * Check if blob is a FIT images containings DTBs.
1343 * If so, pick the most relevant
1344 */
1345 fdt_blob = locate_dtb_in_fit(gd->fdt_blob);
1346 if (fdt_blob)
1347 gd->fdt_blob = fdt_blob;
1348 # endif
1349 #endif
1350
1351 return fdtdec_prepare_fdt();
1352 }
1353
1354 #ifdef CONFIG_NR_DRAM_BANKS
1355 int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id,
1356 phys_addr_t *basep, phys_size_t *sizep, bd_t *bd)
1357 {
1358 int addr_cells, size_cells;
1359 const u32 *cell, *end;
1360 u64 total_size, size, addr;
1361 int node, child;
1362 bool auto_size;
1363 int bank;
1364 int len;
1365
1366 debug("%s: board_id=%d\n", __func__, board_id);
1367 if (!area)
1368 area = "/memory";
1369 node = fdt_path_offset(blob, area);
1370 if (node < 0) {
1371 debug("No %s node found\n", area);
1372 return -ENOENT;
1373 }
1374
1375 cell = fdt_getprop(blob, node, "reg", &len);
1376 if (!cell) {
1377 debug("No reg property found\n");
1378 return -ENOENT;
1379 }
1380
1381 addr_cells = fdt_address_cells(blob, node);
1382 size_cells = fdt_size_cells(blob, node);
1383
1384 /* Check the board id and mask */
1385 for (child = fdt_first_subnode(blob, node);
1386 child >= 0;
1387 child = fdt_next_subnode(blob, child)) {
1388 int match_mask, match_value;
1389
1390 match_mask = fdtdec_get_int(blob, child, "match-mask", -1);
1391 match_value = fdtdec_get_int(blob, child, "match-value", -1);
1392
1393 if (match_value >= 0 &&
1394 ((board_id & match_mask) == match_value)) {
1395 /* Found matching mask */
1396 debug("Found matching mask %d\n", match_mask);
1397 node = child;
1398 cell = fdt_getprop(blob, node, "reg", &len);
1399 if (!cell) {
1400 debug("No memory-banks property found\n");
1401 return -EINVAL;
1402 }
1403 break;
1404 }
1405 }
1406 /* Note: if no matching subnode was found we use the parent node */
1407
1408 if (bd) {
1409 memset(bd->bi_dram, '\0', sizeof(bd->bi_dram[0]) *
1410 CONFIG_NR_DRAM_BANKS);
1411 }
1412
1413 auto_size = fdtdec_get_bool(blob, node, "auto-size");
1414
1415 total_size = 0;
1416 end = cell + len / 4 - addr_cells - size_cells;
1417 debug("cell at %p, end %p\n", cell, end);
1418 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1419 if (cell > end)
1420 break;
1421 addr = 0;
1422 if (addr_cells == 2)
1423 addr += (u64)fdt32_to_cpu(*cell++) << 32UL;
1424 addr += fdt32_to_cpu(*cell++);
1425 if (bd)
1426 bd->bi_dram[bank].start = addr;
1427 if (basep && !bank)
1428 *basep = (phys_addr_t)addr;
1429
1430 size = 0;
1431 if (size_cells == 2)
1432 size += (u64)fdt32_to_cpu(*cell++) << 32UL;
1433 size += fdt32_to_cpu(*cell++);
1434
1435 if (auto_size) {
1436 u64 new_size;
1437
1438 debug("Auto-sizing %" PRIx64 ", size %" PRIx64 ": ",
1439 addr, size);
1440 new_size = get_ram_size((long *)(uintptr_t)addr, size);
1441 if (new_size == size) {
1442 debug("OK\n");
1443 } else {
1444 debug("sized to %" PRIx64 "\n", new_size);
1445 size = new_size;
1446 }
1447 }
1448
1449 if (bd)
1450 bd->bi_dram[bank].size = size;
1451 total_size += size;
1452 }
1453
1454 debug("Memory size %" PRIu64 "\n", total_size);
1455 if (sizep)
1456 *sizep = (phys_size_t)total_size;
1457
1458 return 0;
1459 }
1460 #endif /* CONFIG_NR_DRAM_BANKS */
1461
1462 #endif /* !USE_HOSTCC */
Broadcom-s U-Boot