Sanitise includes across codebase
[project/bcm63xx/atf.git] / lib / locks / bakery / bakery_lock_normal.c
1 /*
2 * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include <assert.h>
8 #include <string.h>
9
10 #include <arch_helpers.h>
11 #include <lib/bakery_lock.h>
12 #include <lib/el3_runtime/cpu_data.h>
13 #include <lib/utils_def.h>
14 #include <plat/common/platform.h>
15
16 /*
17 * Functions in this file implement Bakery Algorithm for mutual exclusion with the
18 * bakery lock data structures in cacheable and Normal memory.
19 *
20 * ARM architecture offers a family of exclusive access instructions to
21 * efficiently implement mutual exclusion with hardware support. However, as
22 * well as depending on external hardware, these instructions have defined
23 * behavior only on certain memory types (cacheable and Normal memory in
24 * particular; see ARMv8 Architecture Reference Manual section B2.10). Use cases
25 * in trusted firmware are such that mutual exclusion implementation cannot
26 * expect that accesses to the lock have the specific type required by the
27 * architecture for these primitives to function (for example, not all
28 * contenders may have address translation enabled).
29 *
30 * This implementation does not use mutual exclusion primitives. It expects
31 * memory regions where the locks reside to be cacheable and Normal.
32 *
33 * Note that the ARM architecture guarantees single-copy atomicity for aligned
34 * accesses regardless of status of address translation.
35 */
36
37 #ifdef PLAT_PERCPU_BAKERY_LOCK_SIZE
38 /*
39 * Verify that the platform defined value for the per-cpu space for bakery locks is
40 * a multiple of the cache line size, to prevent multiple CPUs writing to the same
41 * bakery lock cache line
42 *
43 * Using this value, if provided, rather than the linker generated value results in
44 * more efficient code
45 */
46 CASSERT((PLAT_PERCPU_BAKERY_LOCK_SIZE & (CACHE_WRITEBACK_GRANULE - 1)) == 0, \
47 PLAT_PERCPU_BAKERY_LOCK_SIZE_not_cacheline_multiple);
48 #define PERCPU_BAKERY_LOCK_SIZE (PLAT_PERCPU_BAKERY_LOCK_SIZE)
49 #else
50 /*
51 * Use the linker defined symbol which has evaluated the size reqiurement.
52 * This is not as efficient as using a platform defined constant
53 */
54 IMPORT_SYM(uintptr_t, __PERCPU_BAKERY_LOCK_SIZE__, PERCPU_BAKERY_LOCK_SIZE);
55 #endif
56
57 static inline bakery_lock_t *get_bakery_info(unsigned int cpu_ix,
58 bakery_lock_t *lock)
59 {
60 return (bakery_info_t *)((uintptr_t)lock +
61 cpu_ix * PERCPU_BAKERY_LOCK_SIZE);
62 }
63
64 static inline void write_cache_op(uintptr_t addr, bool cached)
65 {
66 if (cached)
67 dccvac(addr);
68 else
69 dcivac(addr);
70
71 dsbish();
72 }
73
74 static inline void read_cache_op(uintptr_t addr, bool cached)
75 {
76 if (cached)
77 dccivac(addr);
78 }
79
80 /* Helper function to check if the lock is acquired */
81 static inline bool is_lock_acquired(const bakery_info_t *my_bakery_info,
82 int is_cached)
83 {
84 /*
85 * Even though lock data is updated only by the owning cpu and
86 * appropriate cache maintenance operations are performed,
87 * if the previous update was done when the cpu was not participating
88 * in coherency, then there is a chance that cache maintenance
89 * operations were not propagated to all the caches in the system.
90 * Hence do a `read_cache_op()` prior to read.
91 */
92 read_cache_op((uintptr_t)my_bakery_info, is_cached);
93 return bakery_ticket_number(my_bakery_info->lock_data) != 0U;
94 }
95
96 static unsigned int bakery_get_ticket(bakery_lock_t *lock,
97 unsigned int me, int is_cached)
98 {
99 unsigned int my_ticket, their_ticket;
100 unsigned int they;
101 bakery_info_t *my_bakery_info, *their_bakery_info;
102
103 /*
104 * Obtain a reference to the bakery information for this cpu and ensure
105 * it is not NULL.
106 */
107 my_bakery_info = get_bakery_info(me, lock);
108 assert(my_bakery_info != NULL);
109
110 /* Prevent recursive acquisition.*/
111 assert(!is_lock_acquired(my_bakery_info, is_cached));
112
113 /*
114 * Tell other contenders that we are through the bakery doorway i.e.
115 * going to allocate a ticket for this cpu.
116 */
117 my_ticket = 0U;
118 my_bakery_info->lock_data = make_bakery_data(CHOOSING_TICKET, my_ticket);
119
120 write_cache_op((uintptr_t)my_bakery_info, is_cached);
121
122 /*
123 * Iterate through the bakery information of each contender to allocate
124 * the highest ticket number for this cpu.
125 */
126 for (they = 0U; they < BAKERY_LOCK_MAX_CPUS; they++) {
127 if (me == they)
128 continue;
129
130 /*
131 * Get a reference to the other contender's bakery info and
132 * ensure that a stale copy is not read.
133 */
134 their_bakery_info = get_bakery_info(they, lock);
135 assert(their_bakery_info != NULL);
136
137 read_cache_op((uintptr_t)their_bakery_info, is_cached);
138
139 /*
140 * Update this cpu's ticket number if a higher ticket number is
141 * seen
142 */
143 their_ticket = bakery_ticket_number(their_bakery_info->lock_data);
144 if (their_ticket > my_ticket)
145 my_ticket = their_ticket;
146 }
147
148 /*
149 * Compute ticket; then signal to other contenders waiting for us to
150 * finish calculating our ticket value that we're done
151 */
152 ++my_ticket;
153 my_bakery_info->lock_data = make_bakery_data(CHOSEN_TICKET, my_ticket);
154
155 write_cache_op((uintptr_t)my_bakery_info, is_cached);
156
157 return my_ticket;
158 }
159
160 void bakery_lock_get(bakery_lock_t *lock)
161 {
162 unsigned int they, me, is_cached;
163 unsigned int my_ticket, my_prio, their_ticket;
164 bakery_info_t *their_bakery_info;
165 unsigned int their_bakery_data;
166
167 me = plat_my_core_pos();
168 #ifdef AARCH32
169 is_cached = read_sctlr() & SCTLR_C_BIT;
170 #else
171 is_cached = read_sctlr_el3() & SCTLR_C_BIT;
172 #endif
173
174 /* Get a ticket */
175 my_ticket = bakery_get_ticket(lock, me, is_cached);
176
177 /*
178 * Now that we got our ticket, compute our priority value, then compare
179 * with that of others, and proceed to acquire the lock
180 */
181 my_prio = bakery_get_priority(my_ticket, me);
182 for (they = 0U; they < BAKERY_LOCK_MAX_CPUS; they++) {
183 if (me == they)
184 continue;
185
186 /*
187 * Get a reference to the other contender's bakery info and
188 * ensure that a stale copy is not read.
189 */
190 their_bakery_info = get_bakery_info(they, lock);
191 assert(their_bakery_info != NULL);
192
193 /* Wait for the contender to get their ticket */
194 do {
195 read_cache_op((uintptr_t)their_bakery_info, is_cached);
196 their_bakery_data = their_bakery_info->lock_data;
197 } while (bakery_is_choosing(their_bakery_data));
198
199 /*
200 * If the other party is a contender, they'll have non-zero
201 * (valid) ticket value. If they do, compare priorities
202 */
203 their_ticket = bakery_ticket_number(their_bakery_data);
204 if (their_ticket && (bakery_get_priority(their_ticket, they) < my_prio)) {
205 /*
206 * They have higher priority (lower value). Wait for
207 * their ticket value to change (either release the lock
208 * to have it dropped to 0; or drop and probably content
209 * again for the same lock to have an even higher value)
210 */
211 do {
212 wfe();
213 read_cache_op((uintptr_t)their_bakery_info, is_cached);
214 } while (their_ticket
215 == bakery_ticket_number(their_bakery_info->lock_data));
216 }
217 }
218
219 /*
220 * Lock acquired. Ensure that any reads from a shared resource in the
221 * critical section read values after the lock is acquired.
222 */
223 dmbld();
224 }
225
226 void bakery_lock_release(bakery_lock_t *lock)
227 {
228 bakery_info_t *my_bakery_info;
229 #ifdef AARCH32
230 unsigned int is_cached = read_sctlr() & SCTLR_C_BIT;
231 #else
232 unsigned int is_cached = read_sctlr_el3() & SCTLR_C_BIT;
233 #endif
234
235 my_bakery_info = get_bakery_info(plat_my_core_pos(), lock);
236
237 assert(is_lock_acquired(my_bakery_info, is_cached));
238
239 /*
240 * Ensure that other observers see any stores in the critical section
241 * before releasing the lock. Release the lock by resetting ticket.
242 * Then signal other waiting contenders.
243 */
244 dmbst();
245 my_bakery_info->lock_data = 0U;
246 write_cache_op((uintptr_t)my_bakery_info, is_cached);
247 sev();
248 }