1 diff --git a/src/atomic_ops.h b/src/atomic_ops.h
2 index c23f30b..791b360 100755
6 # if defined(__cris__) || defined(CRIS)
7 # include "atomic_ops/sysdeps/gcc/cris.h"
9 +# if defined(__mips__)
10 +# include "atomic_ops/sysdeps/gcc/mips.h"
12 #endif /* __GNUC__ && !AO_USE_PTHREAD_DEFS */
14 #if defined(__INTEL_COMPILER) && !defined(AO_USE_PTHREAD_DEFS)
15 diff --git a/src/atomic_ops/sysdeps/Makefile.am b/src/atomic_ops/sysdeps/Makefile.am
16 index 74122b4..d6737c0 100644
17 --- a/src/atomic_ops/sysdeps/Makefile.am
18 +++ b/src/atomic_ops/sysdeps/Makefile.am
19 @@ -29,6 +29,7 @@ nobase_sysdep_HEADERS= generic_pthread.h \
20 gcc/powerpc.h gcc/sparc.h \
21 gcc/hppa.h gcc/m68k.h gcc/s390.h \
22 gcc/ia64.h gcc/x86_64.h gcc/cris.h \
27 diff --git a/src/atomic_ops/sysdeps/gcc/mips.h b/src/atomic_ops/sysdeps/gcc/mips.h
29 index 0000000..e7f3a5d
31 +++ b/src/atomic_ops/sysdeps/gcc/mips.h
34 + * Copyright (c) 2005 Thiemo Seufer <ths@networkno.de>
35 + * Copyright (c) 2007 Zhang Le <r0bertz@gentoo.org>
37 + * THIS MATERIAL IS PROVIDED AS IS, WITH ABSOLUTELY NO WARRANTY EXPRESSED
38 + * OR IMPLIED. ANY USE IS AT YOUR OWN RISK.
40 + * Permission is hereby granted to use or copy this program
41 + * for any purpose, provided the above notices are retained on all copies.
42 + * Permission to modify the code and to distribute modified code is granted,
43 + * provided the above notices are retained, and a notice that the code was
44 + * modified is included with the above copyright notice.
47 +#include "../all_aligned_atomic_load_store.h"
48 +#include "../test_and_set_t_is_ao_t.h"
50 +/* Data dependence does not imply read ordering. */
51 +#define AO_NO_DD_ORDERING
56 + __asm__ __volatile__(
59 + " .set noreorder \n"
66 +#define AO_HAVE_nop_full
69 +AO_compare_and_swap(volatile AO_t *addr, AO_t old, AO_t new_val)
71 + register int was_equal = 0;
74 + __asm__ __volatile__(
77 + " .set noreorder \n"
80 + " bne %0, %4, 2f \n"
87 + : "=&r" (temp), "+R" (*addr), "+r" (was_equal)
88 + : "r" (new_val), "r" (old)
93 +#define AO_HAVE_compare_and_swap
96 +AO_fetch_and_add_full (volatile AO_t *p, AO_t incr)
99 + __asm__ __volatile__(
102 + " .set noreorder \n"
105 + " addu %0, %1, %3 \n"
108 + " addu %0, %1, %3 \n"
111 + : "=&r" (result), "=&r" (temp), "=m" (*p)
112 + : "r" (incr), "m" (*p)
117 +#define AO_HAVE_fetch_and_add_full
120 + * FIXME: fetch_and_add_full implemented, any others?