package/boot/uboot-d1/patches/0028-pinctrl-sunxi-Add-NAND-pinmuxes.patch

   1 From 7be2405244565973cff0a40196bbed08df90f6a3 Mon Sep 17 00:00:00 2001
   2 From: Samuel Holland <samuel@sholland.org>
   3 Date: Mon, 16 May 2022 00:31:36 -0500
   4 Subject: [PATCH 28/90] pinctrl: sunxi: Add NAND pinmuxes
   5
   6 NAND is always at function 2 on port C.
   7
   8 Pin lists and mux values were taken from the Linux drivers.
   9
  10 Signed-off-by: Samuel Holland <samuel@sholland.org>
  11 ---
  12  drivers/pinctrl/sunxi/pinctrl-sunxi.c | 13 +++++++++++++
  13  1 file changed, 13 insertions(+)
  14
  15 --- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
  16 +++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
  17 @@ -269,6 +269,7 @@ static const struct sunxi_pinctrl_functi
  18  #endif
  19         { "mmc2",       3 },    /* PC6-PC15 */
  20         { "mmc3",       2 },    /* PI4-PI9 */
  21 +       { "nand0",      2 },    /* PC0-PC24 */
  22         { "spi0",       3 },    /* PC0-PC2, PC23 */
  23  #if IS_ENABLED(CONFIG_UART0_PORT_F)
  24         { "uart0",      4 },    /* PF2-PF4 */
  25 @@ -293,6 +294,7 @@ static const struct sunxi_pinctrl_functi
  26         { "mmc0",       2 },    /* PF0-PF5 */
  27         { "mmc1",       2 },    /* PG3-PG8 */
  28         { "mmc2",       3 },    /* PC6-PC15 */
  29 +       { "nand0",      2 },    /* PC0-PC19 */
  30         { "spi0",       3 },    /* PC0-PC3 */
  31  #if IS_ENABLED(CONFIG_UART0_PORT_F)
  32         { "uart0",      4 },    /* PF2-PF4 */
  33 @@ -319,6 +321,7 @@ static const struct sunxi_pinctrl_functi
  34         { "mmc1",       2 },    /* PG0-PG5 */
  35         { "mmc2",       3 },    /* PC6-PC15, PC24 */
  36         { "mmc3",       4 },    /* PC6-PC15, PC24 */
  37 +       { "nand0",      2 },    /* PC0-PC26 */
  38         { "spi0",       3 },    /* PC0-PC2, PC27 */
  39  #if IS_ENABLED(CONFIG_UART0_PORT_F)
  40         { "uart0",      3 },    /* PF2-PF4 */
  41 @@ -363,6 +366,7 @@ static const struct sunxi_pinctrl_functi
  42         { "mmc1",       4 },    /* PG0-PG5 */
  43  #endif
  44         { "mmc2",       3 },    /* PC5-PC15, PC24 */
  45 +       { "nand0",      2 },    /* PC0-PC24 */
  46         { "spi0",       3 },    /* PC0-PC2, PC23 */
  47  #if IS_ENABLED(CONFIG_UART0_PORT_F)
  48         { "uart0",      4 },    /* PF2-PF4 */
  49 @@ -386,6 +390,7 @@ static const struct sunxi_pinctrl_functi
  50         { "mmc0",       2 },    /* PF0-PF5 */
  51         { "mmc1",       2 },    /* PG0-PG5 */
  52         { "mmc2",       3 },    /* PC5-PC16 */
  53 +       { "nand0",      2 },    /* PC0-PC16 */
  54         { "spi0",       3 },    /* PC0-PC3 */
  55  #if IS_ENABLED(CONFIG_UART0_PORT_F)
  56         { "uart0",      3 },    /* PF2-PF4 */
  57 @@ -424,6 +429,7 @@ static const struct sunxi_pinctrl_functi
  58         { "mmc0",       2 },    /* PF0-PF5 */
  59         { "mmc1",       2 },    /* PG0-PG5 */
  60         { "mmc2",       3 },    /* PC5-PC16 */
  61 +       { "nand0",      2 },    /* PC0-PC16 */
  62         { "spi0",       3 },    /* PC0-PC3 */
  63  #if IS_ENABLED(CONFIG_UART0_PORT_F)
  64         { "uart0",      3 },    /* PF2-PF4 */
  65 @@ -450,6 +456,7 @@ static const struct sunxi_pinctrl_functi
  66         { "mmc0",       2 },    /* PF0-PF5 */
  67         { "mmc1",       2 },    /* PG0-PG5 */
  68         { "mmc2",       3 },    /* PC5-PC16 */
  69 +       { "nand0",      2 },    /* PC0-PC18 */
  70         { "spi0",       3 },    /* PC0-PC3 */
  71  #if IS_ENABLED(CONFIG_UART0_PORT_F)
  72         { "uart0",      3 },    /* PF2-PF4 */
  73 @@ -491,6 +498,7 @@ static const struct sunxi_pinctrl_functi
  74         { "mmc0",       2 },    /* PF0-PF5 */
  75         { "mmc1",       2 },    /* PG0-PG5 */
  76         { "mmc2",       3 },    /* PC5-PC16 */
  77 +       { "nand0",      2 },    /* PC0-PC16 */
  78         { "spi0",       3 },    /* PC0-PC3 */
  79  #if IS_ENABLED(CONFIG_UART0_PORT_F)
  80         { "uart0",      3 },    /* PF2-PF4 */
  81 @@ -557,6 +565,7 @@ static const struct sunxi_pinctrl_functi
  82         { "mmc0",       2 },    /* PF0-PF5 */
  83         { "mmc1",       2 },    /* PG0-PG5 */
  84         { "mmc2",       3 },    /* PC6-PC16 */
  85 +       { "nand0",      2 },    /* PC0-PC18 */
  86         { "spi0",       3 },    /* PC0-PC2, PC19 */
  87  #if IS_ENABLED(CONFIG_UART0_PORT_F)
  88         { "uart0",      4 },    /* PF2-PF4 */
  89 @@ -622,6 +631,7 @@ static const struct sunxi_pinctrl_functi
  90         { "mmc0",       2 },    /* PF0-PF5 */
  91         { "mmc1",       2 },    /* PG0-PG5 */
  92         { "mmc2",       3 },    /* PC1-PC16 */
  93 +       { "nand0",      2 },    /* PC0-PC16 */
  94         { "pwm",        2 },    /* PD22 */
  95         { "spi0",       4 },    /* PC0-PC3 */
  96  #if IS_ENABLED(CONFIG_UART0_PORT_F)
  97 @@ -664,6 +674,7 @@ static const struct sunxi_pinctrl_functi
  98         { "mmc0",       2 },    /* PF0-PF5 */
  99         { "mmc1",       2 },    /* PG0-PG5 */
 100         { "mmc2",       3 },    /* PC1-PC16 */
 101 +       { "nand0",      2 },    /* PC0-PC16 */
 102         { "spi0",       3 },    /* PC0-PC3 */
 103  #if IS_ENABLED(CONFIG_UART0_PORT_F)
 104         { "uart0",      3 },    /* PF2-PF4 */
 105 @@ -690,6 +701,7 @@ static const struct sunxi_pinctrl_functi
 106         { "mmc0",       2 },    /* PF0-PF5 */
 107         { "mmc1",       2 },    /* PG0-PG5 */
 108         { "mmc2",       3 },    /* PC1-PC14 */
 109 +       { "nand0",      2 },    /* PC0-PC16 */
 110         { "spi0",       4 },    /* PC0-PC7 */
 111  #if IS_ENABLED(CONFIG_UART0_PORT_F)
 112         { "uart0",      3 },    /* PF2-PF4 */
 113 @@ -728,6 +740,7 @@ static const struct sunxi_pinctrl_functi
 114         { "mmc0",       2 },    /* PF0-PF5 */
 115         { "mmc1",       2 },    /* PG0-PG5 */
 116         { "mmc2",       3 },    /* PC0-PC16 */
 117 +       { "nand0",      2 },    /* PC0-PC16 */
 118         { "spi0",       4 },    /* PC0-PC7, PC15-PC16 */
 119  #if IS_ENABLED(CONFIG_UART0_PORT_F)
 120         { "uart0",      3 },    /* PF2-PF4 */