1 From 4bfa74583bc938d2da41f255f22baa1845332893 Mon Sep 17 00:00:00 2001
2 From: Luka Perkov <luka@openwrt.org>
3 Date: Tue, 12 Mar 2013 01:42:46 +0100
4 Subject: MIPS: add board support for ZyXEL P-2601HN-Fx
6 Signed-off-by: Luka Perkov <luka@openwrt.org>
9 +++ b/board/zyxel/p2601hnfx/Makefile
12 +# Copyright (C) 2000-2011 Wolfgang Denk, DENX Software Engineering, wd@denx.de
14 +# SPDX-License-Identifier: GPL-2.0+
17 +include $(TOPDIR)/config.mk
19 +LIB = $(obj)lib$(BOARD).o
23 +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
24 +OBJS := $(addprefix $(obj),$(COBJS))
25 +SOBJS := $(addprefix $(obj),$(SOBJS))
27 +$(LIB): $(obj).depend $(OBJS) $(SOBJS)
28 + $(call cmd_link_o_target, $(OBJS) $(SOBJS))
30 +#########################################################################
32 +# defines $(obj).depend target
33 +include $(SRCTREE)/rules.mk
35 +sinclude $(obj).depend
37 +#########################################################################
39 +++ b/board/zyxel/p2601hnfx/config.mk
42 +# Copyright (C) 2012-2013 Daniel Schwierzeck, daniel.schwierzeck@gmail.com
44 +# SPDX-License-Identifier: GPL-2.0+
47 +PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(BOARDDIR)
49 +++ b/board/zyxel/p2601hnfx/ddr_settings.h
52 + * Copyright (C) 2013 Luka Perkov <luka@openwrt.org>
54 + * The values have been extracted from original ZyXEL U-Boot.
56 + * SPDX-License-Identifier: GPL-2.0+
59 +#define MC_DC00_VALUE 0x1B1B
60 +#define MC_DC01_VALUE 0x0
61 +#define MC_DC02_VALUE 0x0
62 +#define MC_DC03_VALUE 0x0
63 +#define MC_DC04_VALUE 0x0
64 +#define MC_DC05_VALUE 0x200
65 +#define MC_DC06_VALUE 0x306
66 +#define MC_DC07_VALUE 0x303
67 +#define MC_DC08_VALUE 0x102
68 +#define MC_DC09_VALUE 0x70A
69 +#define MC_DC10_VALUE 0x203
70 +#define MC_DC11_VALUE 0xC02
71 +#define MC_DC12_VALUE 0x1C8
72 +#define MC_DC13_VALUE 0x1
73 +#define MC_DC14_VALUE 0x0
74 +#define MC_DC15_VALUE 0x144
75 +#define MC_DC16_VALUE 0xC800
76 +#define MC_DC17_VALUE 0xD
77 +#define MC_DC18_VALUE 0x301
78 +#define MC_DC19_VALUE 0x200
79 +#define MC_DC20_VALUE 0xA03
80 +#define MC_DC21_VALUE 0x1900
81 +#define MC_DC22_VALUE 0x1919
82 +#define MC_DC23_VALUE 0x0
83 +#define MC_DC24_VALUE 0x66
84 +#define MC_DC25_VALUE 0x0
85 +#define MC_DC26_VALUE 0x0
86 +#define MC_DC27_VALUE 0x0
87 +#define MC_DC28_VALUE 0x50A
88 +#define MC_DC29_VALUE 0x2D65
89 +#define MC_DC30_VALUE 0x81B1
90 +#define MC_DC31_VALUE 0x0
91 +#define MC_DC32_VALUE 0x0
92 +#define MC_DC33_VALUE 0x0
93 +#define MC_DC34_VALUE 0x0
94 +#define MC_DC35_VALUE 0x0
95 +#define MC_DC36_VALUE 0x0
96 +#define MC_DC37_VALUE 0x0
97 +#define MC_DC38_VALUE 0x0
98 +#define MC_DC39_VALUE 0x0
99 +#define MC_DC40_VALUE 0x0
100 +#define MC_DC41_VALUE 0x0
101 +#define MC_DC42_VALUE 0x0
102 +#define MC_DC43_VALUE 0x0
103 +#define MC_DC44_VALUE 0x0
104 +#define MC_DC45_VALUE 0x600
105 +#define MC_DC46_VALUE 0x0
107 +++ b/board/zyxel/p2601hnfx/p2601hnfx.c
110 + * Copyright (C) 2013 Luka Perkov <luka@openwrt.org>
112 + * SPDX-License-Identifier: GPL-2.0+
117 +#include <asm/gpio.h>
118 +#include <asm/lantiq/eth.h>
119 +#include <asm/lantiq/reset.h>
120 +#include <asm/lantiq/chipid.h>
122 +int board_early_init_f(void)
127 +int checkboard(void)
129 + puts("Board: " CONFIG_BOARD_NAME "\n");
130 + ltq_chip_print_info();
135 +static const struct ltq_eth_port_config eth_port_config[] = {
136 + /* MAC0: REALTEK RTL8306 switch */
137 + { 0, 0x0, LTQ_ETH_PORT_SWITCH, PHY_INTERFACE_MODE_RMII },
140 +static const struct ltq_eth_board_config eth_board_config = {
141 + .ports = eth_port_config,
142 + .num_ports = ARRAY_SIZE(eth_port_config),
145 +int board_eth_init(bd_t *bis)
147 + return ltq_eth_initialize(ð_board_config);
150 +static struct switch_device rtl8306_dev = {
156 +int board_switch_init(void)
158 + return switch_device_register(&rtl8306_dev);
162 @@ -499,6 +499,10 @@ Active mips mips32 -
163 Active mips mips32 arx100 zte zxv10h201l zxv10h201l_nor zxv10h201l:SYS_BOOT_NOR Luka Perkov <luka@openwrt.org>
164 Active mips mips32 arx100 zte zxv10h201l zxv10h201l_ram zxv10h201l:SYS_BOOT_RAM Luka Perkov <luka@openwrt.org>
165 Active mips mips32 arx100 zte zxv10h201l zxv10h201l_zte zxv10h201l:SYS_BOOT_ZTE Luka Perkov <luka@openwrt.org>
166 +Active mips mips32 arx100 zyxel p2601hnfx p2601hnfx_nor p2601hnfx:SYS_BOOT_NOR Luka Perkov <luka@openwrt.org>
167 +Active mips mips32 arx100 zyxel p2601hnfx p2601hnfx_norspl p2601hnfx:SYS_BOOT_NORSPL Luka Perkov <luka@openwrt.org>
168 +Active mips mips32 arx100 zyxel p2601hnfx p2601hnfx_ram p2601hnfx:SYS_BOOT_RAM Luka Perkov <luka@openwrt.org>
169 +Active mips mips32 arx100 zyxel p2601hnfx p2601hnfx_zyxel p2601hnfx:SYS_BOOT_ZYXEL Luka Perkov <luka@openwrt.org>
170 Active mips mips32 arx100 zyxel p661hnufx p661hnufx_ram p661hnufx:SYS_BOOT_RAM Luka Perkov <luka@openwrt.org>
171 Active mips mips32 arx100 zyxel p661hnufx p661hnufx_sfspl p661hnufx:SYS_BOOT_SFSPL Luka Perkov <luka@openwrt.org>
172 Active mips mips32 arx100 zyxel p661hnufx p661hnufx_zyxel p661hnufx:SYS_BOOT_ZYXEL Luka Perkov <luka@openwrt.org>
174 +++ b/include/configs/p2601hnfx.h
177 + * Copyright (C) 2013 Luka Perkov <luka@openwrt.org>
179 + * SPDX-License-Identifier: GPL-2.0+
185 +#define CONFIG_MACH_TYPE "P-2601HN-Fx"
186 +#define CONFIG_IDENT_STRING " "CONFIG_MACH_TYPE
187 +#define CONFIG_BOARD_NAME "ZyXEL P-2601HN-Fx"
190 +#define CONFIG_LTQ_SUPPORT_UART /* Enable ASC and UART */
192 +#define CONFIG_LTQ_SUPPORT_NOR_FLASH /* Have a parallel NOR flash */
194 +#define CONFIG_LTQ_SUPPORT_SPL_NOR_FLASH /* Build NOR flash SPL */
195 +#define CONFIG_LTQ_SPL_COMP_LZO /* Compress SPL with LZO */
196 +#define CONFIG_LTQ_SPL_CONSOLE /* Enable SPL console */
199 +#if defined(CONFIG_SYS_BOOT_NOR)
200 +#define CONFIG_ENV_IS_IN_FLASH
201 +#define CONFIG_ENV_OVERWRITE
202 +#define CONFIG_ENV_OFFSET (256 * 1024)
203 +#define CONFIG_ENV_SECT_SIZE (128 * 1024)
204 +#elif defined(CONFIG_SYS_BOOT_NORSPL)
205 +#define CONFIG_ENV_IS_IN_FLASH
206 +#define CONFIG_ENV_OVERWRITE
207 +#define CONFIG_ENV_OFFSET (128 * 1024)
208 +#define CONFIG_ENV_SECT_SIZE (128 * 1024)
210 +#define CONFIG_ENV_IS_NOWHERE
213 +#define CONFIG_ENV_SIZE (8 * 1024)
214 +#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
216 +#if defined(CONFIG_SYS_BOOT_ZYXEL)
217 +#define CONFIG_SYS_TEXT_BASE 0x80800000
218 +#define CONFIG_SKIP_LOWLEVEL_INIT
222 +#define CONFIG_LTQ_ADVANCED_CONSOLE
223 +#define CONFIG_BAUDRATE 115200
224 +#define CONFIG_CONSOLE_ASC 1
225 +#define CONFIG_CONSOLE_DEV "ttyLTQ1"
227 +/* Pull in default board configs for Lantiq XWAY Danube */
228 +#include <asm/lantiq/config.h>
229 +#include <asm/arch/config.h>
231 +/* Pull in default OpenWrt configs for Lantiq SoC */
232 +#include "openwrt-lantiq-common.h"
234 +#define CONFIG_ENV_UPDATE_UBOOT_NOR \
235 + "update-uboot-nor=run load-uboot-norspl-lzo write-uboot-nor\0"
237 +#define CONFIG_EXTRA_ENV_SETTINGS \
238 + CONFIG_ENV_LANTIQ_DEFAULTS \
239 + CONFIG_ENV_UPDATE_UBOOT_NOR \
240 + "kernel_addr=0xB0040000\0"
242 +#endif /* __CONFIG_H */