package/boot/uboot-mediatek/patches/000-mtk-10-mmc-mtk-sd-increase-the-minimum-bus-frequency.patch

   1 From ed880b7572e1135e3bd8382d4670a375f7d9c91b Mon Sep 17 00:00:00 2001
   2 From: Weijie Gao <weijie.gao@mediatek.com>
   3 Date: Tue, 2 Mar 2021 15:56:17 +0800
   4 Subject: [PATCH 10/21] mmc: mtk-sd: increase the minimum bus frequency
   5
   6 With a 48MHz input clock, the lowest bus frequency can be as low as
   7 48000000 / (4 * 4095) = 2930Hz. Such an extremely low frequency will cause
   8 the mmc framework take seconds to finish the initialization.
   9
  10 Limiting the minimum bus frequency to a slightly higher value can solve the
  11 issue without any side effects.
  12
  13 Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  14 ---
  15  drivers/mmc/mtk-sd.c | 5 +++++
  16  1 file changed, 5 insertions(+)
  17
  18 --- a/drivers/mmc/mtk-sd.c
  19 +++ b/drivers/mmc/mtk-sd.c
  20 @@ -232,6 +232,8 @@
  21
  22  #define SCLK_CYCLES_SHIFT              20
  23
  24 +#define MIN_BUS_CLK                    260000
  25 +
  26  #define CMD_INTS_MASK  \
  27         (MSDC_INT_CMDRDY | MSDC_INT_RSPCRCERR | MSDC_INT_CMDTMO)
  28
  29 @@ -1639,6 +1641,9 @@ static int msdc_drv_probe(struct udevice
  30         else
  31                 cfg->f_min = host->src_clk_freq / (4 * 4095);
  32
  33 +       if (cfg->f_min < MIN_BUS_CLK)
  34 +               cfg->f_min = MIN_BUS_CLK;
  35 +
  36         cfg->f_max = host->src_clk_freq;
  37
  38         cfg->b_max = 1024;