1 From d8bde59186dafdea5bbe8d29d3a6ae7cac98e9d0 Mon Sep 17 00:00:00 2001
2 From: Weijie Gao <weijie.gao@mediatek.com>
3 Date: Mon, 25 Jan 2021 11:19:08 +0800
4 Subject: [PATCH 11/21] serial: serial-mtk: rewrite the setbrg function
6 Currently the setbrg logic of serial-mtk is messy, and should be rewritten.
7 Also an option is added to make it possible to use highspeed=3 mode for all
11 1. If baud clock > 12MHz
12 a) If baud <= 115200, highspeed=0 mode will be used (ns16550 compatible)
13 b) If baud <= 576000, highspeed=2 mode will be used
14 c) any baud > 576000, highspeed=3 mode will be used
15 2. If baud clock <= 12MHz
16 Always uses highspeed=3 mode
17 a) If baud <= 115200, calculates the divisor using DIV_ROUND_CLOSEST
18 b) any baud > 115200, the same as 1. c)
20 Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
22 drivers/serial/serial_mtk.c | 74 +++++++++++++++++--------------------
23 1 file changed, 33 insertions(+), 41 deletions(-)
25 --- a/drivers/serial/serial_mtk.c
26 +++ b/drivers/serial/serial_mtk.c
27 @@ -73,74 +73,64 @@ struct mtk_serial_regs {
28 struct mtk_serial_priv {
29 struct mtk_serial_regs __iomem *regs;
31 + bool force_highspeed;
34 static void _mtk_serial_setbrg(struct mtk_serial_priv *priv, int baud)
36 - bool support_clk12m_baud115200;
37 - u32 quot, samplecount, realbaud;
38 + u32 quot, realbaud, samplecount = 1;
40 - if ((baud <= 115200) && (priv->clock == 12000000))
41 - support_clk12m_baud115200 = true;
43 - support_clk12m_baud115200 = false;
44 + /* Special case for low baud clock */
45 + if ((baud <= 115200) && (priv->clock == 12000000)) {
46 + writel(3, &priv->regs->highspeed);
48 + quot = DIV_ROUND_CLOSEST(priv->clock, 256 * baud);
52 + samplecount = DIV_ROUND_CLOSEST(priv->clock, quot * baud);
54 + realbaud = priv->clock / samplecount / quot;
55 + if ((realbaud > BAUD_ALLOW_MAX(baud)) ||
56 + (realbaud < BAUD_ALLOW_MIX(baud))) {
57 + pr_info("baud %d can't be handled\n", baud);
63 + if (priv->force_highspeed)
67 writel(0, &priv->regs->highspeed);
68 quot = DIV_ROUND_CLOSEST(priv->clock, 16 * baud);
70 - if (support_clk12m_baud115200) {
71 - writel(3, &priv->regs->highspeed);
72 - quot = DIV_ROUND_CLOSEST(priv->clock, 256 * baud);
76 - samplecount = DIV_ROUND_CLOSEST(priv->clock,
78 - if (samplecount != 0) {
79 - realbaud = priv->clock / samplecount / quot;
80 - if ((realbaud > BAUD_ALLOW_MAX(baud)) ||
81 - (realbaud < BAUD_ALLOW_MIX(baud))) {
82 - pr_info("baud %d can't be handled\n",
86 - pr_info("samplecount is 0\n");
89 } else if (baud <= 576000) {
90 writel(2, &priv->regs->highspeed);
92 /* Set to next lower baudrate supported */
93 if ((baud == 500000) || (baud == 576000))
96 quot = DIV_ROUND_UP(priv->clock, 4 * baud);
99 writel(3, &priv->regs->highspeed);
101 quot = DIV_ROUND_UP(priv->clock, 256 * baud);
102 + samplecount = DIV_ROUND_CLOSEST(priv->clock, quot * baud);
107 writel(UART_LCR_WLS_8 | UART_LCR_DLAB, &priv->regs->lcr);
108 writel(quot & 0xff, &priv->regs->dll);
109 writel((quot >> 8) & 0xff, &priv->regs->dlm);
110 writel(UART_LCR_WLS_8, &priv->regs->lcr);
112 - if (baud > 460800) {
115 - tmp = DIV_ROUND_CLOSEST(priv->clock, quot * baud);
116 - writel(tmp - 1, &priv->regs->sample_count);
117 - writel((tmp - 2) >> 1, &priv->regs->sample_point);
119 - writel(0, &priv->regs->sample_count);
120 - writel(0xff, &priv->regs->sample_point);
123 - if (support_clk12m_baud115200) {
124 - writel(samplecount - 1, &priv->regs->sample_count);
125 - writel((samplecount - 2) >> 1, &priv->regs->sample_point);
127 + /* set highspeed mode sample count & point */
128 + writel(samplecount - 1, &priv->regs->sample_count);
129 + writel((samplecount - 2) >> 1, &priv->regs->sample_point);
132 static int _mtk_serial_putc(struct mtk_serial_priv *priv, const char ch)
133 @@ -248,6 +238,8 @@ static int mtk_serial_of_to_plat(struct
137 + priv->force_highspeed = dev_read_bool(dev, "mediatek,force-highspeed");