1 From fd7d9124ffa6761f27747daeea599e0ab874c1fa Mon Sep 17 00:00:00 2001
2 From: Weijie Gao <weijie.gao@mediatek.com>
3 Date: Wed, 19 Jul 2023 17:17:54 +0800
4 Subject: [PATCH 29/29] board: mediatek: add MT7988 reference boards
6 This patch adds general board files based on MT7988 SoCs.
8 MT7988 uses one mmc controller for booting from both SD and eMMC,
9 and the pins of mmc controller booting from SD are also shared with
10 one of spi controllers.
11 So two configs are need for these boot types:
13 1. mt7988_rfb_defconfig - SPI-NOR, SPI-NAND and eMMC
14 2. mt7988_sd_rfb_defconfig - SPI-NAND and SD
16 Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
18 arch/arm/dts/Makefile | 2 +
19 arch/arm/dts/mt7988-rfb.dts | 182 +++++++++++++++++++++++++++++
20 arch/arm/dts/mt7988-sd-rfb.dts | 134 +++++++++++++++++++++
21 board/mediatek/mt7988/MAINTAINERS | 7 ++
22 board/mediatek/mt7988/Makefile | 3 +
23 board/mediatek/mt7988/mt7988_rfb.c | 10 ++
24 configs/mt7988_rfb_defconfig | 83 +++++++++++++
25 configs/mt7988_sd_rfb_defconfig | 71 +++++++++++
26 include/configs/mt7988.h | 14 +++
27 9 files changed, 506 insertions(+)
28 create mode 100644 arch/arm/dts/mt7988-rfb.dts
29 create mode 100644 arch/arm/dts/mt7988-sd-rfb.dts
30 create mode 100644 board/mediatek/mt7988/MAINTAINERS
31 create mode 100644 board/mediatek/mt7988/Makefile
32 create mode 100644 board/mediatek/mt7988/mt7988_rfb.c
33 create mode 100644 configs/mt7988_rfb_defconfig
34 create mode 100644 configs/mt7988_sd_rfb_defconfig
35 create mode 100644 include/configs/mt7988.h
37 --- a/arch/arm/dts/Makefile
38 +++ b/arch/arm/dts/Makefile
39 @@ -1319,6 +1319,8 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
41 mt7986a-emmc-rfb.dtb \
42 mt7986b-emmc-rfb.dtb \
49 +++ b/arch/arm/dts/mt7988-rfb.dts
51 +// SPDX-License-Identifier: GPL-2.0
53 + * Copyright (c) 2022 MediaTek Inc.
54 + * Author: Sam Shih <sam.shih@mediatek.com>
58 +#include "mt7988.dtsi"
59 +#include <dt-bindings/gpio/gpio.h>
62 + model = "mt7988-rfb";
63 + compatible = "mediatek,mt7988-rfb";
66 + stdout-path = &uart0;
70 + device_type = "memory";
71 + reg = <0 0x40000000 0 0x10000000>;
74 + reg_3p3v: regulator-3p3v {
75 + compatible = "regulator-fixed";
76 + regulator-name = "fixed-3.3V";
77 + regulator-min-microvolt = <3300000>;
78 + regulator-max-microvolt = <3300000>;
80 + regulator-always-on;
83 + reg_1p8v: regulator-1p8v {
84 + compatible = "regulator-fixed";
85 + regulator-name = "fixed-1.8V";
86 + regulator-min-microvolt = <1800000>;
87 + regulator-max-microvolt = <1800000>;
89 + regulator-always-on;
98 + pinctrl-names = "default";
99 + pinctrl-0 = <&i2c1_pins>;
105 + mediatek,gmac-id = <0>;
106 + phy-mode = "usxgmii";
107 + mediatek,switch = "mt7988";
117 + i2c1_pins: i2c1-pins {
124 + pwm_pins: pwm-pins {
127 + groups = "pwm0", "pwm1", "pwm2", "pwm3", "pwm4",
128 + "pwm5", "pwm6", "pwm7";
132 + spi0_pins: spi0-pins {
135 + groups = "spi0", "spi0_wp_hold";
139 + spi2_pins: spi2-pins {
142 + groups = "spi2", "spi2_wp_hold";
146 + mmc0_pins_default: mmc0default {
148 + function = "flash";
149 + groups = "emmc_51";
153 + pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
154 + "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
155 + "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
168 + pins = "EMMC_RSTB";
174 + pinctrl-names = "default";
175 + pinctrl-0 = <&pwm_pins>;
180 + pinctrl-names = "default";
181 + pinctrl-0 = <&spi0_pins>;
182 + #address-cells = <1>;
194 + compatible = "spi-nand";
196 + spi-max-frequency = <52000000>;
201 + pinctrl-names = "default";
202 + pinctrl-0 = <&spi2_pins>;
203 + #address-cells = <1>;
215 + compatible = "jedec,spi-nor";
217 + spi-max-frequency = <52000000>;
222 + pinctrl-names = "default";
223 + pinctrl-0 = <&mmc0_pins_default>;
224 + max-frequency = <52000000>;
228 + vmmc-supply = <®_3p3v>;
229 + vqmmc-supply = <®_1p8v>;
234 +++ b/arch/arm/dts/mt7988-sd-rfb.dts
236 +// SPDX-License-Identifier: GPL-2.0
238 + * Copyright (c) 2022 MediaTek Inc.
239 + * Author: Sam Shih <sam.shih@mediatek.com>
243 +#include "mt7988.dtsi"
244 +#include <dt-bindings/gpio/gpio.h>
247 + model = "mt7988-rfb";
248 + compatible = "mediatek,mt7988-rfb", "mediatek,mt7988-sd-rfb";
251 + stdout-path = &uart0;
255 + device_type = "memory";
256 + reg = <0 0x40000000 0 0x10000000>;
259 + reg_3p3v: regulator-3p3v {
260 + compatible = "regulator-fixed";
261 + regulator-name = "fixed-3.3V";
262 + regulator-min-microvolt = <3300000>;
263 + regulator-max-microvolt = <3300000>;
265 + regulator-always-on;
274 + pinctrl-names = "default";
275 + pinctrl-0 = <&i2c1_pins>;
281 + mediatek,gmac-id = <0>;
282 + phy-mode = "usxgmii";
283 + mediatek,switch = "mt7988";
293 + i2c1_pins: i2c1-pins {
300 + pwm_pins: pwm-pins {
303 + groups = "pwm0", "pwm1", "pwm2", "pwm3", "pwm4",
304 + "pwm5", "pwm6", "pwm7";
308 + spi0_pins: spi0-pins {
311 + groups = "spi0", "spi0_wp_hold";
315 + mmc1_pins_default: mmc1default {
317 + function = "flash";
318 + groups = "emmc_45";
322 + pins = "SPI2_CSB", "SPI2_MISO", "SPI2_MOSI",
323 + "SPI2_CLK", "SPI2_HOLD";
334 + pinctrl-names = "default";
335 + pinctrl-0 = <&pwm_pins>;
340 + pinctrl-names = "default";
341 + pinctrl-0 = <&spi0_pins>;
342 + #address-cells = <1>;
354 + compatible = "spi-nand";
356 + spi-max-frequency = <52000000>;
361 + pinctrl-names = "default";
362 + pinctrl-0 = <&mmc1_pins_default>;
363 + max-frequency = <52000000>;
366 + vmmc-supply = <®_3p3v>;
367 + vqmmc-supply = <®_3p3v>;
371 +++ b/board/mediatek/mt7988/MAINTAINERS
374 +M: Sam Shih <sam.shih@mediatek.com>
376 +F: board/mediatek/mt7988
377 +F: include/configs/mt7988.h
378 +F: configs/mt7988_rfb_defconfig
379 +F: configs/mt7988_sd_rfb_defconfig
381 +++ b/board/mediatek/mt7988/Makefile
383 +# SPDX-License-Identifier: GPL-2.0
385 +obj-y += mt7988_rfb.o
387 +++ b/board/mediatek/mt7988/mt7988_rfb.c
389 +// SPDX-License-Identifier: GPL-2.0
391 + * Copyright (C) 2022 MediaTek Inc.
392 + * Author: Sam Shih <sam.shih@mediatek.com>
395 +int board_init(void)
400 +++ b/configs/mt7988_rfb_defconfig
403 +CONFIG_SYS_HAS_NONCACHED_MEMORY=y
404 +CONFIG_POSITION_INDEPENDENT=y
405 +CONFIG_ARCH_MEDIATEK=y
406 +CONFIG_TEXT_BASE=0x41e00000
407 +CONFIG_SYS_MALLOC_F_LEN=0x4000
408 +CONFIG_NR_DRAM_BANKS=1
409 +CONFIG_DEFAULT_DEVICE_TREE="mt7988-rfb"
410 +CONFIG_SYS_PROMPT="MT7988> "
411 +CONFIG_TARGET_MT7988=y
412 +CONFIG_DEBUG_UART_BASE=0x11000000
413 +CONFIG_DEBUG_UART_CLOCK=40000000
414 +CONFIG_SYS_LOAD_ADDR=0x50000000
416 +# CONFIG_AUTOBOOT is not set
417 +CONFIG_DEFAULT_FDT_FILE="mt7988-rfb"
420 +CONFIG_SYS_CBSIZE=512
421 +CONFIG_SYS_PBSIZE=1049
422 +# CONFIG_BOOTM_NETBSD is not set
423 +# CONFIG_BOOTM_PLAN9 is not set
424 +# CONFIG_BOOTM_RTEMS is not set
425 +# CONFIG_BOOTM_VXWORKS is not set
426 +# CONFIG_CMD_ELF is not set
435 +CONFIG_DOS_PARTITION=y
436 +CONFIG_EFI_PARTITION=y
437 +CONFIG_PARTITION_TYPE_GUID=y
438 +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
439 +CONFIG_NET_RANDOM_ETHADDR=y
441 +CONFIG_IPADDR="192.168.1.1"
442 +CONFIG_USE_NETMASK=y
443 +CONFIG_NETMASK="255.255.255.0"
444 +CONFIG_USE_SERVERIP=y
445 +CONFIG_SERVERIP="192.168.1.2"
450 +CONFIG_MMC_HS200_SUPPORT=y
454 +CONFIG_MTD_SPI_NAND=y
455 +CONFIG_DM_SPI_FLASH=y
456 +CONFIG_SPI_FLASH_SFDP_SUPPORT=y
457 +CONFIG_SPI_FLASH_EON=y
458 +CONFIG_SPI_FLASH_GIGADEVICE=y
459 +CONFIG_SPI_FLASH_ISSI=y
460 +CONFIG_SPI_FLASH_MACRONIX=y
461 +CONFIG_SPI_FLASH_SPANSION=y
462 +CONFIG_SPI_FLASH_STMICRO=y
463 +CONFIG_SPI_FLASH_WINBOND=y
464 +CONFIG_SPI_FLASH_XMC=y
465 +CONFIG_SPI_FLASH_XTX=y
466 +CONFIG_SPI_FLASH_MTD=y
468 +CONFIG_MEDIATEK_ETH=y
471 +CONFIG_PINCTRL_MT7988=y
472 +CONFIG_POWER_DOMAIN=y
473 +CONFIG_MTK_POWER_DOMAIN=y
484 +# CONFIG_EFI_LOADER is not set
486 +++ b/configs/mt7988_sd_rfb_defconfig
489 +CONFIG_SYS_HAS_NONCACHED_MEMORY=y
490 +CONFIG_POSITION_INDEPENDENT=y
491 +CONFIG_ARCH_MEDIATEK=y
492 +CONFIG_TEXT_BASE=0x41e00000
493 +CONFIG_SYS_MALLOC_F_LEN=0x4000
494 +CONFIG_NR_DRAM_BANKS=1
495 +CONFIG_DEFAULT_DEVICE_TREE="mt7988-sd-rfb"
496 +CONFIG_SYS_PROMPT="MT7988> "
497 +CONFIG_TARGET_MT7988=y
498 +CONFIG_DEBUG_UART_BASE=0x11000000
499 +CONFIG_DEBUG_UART_CLOCK=40000000
500 +CONFIG_SYS_LOAD_ADDR=0x50000000
502 +# CONFIG_AUTOBOOT is not set
503 +CONFIG_DEFAULT_FDT_FILE="mt7988-sd-rfb"
506 +CONFIG_SYS_CBSIZE=512
507 +CONFIG_SYS_PBSIZE=1049
508 +# CONFIG_BOOTM_NETBSD is not set
509 +# CONFIG_BOOTM_PLAN9 is not set
510 +# CONFIG_BOOTM_RTEMS is not set
511 +# CONFIG_BOOTM_VXWORKS is not set
512 +# CONFIG_CMD_ELF is not set
521 +CONFIG_DOS_PARTITION=y
522 +CONFIG_EFI_PARTITION=y
523 +CONFIG_PARTITION_TYPE_GUID=y
524 +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
525 +CONFIG_NET_RANDOM_ETHADDR=y
527 +CONFIG_IPADDR="192.168.1.1"
528 +CONFIG_USE_NETMASK=y
529 +CONFIG_NETMASK="255.255.255.0"
530 +CONFIG_USE_SERVERIP=y
531 +CONFIG_SERVERIP="192.168.1.2"
536 +CONFIG_MMC_HS200_SUPPORT=y
540 +CONFIG_MTD_SPI_NAND=y
542 +CONFIG_MEDIATEK_ETH=y
545 +CONFIG_PINCTRL_MT7988=y
546 +CONFIG_POWER_DOMAIN=y
547 +CONFIG_MTK_POWER_DOMAIN=y
558 +# CONFIG_EFI_LOADER is not set
560 +++ b/include/configs/mt7988.h
562 +/* SPDX-License-Identifier: GPL-2.0 */
564 + * Configuration for MediaTek MT7988 SoC
566 + * Copyright (C) 2022 MediaTek Inc.
567 + * Author: Sam Shih <sam.shih@mediatek.com>
573 +#define CFG_MAX_MEM_MAPPED 0xC0000000