2 +++ b/configs/mt7622_ubnt_unifi-6-lr_defconfig
5 +CONFIG_POSITION_INDEPENDENT=y
6 +CONFIG_ARCH_MEDIATEK=y
7 +CONFIG_TARGET_MT7622=y
8 +CONFIG_SYS_TEXT_BASE=0x41e00000
9 +CONFIG_SYS_MALLOC_F_LEN=0x4000
10 +CONFIG_USE_DEFAULT_ENV_FILE=y
11 +CONFIG_MTDPARTS_DEFAULT="mtdparts=nor0:128k(bl2),640k(fip),64k(u-boot-env),256k(factory),64k(eeprom),15232k(recovery),-(firmware)"
12 +CONFIG_ENV_IS_IN_MTD=y
13 +CONFIG_ENV_MTD_NAME="nor0"
14 +CONFIG_ENV_SIZE_REDUND=0x4000
15 +CONFIG_ENV_SIZE=0x4000
16 +CONFIG_ENV_OFFSET=0xc0000
17 +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
18 +CONFIG_BOARD_LATE_INIT=y
19 +CONFIG_RESET_BUTTON_SETTLE_DELAY=400
20 +CONFIG_BOOTP_SEND_HOSTNAME=y
21 +CONFIG_DEFAULT_ENV_FILE="ubnt_unifi-6-lr_env"
22 +CONFIG_DEBUG_UART_BASE=0x11002000
23 +CONFIG_DEBUG_UART_CLOCK=25000000
24 +CONFIG_DEFAULT_DEVICE_TREE="mt7622-ubnt-unifi-6-lr"
26 +CONFIG_SMBIOS_PRODUCT_NAME=""
27 +CONFIG_AUTOBOOT_KEYED=y
29 +CONFIG_AUTOBOOT_MENU_SHOW=y
30 +CONFIG_CFB_CONSOLE_ANSI=y
34 +CONFIG_CMD_ENV_FLAGS=y
36 +CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
39 +CONFIG_DEFAULT_FDT_FILE="mt7622-ubnt-unifi-6-lr"
40 +CONFIG_SYS_PROMPT="MT7622> "
41 +# CONFIG_LEGACY_IMAGE_FORMAT is not set
42 +# CONFIG_BOOTM_PLAN9 is not set
43 +# CONFIG_BOOTM_RTEMS is not set
44 +# CONFIG_BOOTM_VXWORKS is not set
45 +# CONFIG_EFI is not set
46 +# CONFIG_EFI_LOADER is not set
47 +CONFIG_CMD_BOOTMENU=y
48 +# CONFIG_CMD_BOOTEFI is not set
55 +# CONFIG_CMD_ELF is not set
56 +# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
57 +CONFIG_CMD_ENV_READMEM=y
58 +CONFIG_CMD_ERASEENV=y
63 +CONFIG_CMD_LINK_LOCAL=y
64 +# CONFIG_CMD_MBR is not set
67 +# CONFIG_CMD_PCI is not set
72 +CONFIG_CMD_TFTPBOOT=y
74 +# CONFIG_CMD_UNLZ4 is not set
77 +CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
83 +CONFIG_DISPLAY_CPUINFO=y
89 +CONFIG_DM_REGULATOR=y
90 +CONFIG_DM_REGULATOR_FIXED=y
91 +CONFIG_DM_REGULATOR_GPIO=y
92 +# CONFIG_DM_MMC is not set
95 +CONFIG_DM_SPI_FLASH=y
97 +# CONFIG_PARTITION_UUIDS is not set
98 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
99 +# CONFIG_LED is not set
100 +# CONFIG_LZ4 is not set
101 +CONFIG_VERSION_VARIABLE=y
109 +CONFIG_PHY_AQUANTIA=y
110 +CONFIG_PHY_ADDR_ENABLE=y
112 +CONFIG_MEDIATEK_ETH=y
114 +# CONFIG_MMC is not set
117 +CONFIG_PINCTRL_MT7622=y
118 +CONFIG_POWER_DOMAIN=y
119 +CONFIG_PRE_CONSOLE_BUFFER=y
120 +CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
121 +CONFIG_MTK_POWER_DOMAIN=y
125 +CONFIG_MTK_SNFI_SPI=y
127 +CONFIG_SYSRESET_WATCHDOG=y
130 +CONFIG_RANDOM_UUID=y
133 +CONFIG_SPI_FLASH_BAR=y
134 +CONFIG_SPI_FLASH_MTD=y
135 +CONFIG_SPI_FLASH_UNLOCK_ALL=y
136 +CONFIG_SPI_FLASH_EON=y
137 +CONFIG_SPI_FLASH_GIGADEVICE=y
138 +CONFIG_SPI_FLASH_MACRONIX=y
139 +CONFIG_SPI_FLASH_SPANSION=y
140 +CONFIG_SPI_FLASH_STMICRO=y
141 +CONFIG_SPI_FLASH_SST=y
142 +CONFIG_SPI_FLASH_WINBOND=y
143 +CONFIG_SPI_FLASH_XMC=y
145 +++ b/arch/arm/dts/mt7622-ubnt-unifi-6-lr.dts
147 +// SPDX-License-Identifier: GPL-2.0
149 + * Copyright (c) 2019 MediaTek Inc.
150 + * Author: Sam Shih <sam.shih@mediatek.com>
154 +#include "mt7622.dtsi"
155 +#include "mt7622-u-boot.dtsi"
158 + #address-cells = <1>;
160 + model = "mt7622-ubnt-unifi-6-lr";
161 + compatible = "mediatek,mt7622", "ubnt,unifi-6-lr";
164 + stdout-path = &uart0;
165 + tick-timer = &timer0;
173 + compatible = "gpio-keys";
174 + u-boot,dm-pre-reloc;
178 + gpios = <&gpio 62 GPIO_ACTIVE_LOW>;
179 + u-boot,dm-pre-reloc;
184 + device_type = "memory";
185 + reg = <0x40000000 0x20000000>;
188 + reg_1p8v: regulator-1p8v {
189 + compatible = "regulator-fixed";
190 + regulator-name = "fixed-1.8V";
191 + regulator-min-microvolt = <1800000>;
192 + regulator-max-microvolt = <1800000>;
194 + regulator-always-on;
197 + reg_3p3v: regulator-3p3v {
198 + compatible = "regulator-fixed";
199 + regulator-name = "fixed-3.3V";
200 + regulator-min-microvolt = <3300000>;
201 + regulator-max-microvolt = <3300000>;
203 + regulator-always-on;
206 + reg_5v: regulator-5v {
207 + compatible = "regulator-fixed";
208 + regulator-name = "fixed-5V";
209 + regulator-min-microvolt = <5000000>;
210 + regulator-max-microvolt = <5000000>;
212 + regulator-always-on;
217 + pinctrl-names = "default";
218 + pinctrl-0 = <&pcie0_pins>, <&pcie1_pins>;
231 + eth_pins: eth-pins {
234 + groups = "mdc_mdio", "rgmii_via_gmac2";
238 + pcie0_pins: pcie0-pins {
241 + groups = "pcie0_pad_perst",
247 + pcie1_pins: pcie1-pins {
250 + groups = "pcie1_pad_perst",
256 + snfi_pins: snfi-pins {
258 + function = "flash";
263 + snor_pins: snor-pins {
265 + function = "flash";
266 + groups = "spi_nor";
270 + uart0_pins: uart0 {
273 + groups = "uart0_0_tx_rx" ;
277 + watchdog_pins: watchdog-default {
279 + function = "watchdog";
280 + groups = "watchdog";
286 + pinctrl-names = "default", "snfi";
287 + pinctrl-0 = <&snor_pins>;
288 + pinctrl-1 = <&snfi_pins>;
292 + compatible = "jedec,spi-nor";
294 + u-boot,dm-pre-reloc;
299 + pinctrl-names = "default";
300 + pinctrl-0 = <&snor_pins>;
304 + compatible = "jedec,spi-nor";
306 + spi-tx-bus-width = <1>;
307 + spi-rx-bus-width = <4>;
308 + u-boot,dm-pre-reloc;
313 + pinctrl-names = "default";
314 + pinctrl-0 = <&uart0_pins>;
319 + pinctrl-names = "default";
320 + pinctrl-0 = <&watchdog_pins>;
326 + pinctrl-names = "default";
327 + pinctrl-0 = <ð_pins>;
329 + mediatek,gmac-id = <0>;
330 + phy-mode = "sgmii";
331 + phy-handle = <&gphy>;
339 + #address-cells = <1>;
342 + gphy: ethernet-phy@8 {
343 + /* Marvell AQRate AQR112W - no driver */
344 + compatible = "ethernet-phy-ieee802.3-c45";
349 --- a/arch/arm/dts/Makefile
350 +++ b/arch/arm/dts/Makefile
351 @@ -1008,6 +1008,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
352 mt7623a-unielec-u7623-02-emmc.dtb \
353 mt7622-bananapi-bpi-r64.dtb \
354 mt7622-linksys-e8450-ubi.dtb \
355 + mt7622-ubnt-unifi-6-lr.dtb \
356 mt7623n-bananapi-bpi-r2.dtb \
358 mt8512-bm1-emmc.dtb \
360 +++ b/ubnt_unifi-6-lr_env
362 +ethaddr_factory=mtd read nor0 $loadaddr 0x110000 0x10000 && env readmem -b ethaddr $loadaddr 0x6 ; setenv ethaddr_factory
364 +serverip=192.168.1.254
366 +bootcmd=if pstore check ; then run boot_recovery ; else run boot_nor ; fi
368 +bootfile=openwrt-mediatek-mt7622-ubnt_unifi-6-lr-ubootmod-initramfs-recovery.itb
369 +bootfile_bl2=openwrt-mediatek-mt7622-ubnt_unifi-6-lr-ubootmod-preloader.bin
370 +bootfile_fip=openwrt-mediatek-mt7622-ubnt_unifi-6-lr-ubootmod-bl31-uboot.fip
371 +bootfile_upg=openwrt-mediatek-mt7622-ubnt_unifi-6-lr-ubootmod-squashfs-sysupgrade.itb
372 +bootmenu_confirm_return=askenv - Press ENTER to return to menu ; bootmenu 60
375 +bootmenu_title=
\e[0;34m( ( (
\e[1;39mOpenWrt
\e[0;34m ) ) )
\e[0m
376 +bootmenu_0=Initialize environment.=run _firstboot
377 +bootmenu_0d=Run default boot command.=run boot_default
378 +bootmenu_1=Boot system via TFTP.=run boot_tftp ; run bootmenu_confirm_return
379 +bootmenu_2=Boot production system from flash.=run boot_production ; run bootmenu_confirm_return
380 +bootmenu_3=Boot recovery system from flash.=run boot_recovery ; run bootmenu_confirm_return
381 +bootmenu_4=Load production system via TFTP then write to flash.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_production ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return
382 +bootmenu_5=Load recovery system via TFTP then write to flash.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_recovery ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return
383 +bootmenu_6=
\e[31mLoad BL31+U-Boot FIP via TFTP then write to flash.
\e[0m=run boot_tftp_write_fip ; run bootmenu_confirm_return
384 +bootmenu_7=
\e[31mLoad BL2 preloader via TFTP then write to flash.
\e[0m=run boot_tftp_write_preloader ; run bootmenu_confirm_return
385 +bootmenu_8=Reboot.=reset
386 +bootmenu_9=Reset all settings to factory defaults.=run reset_factory ; reset
387 +boot_first=if button reset ; then run boot_tftp_recovery ; setenv flag_recover 1 ; run boot_default ; fi ; bootmenu
388 +boot_default=if env exists flag_recover ; then else run bootcmd ; fi ; run boot_recovery ; setenv replacevol 1 ; run boot_tftp_forever
389 +boot_production=run nor_read_production && bootm $loadaddr
390 +boot_recovery=run nor_read_recovery ; bootm $loadaddr
391 +boot_serial_write_fip=loadx $loadaddr 115200 && run boot_write_fip
392 +boot_serial_write_preloader=loadx $loadaddr 115200 && run boot_write_preloader
393 +boot_tftp_forever=while true ; do run boot_tftp_recovery ; sleep 1 ; done
394 +boot_tftp_production=tftpboot $loadaddr $bootfile_upg && env exists replacevol && iminfo $loadaddr && run nor_write_production ; if env exists noboot ; then else bootm $loadaddr ; fi
395 +boot_tftp_recovery=tftpboot $loadaddr $bootfile && env exists replacevol && iminfo $loadaddr && run nor_write_recovery ; if env exists noboot ; then else bootm $loadaddr ; fi
396 +boot_tftp=tftpboot $loadaddr $bootfile && bootm $loadaddr
397 +boot_tftp_write_fip=tftpboot $loadaddr $bootfile_fip && run boot_write_fip
398 +boot_tftp_write_preloader=tftpboot $loadaddr $bootfile_bl2 && run boot_write_preloader
399 +boot_nor=run boot_production ; run boot_recovery
400 +boot_write_fip=mtd erase nor0 0x20000 0x80000 && mtd write nor0 $loadaddr 0x20000 0x80000
401 +boot_write_preloader=mtd erase nor0 0x0 0x20000 && mtd write nor0 $loadaddr 0x0 0x20000
402 +reset_factory=mtd erase nor0 0xc0000 0x10000 && reset
403 +nor_read_production=mtd read nor0 $loadaddr 0x1000000 0x1000 && imsz $loadaddr image_size && mtd read nor0 $loadaddr 0x1000000 $image_size
404 +nor_read_recovery=mtd read nor0 $loadaddr 0x120000 0x1000 && imsz $loadaddr image_size && mtd read nor0 $loadaddr 0x120000 $image_size
405 +nor_pad_size=imsz $loadaddr image_size ; setexpr image_eb $image_size / 0x1000 ; setexpr tmp1 image_size % 0x1000 ; test 0x$tmp1 -gt 0 && setexpr image_eb $image_eb + 1 ; setexpr image_eb $image_eb * 0x1000
406 +nor_write_production=run nor_pad_size ; test 0x$image_eb -le 0x3000000 && mtd erase nor0 0x1000000 0x$image_eb && mtd write nor0 $loadaddr 0x1000000 $filesize
407 +nor_write_recovery=run nor_pad_size ; test 0x$image_eb -le 0xee0000 && mtd erase nor0 0x120000 0x$image_eb && mtd write nor0 $loadaddr 0x120000 $filesize
408 +_init_env=setenv _init_env ; saveenv
409 +_firstboot=setenv _firstboot ; run _switch_to_menu ; run ethaddr_factory ; run _init_env ; run boot_first
410 +_switch_to_menu=setenv _switch_to_menu ; setenv bootdelay 3 ; setenv bootmenu_delay 3 ; setenv bootmenu_0 $bootmenu_0d ; setenv bootmenu_0d ; run _bootmenu_update_title
411 +_bootmenu_update_title=setenv _bootmenu_update_title ; setenv bootmenu_title "$bootmenu_title
\e[33m$ver
\e[0m"
412 --- a/common/board_r.c
413 +++ b/common/board_r.c
415 #ifdef CONFIG_EFI_SETUP_EARLY
416 #include <efi_loader.h>
418 +#include <spi_flash.h>
420 DECLARE_GLOBAL_DATA_PTR;
422 @@ -410,6 +411,21 @@ static int initr_onenand(void)
426 +#if defined(CONFIG_SPI_FLASH)
427 +/* probe SPI FLASH */
428 +static int initr_spiflash(void)
430 + struct udevice *new;
432 + spi_flash_probe_bus_cs(CONFIG_SF_DEFAULT_BUS,
433 + CONFIG_SF_DEFAULT_CS,
434 + CONFIG_SF_DEFAULT_SPEED,
435 + CONFIG_SF_DEFAULT_MODE,
442 static int initr_mmc(void)
444 @@ -697,6 +713,9 @@ static init_fnc_t init_sequence_r[] = {
445 #ifdef CONFIG_CMD_ONENAND
448 +#ifdef CONFIG_SPI_FLASH