4 * Declares the U_BOOT_DRIVER() records and platform data.
5 * This was generated by dtoc from a .dtb (device tree binary) file.
8 /* Allow use of U_BOOT_DRVINFO() in this file */
13 #include <dt-structs.h>
16 * driver_info declarations, ordered by 'struct driver_info' linker_list idx:
18 * idx driver_info driver
19 * --- -------------------- --------------------
20 * 0: clock_controller_at_ff440000 rockchip_rk3328_cru
21 * 1: dmc rockchip_rk3328_dmc
22 * 2: mmc_at_ff500000 rockchip_rk3288_dw_mshc
23 * 3: serial_at_ff130000 ns16550_serial
24 * 4: spi_at_ff190000 rockchip_rk3328_spi
25 * 5: syscon_at_ff100000 rockchip_rk3328_grf
26 * --- -------------------- --------------------
30 * Node /clock-controller@ff440000 index 0
31 * driver rockchip_rk3328_cru parent None
33 static struct dtd_rockchip_rk3328_cru dtv_clock_controller_at_ff440000
= {
34 .reg
= {0xff440000, 0x1000},
37 U_BOOT_DRVINFO(clock_controller_at_ff440000
) = {
38 .name
= "rockchip_rk3328_cru",
39 .plat
= &dtv_clock_controller_at_ff440000
,
40 .plat_size
= sizeof(dtv_clock_controller_at_ff440000
),
46 * driver rockchip_rk3328_dmc parent None
48 static struct dtd_rockchip_rk3328_dmc dtv_dmc
= {
49 .reg
= {0xff400000, 0x1000, 0xff780000, 0x3000, 0xff100000, 0x1000, 0xff440000, 0x1000,
50 0xff720000, 0x1000, 0xff798000, 0x1000},
51 .rockchip_sdram_params
= {0x1, 0xa, 0x2, 0x1, 0x0, 0x0, 0x11, 0x0,
52 0x11, 0x0, 0x0, 0x94291288, 0x0, 0x27, 0x462, 0x15,
53 0x242, 0xff, 0x14d, 0x0, 0x1, 0x0, 0x0, 0x0,
54 0x43049010, 0x64, 0x28003b, 0xd0, 0x20053, 0xd4, 0x220000, 0xd8,
55 0x100, 0xdc, 0x40000, 0xe0, 0x0, 0xe4, 0x110000, 0xe8,
56 0x420, 0xec, 0x400, 0xf4, 0xf011f, 0x100, 0x9060b06, 0x104,
57 0x20209, 0x108, 0x505040a, 0x10c, 0x40400c, 0x110, 0x5030206, 0x114,
58 0x3030202, 0x120, 0x3030b03, 0x124, 0x20208, 0x180, 0x1000040, 0x184,
59 0x0, 0x190, 0x7030003, 0x198, 0x5001100, 0x1a0, 0xc0400003, 0x240,
60 0x6000604, 0x244, 0x201, 0x250, 0xf00, 0x490, 0x1, 0xffffffff,
61 0xffffffff, 0xffffffff, 0xffffffff, 0x4, 0xc, 0x28, 0xa, 0x2c,
62 0x0, 0x30, 0x9, 0xffffffff, 0xffffffff, 0x77, 0x88, 0x79,
63 0x79, 0x87, 0x97, 0x87, 0x78, 0x77, 0x78, 0x87,
64 0x88, 0x87, 0x87, 0x77, 0x78, 0x78, 0x78, 0x78,
65 0x78, 0x78, 0x78, 0x78, 0x78, 0x69, 0x9, 0x77,
66 0x78, 0x77, 0x78, 0x77, 0x78, 0x77, 0x78, 0x77,
67 0x79, 0x9, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78,
68 0x78, 0x78, 0x78, 0x69, 0x9, 0x77, 0x78, 0x77,
69 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x79, 0x9,
70 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78,
71 0x78, 0x69, 0x9, 0x77, 0x78, 0x77, 0x78, 0x77,
72 0x78, 0x77, 0x78, 0x77, 0x79, 0x9, 0x78, 0x78,
73 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x69,
74 0x9, 0x77, 0x78, 0x77, 0x77, 0x77, 0x77, 0x77,
75 0x77, 0x77, 0x79, 0x9},
77 U_BOOT_DRVINFO(dmc
) = {
78 .name
= "rockchip_rk3328_dmc",
80 .plat_size
= sizeof(dtv_dmc
),
85 * Node /mmc@ff500000 index 2
86 * driver rockchip_rk3288_dw_mshc parent None
88 static struct dtd_rockchip_rk3288_dw_mshc dtv_mmc_at_ff500000
= {
90 .cap_sd_highspeed
= true,
98 .interrupts
= {0x0, 0xc, 0x4},
99 .max_frequency
= 0x8f0d180,
100 .pinctrl_0
= {0x45, 0x46, 0x47, 0x48},
101 .pinctrl_names
= "default",
102 .reg
= {0xff500000, 0x4000},
103 .u_boot_spl_fifo_mode
= true,
106 U_BOOT_DRVINFO(mmc_at_ff500000
) = {
107 .name
= "rockchip_rk3288_dw_mshc",
108 .plat
= &dtv_mmc_at_ff500000
,
109 .plat_size
= sizeof(dtv_mmc_at_ff500000
),
114 * Node /serial@ff130000 index 3
115 * driver ns16550_serial parent None
117 static struct dtd_ns16550_serial dtv_serial_at_ff130000
= {
118 .clock_frequency
= 0x16e3600,
122 .dma_names
= {"tx", "rx"},
123 .dmas
= {0x10, 0x6, 0x10, 0x7},
124 .interrupts
= {0x0, 0x39, 0x4},
126 .pinctrl_names
= "default",
127 .reg
= {0xff130000, 0x100},
131 U_BOOT_DRVINFO(serial_at_ff130000
) = {
132 .name
= "ns16550_serial",
133 .plat
= &dtv_serial_at_ff130000
,
134 .plat_size
= sizeof(dtv_serial_at_ff130000
),
138 /* Node /spi@ff190000 index 4 */
139 static struct dtd_rockchip_rk3328_spi dtv_spi_at_ff190000
= {
143 .dma_names
= {"tx", "rx"},
144 .dmas
= {0x10, 0x8, 0x10, 0x9},
145 .interrupts
= {0x0, 0x31, 0x4},
146 .pinctrl_0
= {0x2c, 0x2d, 0x2e, 0x2f},
147 .pinctrl_names
= "default",
148 .reg
= {0xff190000, 0x1000},
150 U_BOOT_DRVINFO(spi_at_ff190000
) = {
151 .name
= "rockchip_rk3328_spi",
152 .plat
= &dtv_spi_at_ff190000
,
153 .plat_size
= sizeof(dtv_spi_at_ff190000
),
158 * Node /syscon@ff100000 index 5
159 * driver rockchip_rk3328_grf parent None
161 static struct dtd_rockchip_rk3328_grf dtv_syscon_at_ff100000
= {
162 .reg
= {0xff100000, 0x1000},
164 U_BOOT_DRVINFO(syscon_at_ff100000
) = {
165 .name
= "rockchip_rk3328_grf",
166 .plat
= &dtv_syscon_at_ff100000
,
167 .plat_size
= sizeof(dtv_syscon_at_ff100000
),