package/boot/uboot-sifiveu/patches/0009-riscv-Fix-build-against-binutils.patch

   1 commit 1dde977518f13824b847e23275001191139bc384
   2 Author: Alexandre Ghiti <alexandre.ghiti@canonical.com>
   3 Date:   Mon Oct 3 18:07:54 2022 +0200
   4
   5     riscv: Fix build against binutils 2.38
   6
   7     The following description is copied from the equivalent patch for the
   8     Linux Kernel proposed by Aurelien Jarno:
   9
  10     >From version 2.38, binutils default to ISA spec version 20191213. This
  11     means that the csr read/write (csrr*/csrw*) instructions and fence.i
  12     instruction has separated from the `I` extension, become two standalone
  13     extensions: Zicsr and Zifencei. As the kernel uses those instruction,
  14     this causes the following build failure:
  15
  16     arch/riscv/cpu/mtrap.S: Assembler messages:
  17     arch/riscv/cpu/mtrap.S:65: Error: unrecognized opcode `csrr a0,scause'
  18     arch/riscv/cpu/mtrap.S:66: Error: unrecognized opcode `csrr a1,sepc'
  19     arch/riscv/cpu/mtrap.S:67: Error: unrecognized opcode `csrr a2,stval'
  20     arch/riscv/cpu/mtrap.S:70: Error: unrecognized opcode `csrw sepc,a0'
  21
  22     Signed-off-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
  23     Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
  24     Tested-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
  25     Tested-by: Heiko Stuebner <heiko@sntech.de>
  26     Tested-by: Christian Stewart <christian@paral.in>
  27     Reviewed-by: Rick Chen <rick@andestech.com>
  28
  29 diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile
  30 index 0b80eb8d86..53d1194ffb 100644
  31 --- a/arch/riscv/Makefile
  32 +++ b/arch/riscv/Makefile
  33 @@ -24,7 +24,16 @@ ifeq ($(CONFIG_CMODEL_MEDANY),y)
  34         CMODEL = medany
  35  endif
  36
  37 -ARCH_FLAGS = -march=$(ARCH_BASE)$(ARCH_A)$(ARCH_C) -mabi=$(ABI) \
  38 +RISCV_MARCH = $(ARCH_BASE)$(ARCH_A)$(ARCH_C)
  39 +
  40 +# Newer binutils versions default to ISA spec version 20191213 which moves some
  41 +# instructions from the I extension to the Zicsr and Zifencei extensions.
  42 +toolchain-need-zicsr-zifencei := $(call cc-option-yn, -mabi=$(ABI) -march=$(RISCV_MARCH)_zicsr_zifencei)
  43 +ifeq ($(toolchain-need-zicsr-zifencei),y)
  44 +       RISCV_MARCH := $(RISCV_MARCH)_zicsr_zifencei
  45 +endif
  46 +
  47 +ARCH_FLAGS = -march=$(RISCV_MARCH) -mabi=$(ABI) \
  48              -mcmodel=$(CMODEL)
  49
  50  PLATFORM_CPPFLAGS      += $(ARCH_FLAGS)