1 From 93064d0ae3e9d97c03a3aabd71e6048e1ac82f46 Mon Sep 17 00:00:00 2001
2 From: Jes Sorensen <Jes.Sorensen@redhat.com>
3 Date: Fri, 30 Sep 2016 19:18:34 -0400
4 Subject: [PATCH] rtl8xxxu: Fix rtl8192eu driver reload issue
6 The 8192eu suffered from two issues when reloading the driver.
8 The same problems as with the 8723bu where REG_RX_WAIT_CCA bits 22 and
9 23 didn't get set in rtl8192e_enable_rf().
11 In addition it also seems prone to issues when setting REG_RF_CTRL to
12 0 intead of just disabling the RF_ENABLE bit. Similar to what was
13 causing issues with the 8188eu.
15 With this patch I can successfully reload the driver and reassociate
16 to an APi with an 8192eu dongle.
18 Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com>
20 drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192e.c | 8 +++++++-
21 1 file changed, 7 insertions(+), 1 deletion(-)
23 --- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192e.c
24 +++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192e.c
25 @@ -1461,7 +1461,9 @@ static int rtl8192eu_active_to_emu(struc
29 - rtl8xxxu_write8(priv, REG_RF_CTRL, 0);
30 + val8 = rtl8xxxu_read8(priv, REG_RF_CTRL);
32 + rtl8xxxu_write8(priv, REG_RF_CTRL, val8);
34 /* Switch DPDT_SEL_P output from register 0x65[2] */
35 val8 = rtl8xxxu_read8(priv, REG_LEDCFG2);
36 @@ -1593,6 +1595,10 @@ static void rtl8192e_enable_rf(struct rt
40 + val32 = rtl8xxxu_read32(priv, REG_RX_WAIT_CCA);
41 + val32 |= (BIT(22) | BIT(23));
42 + rtl8xxxu_write32(priv, REG_RX_WAIT_CCA, val32);
44 val8 = rtl8xxxu_read8(priv, REG_GPIO_MUXCFG);
46 rtl8xxxu_write8(priv, REG_GPIO_MUXCFG, val8);