1 --- a/drivers/net/wireless/ath/ath9k/channel.c
2 +++ b/drivers/net/wireless/ath/ath9k/channel.c
9 /* Set/change channels. If the channel is really being changed, it's done
10 * by reseting the chip. To accomplish this we must first cleanup any pending
13 static int ath_set_channel(struct ath_softc *sc)
15 + struct device_node *np = sc->dev->of_node;
16 struct ath_hw *ah = sc->sc_ah;
17 struct ath_common *common = ath9k_hw_common(ah);
18 struct ieee80211_hw *hw = sc->hw;
19 @@ -42,6 +44,11 @@ static int ath_set_channel(struct ath_so
20 ath_dbg(common, CONFIG, "Set channel: %d MHz width: %d\n",
21 chan->center_freq, chandef->width);
23 + if (of_property_read_bool(np, "ubnt,hsr")) {
24 + ath9k_hsr_enable(ah, chandef->width, chan->center_freq);
25 + ath9k_hsr_status(ah);
28 /* update survey stats for the old channel before switching */
29 spin_lock_irqsave(&common->cc_lock, flags);
30 ath_update_survey_stats(sc);
32 +++ b/drivers/net/wireless/ath/ath9k/hsr.c
36 + * The MIT License (MIT)
38 + * Copyright (c) 2015 Kirill Berezin
40 + * Permission is hereby granted, free of charge, to any person obtaining a copy
41 + * of this software and associated documentation files (the "Software"), to deal
42 + * in the Software without restriction, including without limitation the rights
43 + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
44 + * copies of the Software, and to permit persons to whom the Software is
45 + * furnished to do so, subject to the following conditions:
47 + * The above copyright notice and this permission notice shall be included in
48 + * all copies or substantial portions of the Software.
50 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
51 + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
52 + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
53 + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
54 + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
55 + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
60 +#include <linux/io.h>
61 +#include <linux/slab.h>
62 +#include <linux/module.h>
63 +#include <linux/time.h>
64 +#include <linux/bitops.h>
65 +#include <linux/etherdevice.h>
66 +#include <linux/rtnetlink.h>
67 +#include <asm/unaligned.h>
72 +#define HSR_GPIO_CSN 8
73 +#define HSR_GPIO_CLK 6
74 +#define HSR_GPIO_DOUT 7
75 +#define HSR_GPIO_DIN 5
77 +/* delays are in useconds */
78 +#define HSR_DELAY_HALF_TICK 100
79 +#define HSR_DELAY_PRE_WRITE 75
80 +#define HSR_DELAY_FINAL 20000
81 +#define HSR_DELAY_TRAILING 200
83 +void ath9k_hsr_init(struct ath_hw *ah)
85 + ath9k_hw_gpio_request_in(ah, HSR_GPIO_DIN, NULL);
86 + ath9k_hw_gpio_request_out(ah, HSR_GPIO_CSN, NULL,
87 + AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
88 + ath9k_hw_gpio_request_out(ah, HSR_GPIO_CLK, NULL,
89 + AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
90 + ath9k_hw_gpio_request_out(ah, HSR_GPIO_DOUT, NULL,
91 + AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
93 + ath9k_hw_set_gpio(ah, HSR_GPIO_CSN, 1);
94 + ath9k_hw_set_gpio(ah, HSR_GPIO_CLK, 0);
95 + ath9k_hw_set_gpio(ah, HSR_GPIO_DOUT, 0);
97 + udelay(HSR_DELAY_TRAILING);
100 +static u32 ath9k_hsr_write_byte(struct ath_hw *ah, int delay, u32 value)
102 + struct ath_common *common = ath9k_hw_common(ah);
108 + ath9k_hw_set_gpio(ah, HSR_GPIO_CLK, 0);
109 + udelay(HSR_DELAY_HALF_TICK);
111 + ath9k_hw_set_gpio(ah, HSR_GPIO_CSN, 0);
112 + udelay(HSR_DELAY_HALF_TICK);
114 + for (i = 0; i < 8; ++i) {
117 + /* pattern is left to right, that is 7-th bit runs first */
118 + ath9k_hw_set_gpio(ah, HSR_GPIO_DOUT, (value >> (7 - i)) & 0x1);
119 + udelay(HSR_DELAY_HALF_TICK);
121 + ath9k_hw_set_gpio(ah, HSR_GPIO_CLK, 1);
122 + udelay(HSR_DELAY_HALF_TICK);
124 + rval |= ath9k_hw_gpio_get(ah, HSR_GPIO_DIN);
126 + ath9k_hw_set_gpio(ah, HSR_GPIO_CLK, 0);
127 + udelay(HSR_DELAY_HALF_TICK);
130 + ath9k_hw_set_gpio(ah, HSR_GPIO_CSN, 1);
131 + udelay(HSR_DELAY_HALF_TICK);
133 + ath_dbg(common, CONFIG, "ath9k_hsr_write_byte: write byte %d return value is %d %c\n",
134 + value, rval, rval > 32 ? rval : '-');
136 + return rval & 0xff;
139 +static int ath9k_hsr_write_a_chain(struct ath_hw *ah, char *chain, int items)
146 + ath9k_hsr_write_byte(ah, HSR_DELAY_PRE_WRITE, 0);
147 + status = ath9k_hsr_write_byte(ah, HSR_DELAY_PRE_WRITE, 0);
149 + /* clear HSR's reply buffer */
153 + for (loop = 0; (loop < 42) && status; ++loop)
154 + status = ath9k_hsr_write_byte(ah, HSR_DELAY_PRE_WRITE,
159 + "ath9k_hsr_write_a_chain: can't clear an output buffer after a 42 cycles.\n");
164 + for (i = 0; (i < items) && (chain[i] != 0); ++i)
165 + ath9k_hsr_write_byte(ah, HSR_DELAY_PRE_WRITE, (u32)chain[i]);
167 + ath9k_hsr_write_byte(ah, HSR_DELAY_PRE_WRITE, 0);
168 + mdelay(HSR_DELAY_FINAL / 1000);
171 + memset(chain, 0, items);
173 + ath9k_hsr_write_byte(ah, HSR_DELAY_PRE_WRITE, 0);
174 + udelay(HSR_DELAY_TRAILING);
176 + for (i = 0; i < (items - 1); ++i) {
179 + ret = ath9k_hsr_write_byte(ah, HSR_DELAY_PRE_WRITE, 0);
181 + chain[i] = (char)ret;
185 + udelay(HSR_DELAY_TRAILING);
191 + err = kstrtoint(chain + 1, 10, &i);
198 +int ath9k_hsr_disable(struct ath_hw *ah)
200 + char cmd[10] = {'b', '4', '0', 0, 0, 0, 0, 0, 0, 0};
203 + ret = ath9k_hsr_write_a_chain(ah, cmd, sizeof(cmd));
204 + if ((ret > 0) && (*cmd == 'B'))
210 +int ath9k_hsr_enable(struct ath_hw *ah, int bw, int fq)
215 + /* Bandwidth argument is 0 sometimes. Assume default 802.11bgn
216 + * 20MHz on invalid values
218 + if ((bw != 5) && (bw != 10) && (bw != 20) && (bw != 40))
221 + memset(cmd, 0, sizeof(cmd));
223 + snprintf(cmd + 1, 3, "%02d", bw);
225 + ret = ath9k_hsr_write_a_chain(ah, cmd, sizeof(cmd));
226 + if ((*cmd != 'B') || (ret != bw)) {
228 + "ath9k_hsr_enable: failed changing bandwidth -> set (%d,%d) reply (%d, %d)\n",
229 + 'b', bw, *cmd, ret);
233 + memset(cmd, 0, sizeof(cmd));
235 + ret = ath9k_hsr_write_a_chain(ah, cmd, sizeof(cmd));
238 + "ath9k_hsr_enable: failed 'x' command -> reply (%d, %d)\n",
243 + memset(cmd, 0, sizeof(cmd));
245 + ret = ath9k_hsr_write_a_chain(ah, cmd, sizeof(cmd));
248 + "ath9k_hsr_enable: failed 'm' command -> reply (%d, %d)\n",
253 + memset(cmd, 0, sizeof(cmd));
255 + snprintf(cmd + 1, 6, "%05d", fq);
256 + ret = ath9k_hsr_write_a_chain(ah, cmd, sizeof(cmd));
257 + if ((*cmd != 'F') && (ret != fq)) {
259 + "ath9k_hsr_enable: failed set frequency -> reply (%d, %d)\n",
267 +int ath9k_hsr_status(struct ath_hw *ah)
269 + char cmd[10] = {'s', 0, 0, 0, 0, 0, 0, 0, 0, 0};
272 + ret = ath9k_hsr_write_a_chain(ah, cmd, sizeof(cmd));
274 + ATH_DBG_WARN(1, "ath9k_hsr_status: returned %d,%d\n", *cmd,
282 +++ b/drivers/net/wireless/ath/ath9k/hsr.h
285 + * The MIT License (MIT)
287 + * Copyright (c) 2015 Kirill Berezin
289 + * Permission is hereby granted, free of charge, to any person obtaining a copy
290 + * of this software and associated documentation files (the "Software"), to deal
291 + * in the Software without restriction, including without limitation the rights
292 + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
293 + * copies of the Software, and to permit persons to whom the Software is
294 + * furnished to do so, subject to the following conditions:
296 + * The above copyright notice and this permission notice shall be included in
297 + * all copies or substantial portions of the Software.
299 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
300 + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
301 + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
302 + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
303 + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
304 + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
311 +#ifdef CPTCFG_ATH9K_UBNTHSR
313 +void ath9k_hsr_init(struct ath_hw *ah);
314 +int ath9k_hsr_disable(struct ath_hw *ah);
315 +int ath9k_hsr_enable(struct ath_hw *ah, int bw, int fq);
316 +int ath9k_hsr_status(struct ath_hw *ah);
319 +static inline void ath9k_hsr_init(struct ath_hw *ah) {}
321 +static inline int ath9k_hsr_enable(struct ath_hw *ah, int bw, int fq)
326 +static inline int ath9k_hsr_disable(struct ath_hw *ah) { return 0; }
327 +static inline int ath9k_hsr_status(struct ath_hw *ah) { return 0; }
332 --- a/drivers/net/wireless/ath/ath9k/main.c
333 +++ b/drivers/net/wireless/ath/ath9k/main.c
335 #include <linux/delay.h>
340 static void ath9k_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
341 u32 queues, bool drop);
342 @@ -659,6 +660,7 @@ void ath_reset_work(struct work_struct *
343 static int ath9k_start(struct ieee80211_hw *hw)
345 struct ath_softc *sc = hw->priv;
346 + struct device_node *np = sc->dev->of_node;
347 struct ath_hw *ah = sc->sc_ah;
348 struct ath_common *common = ath9k_hw_common(ah);
349 struct ieee80211_channel *curchan = sc->cur_chan->chandef.chan;
350 @@ -737,6 +739,11 @@ static int ath9k_start(struct ieee80211_
351 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
354 + if (of_property_read_bool(np, "ubnt,hsr")) {
355 + ath9k_hsr_init(ah);
356 + ath9k_hsr_disable(ah);
360 * Reset key cache to sane defaults (all entries cleared) instead of
361 * semi-random values after suspend/resume.
362 --- a/drivers/net/wireless/ath/ath9k/Makefile
363 +++ b/drivers/net/wireless/ath/ath9k/Makefile
364 @@ -17,6 +17,7 @@ ath9k-$(CPTCFG_ATH9K_DFS_CERTIFIED) += d
365 ath9k-$(CPTCFG_ATH9K_TX99) += tx99.o
366 ath9k-$(CPTCFG_ATH9K_WOW) += wow.o
367 ath9k-$(CPTCFG_ATH9K_HWRNG) += rng.o
368 +ath9k-$(CPTCFG_ATH9K_UBNTHSR) += hsr.o
370 ath9k-$(CPTCFG_ATH9K_DEBUGFS) += debug.o
374 @@ -137,6 +137,7 @@ ATH9K_WOW=
376 ATH9K_CHANNEL_CONTEXT=
382 --- a/drivers/net/wireless/ath/ath9k/Kconfig
383 +++ b/drivers/net/wireless/ath/ath9k/Kconfig
384 @@ -58,6 +58,19 @@ config ATH9K_AHB
385 Say Y, if you have a SoC with a compatible built-in
386 wireless MAC. Say N if unsure.
388 +config ATH9K_UBNTHSR
389 + bool "Ubiquiti UniFi Outdoor Plus HSR support"
392 + This options enables code to control the HSR RF
393 + filter in the receive path of the Ubiquiti UniFi
394 + Outdoor Plus access point.
396 + Say Y if you want to use the access point. The
397 + code will only be used if the device is detected,
398 + so it does not harm other setup other than occupying
402 bool "Atheros ath9k debugging"
403 depends on ATH9K && DEBUG_FS