package/kernel/mac80211/patches/rt2x00/050-rt2x00-add-RT3883-support.patch

   1 From d0e61a0f7cca51ce340a5a73595189972122ff25 Mon Sep 17 00:00:00 2001
   2 From: Gabor Juhos <juhosg@openwrt.org>
   3 Date: Wed, 24 Apr 2019 09:49:24 +0200
   4 Subject: [PATCH] rt2x00: add RT3883 support
   5
   6 Patch add support for RT3883 chip. Code was taken direclty
   7 from openwrt project and merge into one patch.
   8
   9 Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
  10 Signed-off-by: Stanislaw Gruszka <sgruszka@redhat.com>
  11 Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
  12 ---
  13  drivers/net/wireless/ralink/rt2x00/rt2800.h   |  19 +-
  14  .../net/wireless/ralink/rt2x00/rt2800lib.c    | 598 +++++++++++++++++-
  15  .../net/wireless/ralink/rt2x00/rt2800soc.c    |   9 +-
  16  3 files changed, 607 insertions(+), 19 deletions(-)
  17
  18 --- a/drivers/net/wireless/ralink/rt2x00/rt2800.h
  19 +++ b/drivers/net/wireless/ralink/rt2x00/rt2800.h
  20 @@ -48,7 +48,8 @@
  21   * RF2853 2.4G/5G 3T3R
  22   * RF3320 2.4G 1T1R(RT3350/RT3370/RT3390)
  23   * RF3322 2.4G 2T2R(RT3352/RT3371/RT3372/RT3391/RT3392)
  24 - * RF3053 2.4G/5G 3T3R(RT3883/RT3563/RT3573/RT3593/RT3662)
  25 + * RF3053 2.4G/5G 3T3R(RT3563/RT3573/RT3593)
  26 + * RF3853 2.4G/5G 3T3R(RT3883/RT3662)
  27   * RF5592 2.4G/5G 2T2R
  28   * RF3070 2.4G 1T1R
  29   * RF5360 2.4G 1T1R
  30 @@ -72,6 +73,7 @@
  31  #define RF5592                         0x000f
  32  #define RF3070                         0x3070
  33  #define RF3290                         0x3290
  34 +#define RF3853                         0x3853
  35  #define RF5350                         0x5350
  36  #define RF5360                         0x5360
  37  #define RF5362                         0x5362
  38 @@ -1726,6 +1728,20 @@
  39  #define TX_PWR_CFG_9B_STBC_MCS7                FIELD32(0x000000ff)
  40
  41  /*
  42 + * TX_TXBF_CFG:
  43 + */
  44 +#define TX_TXBF_CFG_0                  0x138c
  45 +#define TX_TXBF_CFG_1                  0x13a4
  46 +#define TX_TXBF_CFG_2                  0x13a8
  47 +#define TX_TXBF_CFG_3                  0x13ac
  48 +
  49 +/*
  50 + * TX_FBK_CFG_3S:
  51 + */
  52 +#define TX_FBK_CFG_3S_0                        0x13c4
  53 +#define TX_FBK_CFG_3S_1                        0x13c8
  54 +
  55 +/*
  56   * RX_FILTER_CFG: RX configuration register.
  57   */
  58  #define RX_FILTER_CFG                  0x1400
  59 @@ -2296,6 +2312,7 @@ struct mac_iveiv_entry {
  60  /*
  61   * RFCSR 2:
  62   */
  63 +#define RFCSR2_RESCAL_BP               FIELD8(0x40)
  64  #define RFCSR2_RESCAL_EN               FIELD8(0x80)
  65  #define RFCSR2_RX2_EN_MT7620           FIELD8(0x02)
  66  #define RFCSR2_TX2_EN_MT7620           FIELD8(0x20)
  67 --- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
  68 +++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
  69 @@ -381,7 +381,8 @@ static unsigned int rt2800_eeprom_word_i
  70                       wiphy_name(rt2x00dev->hw->wiphy), word))
  71                 return 0;
  72
  73 -       if (rt2x00_rt(rt2x00dev, RT3593))
  74 +       if (rt2x00_rt(rt2x00dev, RT3593) ||
  75 +           rt2x00_rt(rt2x00dev, RT3883))
  76                 map = rt2800_eeprom_map_ext;
  77         else
  78                 map = rt2800_eeprom_map;
  79 @@ -590,6 +591,7 @@ void rt2800_get_txwi_rxwi_size(struct rt
  80  {
  81         switch (rt2x00dev->chip.rt) {
  82         case RT3593:
  83 +       case RT3883:
  84                 *txwi_size = TXWI_DESC_SIZE_4WORDS;
  85                 *rxwi_size = RXWI_DESC_SIZE_5WORDS;
  86                 break;
  87 @@ -2180,7 +2182,8 @@ void rt2800_config_ant(struct rt2x00_dev
  88         rt2800_bbp_write(rt2x00dev, 3, r3);
  89         rt2800_bbp_write(rt2x00dev, 1, r1);
  90
  91 -       if (rt2x00_rt(rt2x00dev, RT3593)) {
  92 +       if (rt2x00_rt(rt2x00dev, RT3593) ||
  93 +           rt2x00_rt(rt2x00dev, RT3883)) {
  94                 if (ant->rx_chain_num == 1)
  95                         rt2800_bbp_write(rt2x00dev, 86, 0x00);
  96                 else
  97 @@ -2202,7 +2205,8 @@ static void rt2800_config_lna_gain(struc
  98                 eeprom = rt2800_eeprom_read(rt2x00dev, EEPROM_LNA);
  99                 lna_gain = rt2x00_get_field16(eeprom, EEPROM_LNA_A0);
 100         } else if (libconf->rf.channel <= 128) {
 101 -               if (rt2x00_rt(rt2x00dev, RT3593)) {
 102 +               if (rt2x00_rt(rt2x00dev, RT3593) ||
 103 +                   rt2x00_rt(rt2x00dev, RT3883)) {
 104                         eeprom = rt2800_eeprom_read(rt2x00dev, EEPROM_EXT_LNA2);
 105                         lna_gain = rt2x00_get_field16(eeprom,
 106                                                       EEPROM_EXT_LNA2_A1);
 107 @@ -2212,7 +2216,8 @@ static void rt2800_config_lna_gain(struc
 108                                                       EEPROM_RSSI_BG2_LNA_A1);
 109                 }
 110         } else {
 111 -               if (rt2x00_rt(rt2x00dev, RT3593)) {
 112 +               if (rt2x00_rt(rt2x00dev, RT3593) ||
 113 +                   rt2x00_rt(rt2x00dev, RT3883)) {
 114                         eeprom = rt2800_eeprom_read(rt2x00dev, EEPROM_EXT_LNA2);
 115                         lna_gain = rt2x00_get_field16(eeprom,
 116                                                       EEPROM_EXT_LNA2_A2);
 117 @@ -2880,6 +2885,211 @@ static void rt2800_config_channel_rf3053
 118         }
 119  }
 120
 121 +static void rt2800_config_channel_rf3853(struct rt2x00_dev *rt2x00dev,
 122 +                                        struct ieee80211_conf *conf,
 123 +                                        struct rf_channel *rf,
 124 +                                        struct channel_info *info)
 125 +{
 126 +       u8 rfcsr;
 127 +       u8 bbp;
 128 +       u8 pwr1, pwr2, pwr3;
 129 +
 130 +       const bool txbf_enabled = false; /* TODO */
 131 +
 132 +       /* TODO: add band selection */
 133 +
 134 +       if (rf->channel <= 14)
 135 +               rt2800_rfcsr_write(rt2x00dev, 6, 0x40);
 136 +       else if (rf->channel < 132)
 137 +               rt2800_rfcsr_write(rt2x00dev, 6, 0x80);
 138 +       else
 139 +               rt2800_rfcsr_write(rt2x00dev, 6, 0x40);
 140 +
 141 +       rt2800_rfcsr_write(rt2x00dev, 8, rf->rf1);
 142 +       rt2800_rfcsr_write(rt2x00dev, 9, rf->rf3);
 143 +
 144 +       if (rf->channel <= 14)
 145 +               rt2800_rfcsr_write(rt2x00dev, 11, 0x46);
 146 +       else
 147 +               rt2800_rfcsr_write(rt2x00dev, 11, 0x48);
 148 +
 149 +       if (rf->channel <= 14)
 150 +               rt2800_rfcsr_write(rt2x00dev, 12, 0x1a);
 151 +       else
 152 +               rt2800_rfcsr_write(rt2x00dev, 12, 0x52);
 153 +
 154 +       rt2800_rfcsr_write(rt2x00dev, 13, 0x12);
 155 +
 156 +       rfcsr = rt2800_rfcsr_read(rt2x00dev, 1);
 157 +       rt2x00_set_field8(&rfcsr, RFCSR1_RX0_PD, 0);
 158 +       rt2x00_set_field8(&rfcsr, RFCSR1_TX0_PD, 0);
 159 +       rt2x00_set_field8(&rfcsr, RFCSR1_RX1_PD, 0);
 160 +       rt2x00_set_field8(&rfcsr, RFCSR1_TX1_PD, 0);
 161 +       rt2x00_set_field8(&rfcsr, RFCSR1_RX2_PD, 0);
 162 +       rt2x00_set_field8(&rfcsr, RFCSR1_TX2_PD, 0);
 163 +       rt2x00_set_field8(&rfcsr, RFCSR1_RF_BLOCK_EN, 1);
 164 +       rt2x00_set_field8(&rfcsr, RFCSR1_PLL_PD, 1);
 165 +
 166 +       switch (rt2x00dev->default_ant.tx_chain_num) {
 167 +       case 3:
 168 +               rt2x00_set_field8(&rfcsr, RFCSR1_TX2_PD, 1);
 169 +               /* fallthrough */
 170 +       case 2:
 171 +               rt2x00_set_field8(&rfcsr, RFCSR1_TX1_PD, 1);
 172 +               /* fallthrough */
 173 +       case 1:
 174 +               rt2x00_set_field8(&rfcsr, RFCSR1_TX0_PD, 1);
 175 +               break;
 176 +       }
 177 +
 178 +       switch (rt2x00dev->default_ant.rx_chain_num) {
 179 +       case 3:
 180 +               rt2x00_set_field8(&rfcsr, RFCSR1_RX2_PD, 1);
 181 +               /* fallthrough */
 182 +       case 2:
 183 +               rt2x00_set_field8(&rfcsr, RFCSR1_RX1_PD, 1);
 184 +               /* fallthrough */
 185 +       case 1:
 186 +               rt2x00_set_field8(&rfcsr, RFCSR1_RX0_PD, 1);
 187 +               break;
 188 +       }
 189 +       rt2800_rfcsr_write(rt2x00dev, 1, rfcsr);
 190 +
 191 +       rt2800_freq_cal_mode1(rt2x00dev);
 192 +
 193 +       rfcsr = rt2800_rfcsr_read(rt2x00dev, 30);
 194 +       if (!conf_is_ht40(conf))
 195 +               rfcsr &= ~(0x06);
 196 +       else
 197 +               rfcsr |= 0x06;
 198 +       rt2800_rfcsr_write(rt2x00dev, 30, rfcsr);
 199 +
 200 +       if (rf->channel <= 14)
 201 +               rt2800_rfcsr_write(rt2x00dev, 31, 0xa0);
 202 +       else
 203 +               rt2800_rfcsr_write(rt2x00dev, 31, 0x80);
 204 +
 205 +       if (conf_is_ht40(conf))
 206 +               rt2800_rfcsr_write(rt2x00dev, 32, 0x80);
 207 +       else
 208 +               rt2800_rfcsr_write(rt2x00dev, 32, 0xd8);
 209 +
 210 +       if (rf->channel <= 14)
 211 +               rt2800_rfcsr_write(rt2x00dev, 34, 0x3c);
 212 +       else
 213 +               rt2800_rfcsr_write(rt2x00dev, 34, 0x20);
 214 +
 215 +       /* loopback RF_BS */
 216 +       rfcsr = rt2800_rfcsr_read(rt2x00dev, 36);
 217 +       if (rf->channel <= 14)
 218 +               rt2x00_set_field8(&rfcsr, RFCSR36_RF_BS, 1);
 219 +       else
 220 +               rt2x00_set_field8(&rfcsr, RFCSR36_RF_BS, 0);
 221 +       rt2800_rfcsr_write(rt2x00dev, 36, rfcsr);
 222 +
 223 +       if (rf->channel <= 14)
 224 +               rfcsr = 0x23;
 225 +       else if (rf->channel < 100)
 226 +               rfcsr = 0x36;
 227 +       else if (rf->channel < 132)
 228 +               rfcsr = 0x32;
 229 +       else
 230 +               rfcsr = 0x30;
 231 +
 232 +       if (txbf_enabled)
 233 +               rfcsr |= 0x40;
 234 +
 235 +       rt2800_rfcsr_write(rt2x00dev, 39, rfcsr);
 236 +
 237 +       if (rf->channel <= 14)
 238 +               rt2800_rfcsr_write(rt2x00dev, 44, 0x93);
 239 +       else
 240 +               rt2800_rfcsr_write(rt2x00dev, 44, 0x9b);
 241 +
 242 +       if (rf->channel <= 14)
 243 +               rfcsr = 0xbb;
 244 +       else if (rf->channel < 100)
 245 +               rfcsr = 0xeb;
 246 +       else if (rf->channel < 132)
 247 +               rfcsr = 0xb3;
 248 +       else
 249 +               rfcsr = 0x9b;
 250 +       rt2800_rfcsr_write(rt2x00dev, 45, rfcsr);
 251 +
 252 +       if (rf->channel <= 14)
 253 +               rfcsr = 0x8e;
 254 +       else
 255 +               rfcsr = 0x8a;
 256 +
 257 +       if (txbf_enabled)
 258 +               rfcsr |= 0x20;
 259 +
 260 +       rt2800_rfcsr_write(rt2x00dev, 49, rfcsr);
 261 +
 262 +       rt2800_rfcsr_write(rt2x00dev, 50, 0x86);
 263 +
 264 +       rfcsr = rt2800_rfcsr_read(rt2x00dev, 51);
 265 +       if (rf->channel <= 14)
 266 +               rt2800_rfcsr_write(rt2x00dev, 51, 0x75);
 267 +       else
 268 +               rt2800_rfcsr_write(rt2x00dev, 51, 0x51);
 269 +
 270 +       rfcsr = rt2800_rfcsr_read(rt2x00dev, 52);
 271 +       if (rf->channel <= 14)
 272 +               rt2800_rfcsr_write(rt2x00dev, 52, 0x45);
 273 +       else
 274 +               rt2800_rfcsr_write(rt2x00dev, 52, 0x05);
 275 +
 276 +       if (rf->channel <= 14) {
 277 +               pwr1 = info->default_power1 & 0x1f;
 278 +               pwr2 = info->default_power2 & 0x1f;
 279 +               pwr3 = info->default_power3 & 0x1f;
 280 +       } else {
 281 +               pwr1 = 0x48 | ((info->default_power1 & 0x18) << 1) |
 282 +                       (info->default_power1 & 0x7);
 283 +               pwr2 = 0x48 | ((info->default_power2 & 0x18) << 1) |
 284 +                       (info->default_power2 & 0x7);
 285 +               pwr3 = 0x48 | ((info->default_power3 & 0x18) << 1) |
 286 +                       (info->default_power3 & 0x7);
 287 +       }
 288 +
 289 +       rt2800_rfcsr_write(rt2x00dev, 53, pwr1);
 290 +       rt2800_rfcsr_write(rt2x00dev, 54, pwr2);
 291 +       rt2800_rfcsr_write(rt2x00dev, 55, pwr3);
 292 +
 293 +       rt2x00_dbg(rt2x00dev, "Channel:%d, pwr1:%02x, pwr2:%02x, pwr3:%02x\n",
 294 +                  rf->channel, pwr1, pwr2, pwr3);
 295 +
 296 +       bbp = (info->default_power1 >> 5) |
 297 +             ((info->default_power2 & 0xe0) >> 1);
 298 +       rt2800_bbp_write(rt2x00dev, 109, bbp);
 299 +
 300 +       bbp = rt2800_bbp_read(rt2x00dev, 110);
 301 +       bbp &= 0x0f;
 302 +       bbp |= (info->default_power3 & 0xe0) >> 1;
 303 +       rt2800_bbp_write(rt2x00dev, 110, bbp);
 304 +
 305 +       rfcsr = rt2800_rfcsr_read(rt2x00dev, 57);
 306 +       if (rf->channel <= 14)
 307 +               rt2800_rfcsr_write(rt2x00dev, 57, 0x6e);
 308 +       else
 309 +               rt2800_rfcsr_write(rt2x00dev, 57, 0x3e);
 310 +
 311 +       /* Enable RF tuning */
 312 +       rfcsr = rt2800_rfcsr_read(rt2x00dev, 3);
 313 +       rt2x00_set_field8(&rfcsr, RFCSR3_VCOCAL_EN, 1);
 314 +       rt2800_rfcsr_write(rt2x00dev, 3, rfcsr);
 315 +
 316 +       udelay(2000);
 317 +
 318 +       bbp = rt2800_bbp_read(rt2x00dev, 49);
 319 +       /* clear update flag */
 320 +       rt2800_bbp_write(rt2x00dev, 49, bbp & 0xfe);
 321 +       rt2800_bbp_write(rt2x00dev, 49, bbp);
 322 +
 323 +       /* TODO: add calibration for TxBF */
 324 +}
 325 +
 326  #define POWER_BOUND            0x27
 327  #define POWER_BOUND_5G         0x2b
 328
 329 @@ -3683,19 +3893,51 @@ static char rt2800_txpower_to_dev(struct
 330                                   unsigned int channel,
 331                                   char txpower)
 332  {
 333 -       if (rt2x00_rt(rt2x00dev, RT3593))
 334 +       if (rt2x00_rt(rt2x00dev, RT3593) ||
 335 +           rt2x00_rt(rt2x00dev, RT3883))
 336                 txpower = rt2x00_get_field8(txpower, EEPROM_TXPOWER_ALC);
 337
 338         if (channel <= 14)
 339                 return clamp_t(char, txpower, MIN_G_TXPOWER, MAX_G_TXPOWER);
 340
 341 -       if (rt2x00_rt(rt2x00dev, RT3593))
 342 +       if (rt2x00_rt(rt2x00dev, RT3593) ||
 343 +           rt2x00_rt(rt2x00dev, RT3883))
 344                 return clamp_t(char, txpower, MIN_A_TXPOWER_3593,
 345                                MAX_A_TXPOWER_3593);
 346         else
 347                 return clamp_t(char, txpower, MIN_A_TXPOWER, MAX_A_TXPOWER);
 348  }
 349
 350 +static void rt3883_bbp_adjust(struct rt2x00_dev *rt2x00dev,
 351 +                             struct rf_channel *rf)
 352 +{
 353 +       u8 bbp;
 354 +
 355 +       bbp = (rf->channel > 14) ? 0x48 : 0x38;
 356 +       rt2800_bbp_write_with_rx_chain(rt2x00dev, 66, bbp);
 357 +
 358 +       rt2800_bbp_write(rt2x00dev, 69, 0x12);
 359 +
 360 +       if (rf->channel <= 14) {
 361 +               rt2800_bbp_write(rt2x00dev, 70, 0x0a);
 362 +       } else {
 363 +               /* Disable CCK packet detection */
 364 +               rt2800_bbp_write(rt2x00dev, 70, 0x00);
 365 +       }
 366 +
 367 +       rt2800_bbp_write(rt2x00dev, 73, 0x10);
 368 +
 369 +       if (rf->channel > 14) {
 370 +               rt2800_bbp_write(rt2x00dev, 62, 0x1d);
 371 +               rt2800_bbp_write(rt2x00dev, 63, 0x1d);
 372 +               rt2800_bbp_write(rt2x00dev, 64, 0x1d);
 373 +       } else {
 374 +               rt2800_bbp_write(rt2x00dev, 62, 0x2d);
 375 +               rt2800_bbp_write(rt2x00dev, 63, 0x2d);
 376 +               rt2800_bbp_write(rt2x00dev, 64, 0x2d);
 377 +       }
 378 +}
 379 +
 380  static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev,
 381                                   struct ieee80211_conf *conf,
 382                                   struct rf_channel *rf,
 383 @@ -3714,6 +3956,12 @@ static void rt2800_config_channel(struct
 384                         rt2800_txpower_to_dev(rt2x00dev, rf->channel,
 385                                               info->default_power3);
 386
 387 +       switch (rt2x00dev->chip.rt) {
 388 +       case RT3883:
 389 +               rt3883_bbp_adjust(rt2x00dev, rf);
 390 +               break;
 391 +       }
 392 +
 393         switch (rt2x00dev->chip.rf) {
 394         case RF2020:
 395         case RF3020:
 396 @@ -3734,6 +3982,9 @@ static void rt2800_config_channel(struct
 397         case RF3322:
 398                 rt2800_config_channel_rf3322(rt2x00dev, conf, rf, info);
 399                 break;
 400 +       case RF3853:
 401 +               rt2800_config_channel_rf3853(rt2x00dev, conf, rf, info);
 402 +               break;
 403         case RF3070:
 404         case RF5350:
 405         case RF5360:
 406 @@ -3815,6 +4066,15 @@ static void rt2800_config_channel(struct
 407                 rt2800_bbp_write(rt2x00dev, 63, 0x37 - rt2x00dev->lna_gain);
 408                 rt2800_bbp_write(rt2x00dev, 64, 0x37 - rt2x00dev->lna_gain);
 409                 rt2800_bbp_write(rt2x00dev, 77, 0x98);
 410 +       } else if (rt2x00_rt(rt2x00dev, RT3883)) {
 411 +               rt2800_bbp_write(rt2x00dev, 62, 0x37 - rt2x00dev->lna_gain);
 412 +               rt2800_bbp_write(rt2x00dev, 63, 0x37 - rt2x00dev->lna_gain);
 413 +               rt2800_bbp_write(rt2x00dev, 64, 0x37 - rt2x00dev->lna_gain);
 414 +
 415 +               if (rt2x00dev->default_ant.rx_chain_num > 1)
 416 +                       rt2800_bbp_write(rt2x00dev, 86, 0x46);
 417 +               else
 418 +                       rt2800_bbp_write(rt2x00dev, 86, 0);
 419         } else {
 420                 rt2800_bbp_write(rt2x00dev, 62, 0x37 - rt2x00dev->lna_gain);
 421                 rt2800_bbp_write(rt2x00dev, 63, 0x37 - rt2x00dev->lna_gain);
 422 @@ -3828,6 +4088,7 @@ static void rt2800_config_channel(struct
 423                     !rt2x00_rt(rt2x00dev, RT6352)) {
 424                         if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
 425                                 rt2800_bbp_write(rt2x00dev, 82, 0x62);
 426 +                               rt2800_bbp_write(rt2x00dev, 82, 0x62);
 427                                 rt2800_bbp_write(rt2x00dev, 75, 0x46);
 428                         } else {
 429                                 if (rt2x00_rt(rt2x00dev, RT3593))
 430 @@ -3836,19 +4097,22 @@ static void rt2800_config_channel(struct
 431                                         rt2800_bbp_write(rt2x00dev, 82, 0x84);
 432                                 rt2800_bbp_write(rt2x00dev, 75, 0x50);
 433                         }
 434 -                       if (rt2x00_rt(rt2x00dev, RT3593))
 435 +                       if (rt2x00_rt(rt2x00dev, RT3593) ||
 436 +                           rt2x00_rt(rt2x00dev, RT3883))
 437                                 rt2800_bbp_write(rt2x00dev, 83, 0x8a);
 438                 }
 439
 440         } else {
 441                 if (rt2x00_rt(rt2x00dev, RT3572))
 442                         rt2800_bbp_write(rt2x00dev, 82, 0x94);
 443 -               else if (rt2x00_rt(rt2x00dev, RT3593))
 444 +               else if (rt2x00_rt(rt2x00dev, RT3593) ||
 445 +                        rt2x00_rt(rt2x00dev, RT3883))
 446                         rt2800_bbp_write(rt2x00dev, 82, 0x82);
 447                 else if (!rt2x00_rt(rt2x00dev, RT6352))
 448                         rt2800_bbp_write(rt2x00dev, 82, 0xf2);
 449
 450 -               if (rt2x00_rt(rt2x00dev, RT3593))
 451 +               if (rt2x00_rt(rt2x00dev, RT3593) ||
 452 +                   rt2x00_rt(rt2x00dev, RT3883))
 453                         rt2800_bbp_write(rt2x00dev, 83, 0x9a);
 454
 455                 if (rt2x00_has_cap_external_lna_a(rt2x00dev))
 456 @@ -3984,6 +4248,23 @@ static void rt2800_config_channel(struct
 457                 usleep_range(1000, 1500);
 458         }
 459
 460 +       if (rt2x00_rt(rt2x00dev, RT3883)) {
 461 +               if (!conf_is_ht40(conf))
 462 +                       rt2800_bbp_write(rt2x00dev, 105, 0x34);
 463 +               else
 464 +                       rt2800_bbp_write(rt2x00dev, 105, 0x04);
 465 +
 466 +               /* AGC init */
 467 +               if (rf->channel <= 14)
 468 +                       reg = 0x2e + rt2x00dev->lna_gain;
 469 +               else
 470 +                       reg = 0x20 + ((rt2x00dev->lna_gain * 5) / 3);
 471 +
 472 +               rt2800_bbp_write_with_rx_chain(rt2x00dev, 66, reg);
 473 +
 474 +               usleep_range(1000, 1500);
 475 +       }
 476 +
 477         if (rt2x00_rt(rt2x00dev, RT5592) || rt2x00_rt(rt2x00dev, RT6352)) {
 478                 reg = 0x10;
 479                 if (!conf_is_ht40(conf)) {
 480 @@ -4243,6 +4524,9 @@ static u8 rt2800_compensate_txpower(stru
 481         if (rt2x00_rt(rt2x00dev, RT3593))
 482                 return min_t(u8, txpower, 0xc);
 483
 484 +       if (rt2x00_rt(rt2x00dev, RT3883))
 485 +               return min_t(u8, txpower, 0xf);
 486 +
 487         if (rt2x00_has_cap_power_limit(rt2x00dev)) {
 488                 /*
 489                  * Check if eirp txpower exceed txpower_limit.
 490 @@ -5004,7 +5288,8 @@ static void rt2800_config_txpower(struct
 491                                   struct ieee80211_channel *chan,
 492                                   int power_level)
 493  {
 494 -       if (rt2x00_rt(rt2x00dev, RT3593))
 495 +       if (rt2x00_rt(rt2x00dev, RT3593) ||
 496 +           rt2x00_rt(rt2x00dev, RT3883))
 497                 rt2800_config_txpower_rt3593(rt2x00dev, chan, power_level);
 498         else if (rt2x00_rt(rt2x00dev, RT6352))
 499                 rt2800_config_txpower_rt6352(rt2x00dev, chan, power_level);
 500 @@ -5051,6 +5336,7 @@ void rt2800_vco_calibration(struct rt2x0
 501         case RF3053:
 502         case RF3070:
 503         case RF3290:
 504 +       case RF3853:
 505         case RF5350:
 506         case RF5360:
 507         case RF5362:
 508 @@ -5251,7 +5537,8 @@ static u8 rt2800_get_default_vgc(struct
 509                 else
 510                         vgc = 0x2e + rt2x00dev->lna_gain;
 511         } else { /* 5GHZ band */
 512 -               if (rt2x00_rt(rt2x00dev, RT3593))
 513 +               if (rt2x00_rt(rt2x00dev, RT3593) ||
 514 +                   rt2x00_rt(rt2x00dev, RT3883))
 515                         vgc = 0x20 + (rt2x00dev->lna_gain * 5) / 3;
 516                 else if (rt2x00_rt(rt2x00dev, RT5592))
 517                         vgc = 0x24 + (2 * rt2x00dev->lna_gain);
 518 @@ -5271,7 +5558,8 @@ static inline void rt2800_set_vgc(struct
 519  {
 520         if (qual->vgc_level != vgc_level) {
 521                 if (rt2x00_rt(rt2x00dev, RT3572) ||
 522 -                   rt2x00_rt(rt2x00dev, RT3593)) {
 523 +                   rt2x00_rt(rt2x00dev, RT3593) ||
 524 +                   rt2x00_rt(rt2x00dev, RT3883)) {
 525                         rt2800_bbp_write_with_rx_chain(rt2x00dev, 66,
 526                                                        vgc_level);
 527                 } else if (rt2x00_rt(rt2x00dev, RT5592)) {
 528 @@ -5318,6 +5606,11 @@ void rt2800_link_tuner(struct rt2x00_dev
 529                 }
 530                 break;
 531
 532 +       case RT3883:
 533 +               if (qual->rssi > -65)
 534 +                       vgc += 0x10;
 535 +               break;
 536 +
 537         case RT5592:
 538                 if (qual->rssi > -65)
 539                         vgc += 0x20;
 540 @@ -5470,6 +5763,12 @@ static int rt2800_init_registers(struct
 541                         rt2800_register_write(rt2x00dev, TX_SW_CFG2,
 542                                               0x00000000);
 543                 }
 544 +       } else if (rt2x00_rt(rt2x00dev, RT3883)) {
 545 +               rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000402);
 546 +               rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00000000);
 547 +               rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00040000);
 548 +               rt2800_register_write(rt2x00dev, TX_TXBF_CFG_0, 0x8000fc21);
 549 +               rt2800_register_write(rt2x00dev, TX_TXBF_CFG_3, 0x00009c40);
 550         } else if (rt2x00_rt(rt2x00dev, RT5390) ||
 551                    rt2x00_rt(rt2x00dev, RT5392) ||
 552                    rt2x00_rt(rt2x00dev, RT6352)) {
 553 @@ -5683,6 +5982,11 @@ static int rt2800_init_registers(struct
 554         reg = rt2x00_rt(rt2x00dev, RT5592) ? 0x00000082 : 0x00000002;
 555         rt2800_register_write(rt2x00dev, TXOP_HLDR_ET, reg);
 556
 557 +       if (rt2x00_rt(rt2x00dev, RT3883)) {
 558 +               rt2800_register_write(rt2x00dev, TX_FBK_CFG_3S_0, 0x12111008);
 559 +               rt2800_register_write(rt2x00dev, TX_FBK_CFG_3S_1, 0x16151413);
 560 +       }
 561 +
 562         reg = rt2800_register_read(rt2x00dev, TX_RTS_CFG);
 563         rt2x00_set_field32(&reg, TX_RTS_CFG_AUTO_RTS_RETRY_LIMIT, 7);
 564         rt2x00_set_field32(&reg, TX_RTS_CFG_RTS_THRES,
 565 @@ -6299,6 +6603,47 @@ static void rt2800_init_bbp_3593(struct
 566                 rt2800_bbp_write(rt2x00dev, 103, 0xc0);
 567  }
 568
 569 +static void rt2800_init_bbp_3883(struct rt2x00_dev *rt2x00dev)
 570 +{
 571 +       rt2800_init_bbp_early(rt2x00dev);
 572 +
 573 +       rt2800_bbp_write(rt2x00dev, 4, 0x50);
 574 +       rt2800_bbp_write(rt2x00dev, 47, 0x48);
 575 +
 576 +       rt2800_bbp_write(rt2x00dev, 86, 0x46);
 577 +       rt2800_bbp_write(rt2x00dev, 88, 0x90);
 578 +
 579 +       rt2800_bbp_write(rt2x00dev, 92, 0x02);
 580 +
 581 +       rt2800_bbp_write(rt2x00dev, 103, 0xc0);
 582 +       rt2800_bbp_write(rt2x00dev, 104, 0x92);
 583 +       rt2800_bbp_write(rt2x00dev, 105, 0x34);
 584 +       rt2800_bbp_write(rt2x00dev, 106, 0x12);
 585 +       rt2800_bbp_write(rt2x00dev, 120, 0x50);
 586 +       rt2800_bbp_write(rt2x00dev, 137, 0x0f);
 587 +       rt2800_bbp_write(rt2x00dev, 163, 0x9d);
 588 +
 589 +       /* Set ITxBF timeout to 0x9C40=1000msec */
 590 +       rt2800_bbp_write(rt2x00dev, 179, 0x02);
 591 +       rt2800_bbp_write(rt2x00dev, 180, 0x00);
 592 +       rt2800_bbp_write(rt2x00dev, 182, 0x40);
 593 +       rt2800_bbp_write(rt2x00dev, 180, 0x01);
 594 +       rt2800_bbp_write(rt2x00dev, 182, 0x9c);
 595 +
 596 +       rt2800_bbp_write(rt2x00dev, 179, 0x00);
 597 +
 598 +       /* Reprogram the inband interface to put right values in RXWI */
 599 +       rt2800_bbp_write(rt2x00dev, 142, 0x04);
 600 +       rt2800_bbp_write(rt2x00dev, 143, 0x3b);
 601 +       rt2800_bbp_write(rt2x00dev, 142, 0x06);
 602 +       rt2800_bbp_write(rt2x00dev, 143, 0xa0);
 603 +       rt2800_bbp_write(rt2x00dev, 142, 0x07);
 604 +       rt2800_bbp_write(rt2x00dev, 143, 0xa1);
 605 +       rt2800_bbp_write(rt2x00dev, 142, 0x08);
 606 +       rt2800_bbp_write(rt2x00dev, 143, 0xa2);
 607 +       rt2800_bbp_write(rt2x00dev, 148, 0xc8);
 608 +}
 609 +
 610  static void rt2800_init_bbp_53xx(struct rt2x00_dev *rt2x00dev)
 611  {
 612         int ant, div_mode;
 613 @@ -6743,6 +7088,9 @@ static void rt2800_init_bbp(struct rt2x0
 614         case RT3593:
 615                 rt2800_init_bbp_3593(rt2x00dev);
 616                 return;
 617 +       case RT3883:
 618 +               rt2800_init_bbp_3883(rt2x00dev);
 619 +               return;
 620         case RT5390:
 621         case RT5392:
 622                 rt2800_init_bbp_53xx(rt2x00dev);
 623 @@ -7614,6 +7962,144 @@ static void rt2800_init_rfcsr_5350(struc
 624         rt2800_rfcsr_write(rt2x00dev, 63, 0x00);
 625  }
 626
 627 +static void rt2800_init_rfcsr_3883(struct rt2x00_dev *rt2x00dev)
 628 +{
 629 +       u8 rfcsr;
 630 +
 631 +       /* TODO: get the actual ECO value from the SoC */
 632 +       const unsigned int eco = 5;
 633 +
 634 +       rt2800_rf_init_calibration(rt2x00dev, 2);
 635 +
 636 +       rt2800_rfcsr_write(rt2x00dev, 0, 0xe0);
 637 +       rt2800_rfcsr_write(rt2x00dev, 1, 0x03);
 638 +       rt2800_rfcsr_write(rt2x00dev, 2, 0x50);
 639 +       rt2800_rfcsr_write(rt2x00dev, 3, 0x20);
 640 +       rt2800_rfcsr_write(rt2x00dev, 4, 0x00);
 641 +       rt2800_rfcsr_write(rt2x00dev, 5, 0x00);
 642 +       rt2800_rfcsr_write(rt2x00dev, 6, 0x40);
 643 +       rt2800_rfcsr_write(rt2x00dev, 7, 0x00);
 644 +       rt2800_rfcsr_write(rt2x00dev, 8, 0x5b);
 645 +       rt2800_rfcsr_write(rt2x00dev, 9, 0x08);
 646 +       rt2800_rfcsr_write(rt2x00dev, 10, 0xd3);
 647 +       rt2800_rfcsr_write(rt2x00dev, 11, 0x48);
 648 +       rt2800_rfcsr_write(rt2x00dev, 12, 0x1a);
 649 +       rt2800_rfcsr_write(rt2x00dev, 13, 0x12);
 650 +       rt2800_rfcsr_write(rt2x00dev, 14, 0x00);
 651 +       rt2800_rfcsr_write(rt2x00dev, 15, 0x00);
 652 +       rt2800_rfcsr_write(rt2x00dev, 16, 0x00);
 653 +
 654 +       /* RFCSR 17 will be initialized later based on the
 655 +        * frequency offset stored in the EEPROM
 656 +        */
 657 +
 658 +       rt2800_rfcsr_write(rt2x00dev, 18, 0x40);
 659 +       rt2800_rfcsr_write(rt2x00dev, 19, 0x00);
 660 +       rt2800_rfcsr_write(rt2x00dev, 20, 0x00);
 661 +       rt2800_rfcsr_write(rt2x00dev, 21, 0x00);
 662 +       rt2800_rfcsr_write(rt2x00dev, 22, 0x20);
 663 +       rt2800_rfcsr_write(rt2x00dev, 23, 0xc0);
 664 +       rt2800_rfcsr_write(rt2x00dev, 24, 0x00);
 665 +       rt2800_rfcsr_write(rt2x00dev, 25, 0x00);
 666 +       rt2800_rfcsr_write(rt2x00dev, 26, 0x00);
 667 +       rt2800_rfcsr_write(rt2x00dev, 27, 0x00);
 668 +       rt2800_rfcsr_write(rt2x00dev, 28, 0x00);
 669 +       rt2800_rfcsr_write(rt2x00dev, 29, 0x00);
 670 +       rt2800_rfcsr_write(rt2x00dev, 30, 0x10);
 671 +       rt2800_rfcsr_write(rt2x00dev, 31, 0x80);
 672 +       rt2800_rfcsr_write(rt2x00dev, 32, 0x80);
 673 +       rt2800_rfcsr_write(rt2x00dev, 33, 0x00);
 674 +       rt2800_rfcsr_write(rt2x00dev, 34, 0x20);
 675 +       rt2800_rfcsr_write(rt2x00dev, 35, 0x00);
 676 +       rt2800_rfcsr_write(rt2x00dev, 36, 0x00);
 677 +       rt2800_rfcsr_write(rt2x00dev, 37, 0x00);
 678 +       rt2800_rfcsr_write(rt2x00dev, 38, 0x86);
 679 +       rt2800_rfcsr_write(rt2x00dev, 39, 0x23);
 680 +       rt2800_rfcsr_write(rt2x00dev, 40, 0x00);
 681 +       rt2800_rfcsr_write(rt2x00dev, 41, 0x00);
 682 +       rt2800_rfcsr_write(rt2x00dev, 42, 0x00);
 683 +       rt2800_rfcsr_write(rt2x00dev, 43, 0x00);
 684 +       rt2800_rfcsr_write(rt2x00dev, 44, 0x93);
 685 +       rt2800_rfcsr_write(rt2x00dev, 45, 0xbb);
 686 +       rt2800_rfcsr_write(rt2x00dev, 46, 0x60);
 687 +       rt2800_rfcsr_write(rt2x00dev, 47, 0x00);
 688 +       rt2800_rfcsr_write(rt2x00dev, 48, 0x00);
 689 +       rt2800_rfcsr_write(rt2x00dev, 49, 0x8e);
 690 +       rt2800_rfcsr_write(rt2x00dev, 50, 0x86);
 691 +       rt2800_rfcsr_write(rt2x00dev, 51, 0x51);
 692 +       rt2800_rfcsr_write(rt2x00dev, 52, 0x05);
 693 +       rt2800_rfcsr_write(rt2x00dev, 53, 0x76);
 694 +       rt2800_rfcsr_write(rt2x00dev, 54, 0x76);
 695 +       rt2800_rfcsr_write(rt2x00dev, 55, 0x76);
 696 +       rt2800_rfcsr_write(rt2x00dev, 56, 0xdb);
 697 +       rt2800_rfcsr_write(rt2x00dev, 57, 0x3e);
 698 +       rt2800_rfcsr_write(rt2x00dev, 58, 0x00);
 699 +       rt2800_rfcsr_write(rt2x00dev, 59, 0x00);
 700 +       rt2800_rfcsr_write(rt2x00dev, 60, 0x00);
 701 +       rt2800_rfcsr_write(rt2x00dev, 61, 0x00);
 702 +       rt2800_rfcsr_write(rt2x00dev, 62, 0x00);
 703 +       rt2800_rfcsr_write(rt2x00dev, 63, 0x00);
 704 +
 705 +       /* TODO: rx filter calibration? */
 706 +
 707 +       rt2800_bbp_write(rt2x00dev, 137, 0x0f);
 708 +
 709 +       rt2800_bbp_write(rt2x00dev, 163, 0x9d);
 710 +
 711 +       rt2800_bbp_write(rt2x00dev, 105, 0x05);
 712 +
 713 +       rt2800_bbp_write(rt2x00dev, 179, 0x02);
 714 +       rt2800_bbp_write(rt2x00dev, 180, 0x00);
 715 +       rt2800_bbp_write(rt2x00dev, 182, 0x40);
 716 +       rt2800_bbp_write(rt2x00dev, 180, 0x01);
 717 +       rt2800_bbp_write(rt2x00dev, 182, 0x9c);
 718 +
 719 +       rt2800_bbp_write(rt2x00dev, 179, 0x00);
 720 +
 721 +       rt2800_bbp_write(rt2x00dev, 142, 0x04);
 722 +       rt2800_bbp_write(rt2x00dev, 143, 0x3b);
 723 +       rt2800_bbp_write(rt2x00dev, 142, 0x06);
 724 +       rt2800_bbp_write(rt2x00dev, 143, 0xa0);
 725 +       rt2800_bbp_write(rt2x00dev, 142, 0x07);
 726 +       rt2800_bbp_write(rt2x00dev, 143, 0xa1);
 727 +       rt2800_bbp_write(rt2x00dev, 142, 0x08);
 728 +       rt2800_bbp_write(rt2x00dev, 143, 0xa2);
 729 +       rt2800_bbp_write(rt2x00dev, 148, 0xc8);
 730 +
 731 +       if (eco == 5) {
 732 +               rt2800_rfcsr_write(rt2x00dev, 32, 0xd8);
 733 +               rt2800_rfcsr_write(rt2x00dev, 33, 0x32);
 734 +       }
 735 +
 736 +       rfcsr = rt2800_rfcsr_read(rt2x00dev, 2);
 737 +       rt2x00_set_field8(&rfcsr, RFCSR2_RESCAL_BP, 0);
 738 +       rt2x00_set_field8(&rfcsr, RFCSR2_RESCAL_EN, 1);
 739 +       rt2800_rfcsr_write(rt2x00dev, 2, rfcsr);
 740 +       msleep(1);
 741 +       rt2x00_set_field8(&rfcsr, RFCSR2_RESCAL_EN, 0);
 742 +       rt2800_rfcsr_write(rt2x00dev, 2, rfcsr);
 743 +
 744 +       rfcsr = rt2800_rfcsr_read(rt2x00dev, 1);
 745 +       rt2x00_set_field8(&rfcsr, RFCSR1_RF_BLOCK_EN, 1);
 746 +       rt2800_rfcsr_write(rt2x00dev, 1, rfcsr);
 747 +
 748 +       rfcsr = rt2800_rfcsr_read(rt2x00dev, 6);
 749 +       rfcsr |= 0xc0;
 750 +       rt2800_rfcsr_write(rt2x00dev, 6, rfcsr);
 751 +
 752 +       rfcsr = rt2800_rfcsr_read(rt2x00dev, 22);
 753 +       rfcsr |= 0x20;
 754 +       rt2800_rfcsr_write(rt2x00dev, 22, rfcsr);
 755 +
 756 +       rfcsr = rt2800_rfcsr_read(rt2x00dev, 46);
 757 +       rfcsr |= 0x20;
 758 +       rt2800_rfcsr_write(rt2x00dev, 46, rfcsr);
 759 +
 760 +       rfcsr = rt2800_rfcsr_read(rt2x00dev, 20);
 761 +       rfcsr &= ~0xee;
 762 +       rt2800_rfcsr_write(rt2x00dev, 20, rfcsr);
 763 +}
 764 +
 765  static void rt2800_init_rfcsr_5390(struct rt2x00_dev *rt2x00dev)
 766  {
 767         rt2800_rf_init_calibration(rt2x00dev, 2);
 768 @@ -8456,6 +8942,9 @@ static void rt2800_init_rfcsr(struct rt2
 769         case RT3390:
 770                 rt2800_init_rfcsr_3390(rt2x00dev);
 771                 break;
 772 +       case RT3883:
 773 +               rt2800_init_rfcsr_3883(rt2x00dev);
 774 +               break;
 775         case RT3572:
 776                 rt2800_init_rfcsr_3572(rt2x00dev);
 777                 break;
 778 @@ -8661,7 +9150,8 @@ static u8 rt2800_get_txmixer_gain_24g(st
 779  {
 780         u16 word;
 781
 782 -       if (rt2x00_rt(rt2x00dev, RT3593))
 783 +       if (rt2x00_rt(rt2x00dev, RT3593) ||
 784 +           rt2x00_rt(rt2x00dev, RT3883))
 785                 return 0;
 786
 787         word = rt2800_eeprom_read(rt2x00dev, EEPROM_TXMIXER_GAIN_BG);
 788 @@ -8675,7 +9165,8 @@ static u8 rt2800_get_txmixer_gain_5g(str
 789  {
 790         u16 word;
 791
 792 -       if (rt2x00_rt(rt2x00dev, RT3593))
 793 +       if (rt2x00_rt(rt2x00dev, RT3593) ||
 794 +           rt2x00_rt(rt2x00dev, RT3883))
 795                 return 0;
 796
 797         word = rt2800_eeprom_read(rt2x00dev, EEPROM_TXMIXER_GAIN_A);
 798 @@ -8781,7 +9272,8 @@ static int rt2800_validate_eeprom(struct
 799         word = rt2800_eeprom_read(rt2x00dev, EEPROM_RSSI_BG2);
 800         if (abs(rt2x00_get_field16(word, EEPROM_RSSI_BG2_OFFSET2)) > 10)
 801                 rt2x00_set_field16(&word, EEPROM_RSSI_BG2_OFFSET2, 0);
 802 -       if (!rt2x00_rt(rt2x00dev, RT3593)) {
 803 +       if (!rt2x00_rt(rt2x00dev, RT3593) &&
 804 +           !rt2x00_rt(rt2x00dev, RT3883)) {
 805                 if (rt2x00_get_field16(word, EEPROM_RSSI_BG2_LNA_A1) == 0x00 ||
 806                     rt2x00_get_field16(word, EEPROM_RSSI_BG2_LNA_A1) == 0xff)
 807                         rt2x00_set_field16(&word, EEPROM_RSSI_BG2_LNA_A1,
 808 @@ -8801,7 +9293,8 @@ static int rt2800_validate_eeprom(struct
 809         word = rt2800_eeprom_read(rt2x00dev, EEPROM_RSSI_A2);
 810         if (abs(rt2x00_get_field16(word, EEPROM_RSSI_A2_OFFSET2)) > 10)
 811                 rt2x00_set_field16(&word, EEPROM_RSSI_A2_OFFSET2, 0);
 812 -       if (!rt2x00_rt(rt2x00dev, RT3593)) {
 813 +       if (!rt2x00_rt(rt2x00dev, RT3593) &&
 814 +           !rt2x00_rt(rt2x00dev, RT3883)) {
 815                 if (rt2x00_get_field16(word, EEPROM_RSSI_A2_LNA_A2) == 0x00 ||
 816                     rt2x00_get_field16(word, EEPROM_RSSI_A2_LNA_A2) == 0xff)
 817                         rt2x00_set_field16(&word, EEPROM_RSSI_A2_LNA_A2,
 818 @@ -8809,7 +9302,8 @@ static int rt2800_validate_eeprom(struct
 819         }
 820         rt2800_eeprom_write(rt2x00dev, EEPROM_RSSI_A2, word);
 821
 822 -       if (rt2x00_rt(rt2x00dev, RT3593)) {
 823 +       if (rt2x00_rt(rt2x00dev, RT3593) ||
 824 +           rt2x00_rt(rt2x00dev, RT3883)) {
 825                 word = rt2800_eeprom_read(rt2x00dev, EEPROM_EXT_LNA2);
 826                 if (rt2x00_get_field16(word, EEPROM_EXT_LNA2_A1) == 0x00 ||
 827                     rt2x00_get_field16(word, EEPROM_EXT_LNA2_A1) == 0xff)
 828 @@ -8848,6 +9342,8 @@ static int rt2800_init_eeprom(struct rt2
 829                 rf = rt2800_eeprom_read(rt2x00dev, EEPROM_CHIP_ID);
 830         else if (rt2x00_rt(rt2x00dev, RT3352))
 831                 rf = RF3322;
 832 +       else if (rt2x00_rt(rt2x00dev, RT3883))
 833 +               rf = RF3853;
 834         else if (rt2x00_rt(rt2x00dev, RT5350))
 835                 rf = RF5350;
 836         else
 837 @@ -8868,6 +9364,7 @@ static int rt2800_init_eeprom(struct rt2
 838         case RF3290:
 839         case RF3320:
 840         case RF3322:
 841 +       case RF3853:
 842         case RF5350:
 843         case RF5360:
 844         case RF5362:
 845 @@ -9154,6 +9651,66 @@ static const struct rf_channel rf_vals_3
 846         {14,   0xF0,     2,  0x18},
 847  };
 848
 849 +static const struct rf_channel rf_vals_3853[] = {
 850 +       {1,  241, 6, 2},
 851 +       {2,  241, 6, 7},
 852 +       {3,  242, 6, 2},
 853 +       {4,  242, 6, 7},
 854 +       {5,  243, 6, 2},
 855 +       {6,  243, 6, 7},
 856 +       {7,  244, 6, 2},
 857 +       {8,  244, 6, 7},
 858 +       {9,  245, 6, 2},
 859 +       {10, 245, 6, 7},
 860 +       {11, 246, 6, 2},
 861 +       {12, 246, 6, 7},
 862 +       {13, 247, 6, 2},
 863 +       {14, 248, 6, 4},
 864 +
 865 +       {36, 0x56, 8, 4},
 866 +       {38, 0x56, 8, 6},
 867 +       {40, 0x56, 8, 8},
 868 +       {44, 0x57, 8, 0},
 869 +       {46, 0x57, 8, 2},
 870 +       {48, 0x57, 8, 4},
 871 +       {52, 0x57, 8, 8},
 872 +       {54, 0x57, 8, 10},
 873 +       {56, 0x58, 8, 0},
 874 +       {60, 0x58, 8, 4},
 875 +       {62, 0x58, 8, 6},
 876 +       {64, 0x58, 8, 8},
 877 +
 878 +       {100, 0x5b, 8, 8},
 879 +       {102, 0x5b, 8, 10},
 880 +       {104, 0x5c, 8, 0},
 881 +       {108, 0x5c, 8, 4},
 882 +       {110, 0x5c, 8, 6},
 883 +       {112, 0x5c, 8, 8},
 884 +       {114, 0x5c, 8, 10},
 885 +       {116, 0x5d, 8, 0},
 886 +       {118, 0x5d, 8, 2},
 887 +       {120, 0x5d, 8, 4},
 888 +       {124, 0x5d, 8, 8},
 889 +       {126, 0x5d, 8, 10},
 890 +       {128, 0x5e, 8, 0},
 891 +       {132, 0x5e, 8, 4},
 892 +       {134, 0x5e, 8, 6},
 893 +       {136, 0x5e, 8, 8},
 894 +       {140, 0x5f, 8, 0},
 895 +
 896 +       {149, 0x5f, 8, 9},
 897 +       {151, 0x5f, 8, 11},
 898 +       {153, 0x60, 8, 1},
 899 +       {157, 0x60, 8, 5},
 900 +       {159, 0x60, 8, 7},
 901 +       {161, 0x60, 8, 9},
 902 +       {165, 0x61, 8, 1},
 903 +       {167, 0x61, 8, 3},
 904 +       {169, 0x61, 8, 5},
 905 +       {171, 0x61, 8, 7},
 906 +       {173, 0x61, 8, 9},
 907 +};
 908 +
 909  static const struct rf_channel rf_vals_5592_xtal20[] = {
 910         /* Channel, N, K, mod, R */
 911         {1, 482, 4, 10, 3},
 912 @@ -9417,6 +9974,11 @@ static int rt2800_probe_hw_mode(struct r
 913                 spec->channels = rf_vals_3x;
 914                 break;
 915
 916 +       case RF3853:
 917 +               spec->num_channels = ARRAY_SIZE(rf_vals_3853);
 918 +               spec->channels = rf_vals_3853;
 919 +               break;
 920 +
 921         case RF5592:
 922                 reg = rt2800_register_read(rt2x00dev, MAC_DEBUG_INDEX);
 923                 if (rt2x00_get_field32(reg, MAC_DEBUG_INDEX_XTAL)) {
 924 @@ -9536,6 +10098,7 @@ static int rt2800_probe_hw_mode(struct r
 925         case RF3053:
 926         case RF3070:
 927         case RF3290:
 928 +       case RF3853:
 929         case RF5350:
 930         case RF5360:
 931         case RF5362:
 932 @@ -9578,6 +10141,7 @@ static int rt2800_probe_rt(struct rt2x00
 933         case RT3390:
 934         case RT3572:
 935         case RT3593:
 936 +       case RT3883:
 937         case RT5350:
 938         case RT5390:
 939         case RT5392:
 940 --- a/drivers/net/wireless/ralink/rt2x00/rt2800soc.c
 941 +++ b/drivers/net/wireless/ralink/rt2x00/rt2800soc.c
 942 @@ -51,9 +51,16 @@ static bool rt2800soc_hwcrypt_disabled(s
 943
 944  static void rt2800soc_disable_radio(struct rt2x00_dev *rt2x00dev)
 945  {
 946 +       u32 reg;
 947 +
 948         rt2800_disable_radio(rt2x00dev);
 949         rt2x00mmio_register_write(rt2x00dev, PWR_PIN_CFG, 0);
 950 -       rt2x00mmio_register_write(rt2x00dev, TX_PIN_CFG, 0);
 951 +
 952 +       reg = 0;
 953 +       if (rt2x00_rt(rt2x00dev, RT3883))
 954 +               rt2x00_set_field32(&reg, TX_PIN_CFG_RFTR_EN, 1);
 955 +
 956 +       rt2x00mmio_register_write(rt2x00dev, TX_PIN_CFG, reg);
 957  }
 958
 959  static int rt2800soc_set_device_state(struct rt2x00_dev *rt2x00dev,