ed8a737a4c6bc439bccd6c1e7e09ba4879a7462f
[openwrt/staging/ansuel.git] / package / kernel / mac80211 / patches / rt2x00 / 982-rt2x00-add-RF-self-TXDC-calibration.patch
1 From 21f2acf0f9e9da35fbdb96ee0aea97b02472030b Mon Sep 17 00:00:00 2001
2 From: Daniel Golle <daniel@makrotopia.org>
3 Date: Mon, 8 Jan 2018 13:42:27 +0100
4 Subject: [PATCH 04/16] rt2x00: add RF self TXDC calibration for MT7620
5 MIME-Version: 1.0
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
8 To: linux-wireless@vger.kernel.org,
9 Stanislaw Gruszka <stf_xl@wp.pl>,
10 Helmut Schaa <helmut.schaa@googlemail.com>
11 Cc: Kalle Valo <kvalo@kernel.org>,
12 David S. Miller <davem@davemloft.net>,
13 Eric Dumazet <edumazet@google.com>,
14 Jakub Kicinski <kuba@kernel.org>,
15 Paolo Abeni <pabeni@redhat.com>,
16 Johannes Berg <johannes.berg@intel.com>
17
18 From: Tomislav Požega <pozega.tomislav@gmail.com>
19
20 Add TX self calibration based on mtk driver.
21
22 Signed-off-by: Tomislav Požega <pozega.tomislav@gmail.com>
23 ---
24 .../net/wireless/ralink/rt2x00/rt2800lib.c | 48 +++++++++++++++++++
25 1 file changed, 48 insertions(+)
26
27 --- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
28 +++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
29 @@ -8436,6 +8436,53 @@ static void rt2800_init_rfcsr_5592(struc
30 rt2800_led_open_drain_enable(rt2x00dev);
31 }
32
33 +static void rt2800_rf_self_txdc_cal(struct rt2x00_dev *rt2x00dev)
34 +{
35 + u8 rfb5r1_org, rfb7r1_org, rfvalue;
36 + u32 mac0518, mac051c, mac0528, mac052c;
37 + u8 i;
38 +
39 + mac0518 = rt2800_register_read(rt2x00dev, RF_CONTROL0);
40 + mac051c = rt2800_register_read(rt2x00dev, RF_BYPASS0);
41 + mac0528 = rt2800_register_read(rt2x00dev, RF_CONTROL2);
42 + mac052c = rt2800_register_read(rt2x00dev, RF_BYPASS2);
43 +
44 + rt2800_register_write(rt2x00dev, RF_BYPASS0, 0x0);
45 + rt2800_register_write(rt2x00dev, RF_BYPASS2, 0x0);
46 +
47 + rt2800_register_write(rt2x00dev, RF_CONTROL0, 0xC);
48 + rt2800_register_write(rt2x00dev, RF_BYPASS0, 0x3306);
49 + rt2800_register_write(rt2x00dev, RF_CONTROL2, 0x3330);
50 + rt2800_register_write(rt2x00dev, RF_BYPASS2, 0xfffff);
51 + rfb5r1_org = rt2800_rfcsr_read_bank(rt2x00dev, 5, 1);
52 + rfb7r1_org = rt2800_rfcsr_read_bank(rt2x00dev, 7, 1);
53 +
54 + rt2800_rfcsr_write_bank(rt2x00dev, 5, 1, 0x4);
55 + for (i = 0; i < 100; i = i + 1) {
56 + usleep_range(50, 100);
57 + rfvalue = rt2800_rfcsr_read_bank(rt2x00dev, 5, 1);
58 + if ((rfvalue & 0x04) != 0x4)
59 + break;
60 + }
61 + rt2800_rfcsr_write_bank(rt2x00dev, 5, 1, rfb5r1_org);
62 +
63 + rt2800_rfcsr_write_bank(rt2x00dev, 7, 1, 0x4);
64 + for (i = 0; i < 100; i = i + 1) {
65 + usleep_range(50, 100);
66 + rfvalue = rt2800_rfcsr_read_bank(rt2x00dev, 7, 1);
67 + if ((rfvalue & 0x04) != 0x4)
68 + break;
69 + }
70 + rt2800_rfcsr_write_bank(rt2x00dev, 7, 1, rfb7r1_org);
71 +
72 + rt2800_register_write(rt2x00dev, RF_BYPASS0, 0x0);
73 + rt2800_register_write(rt2x00dev, RF_BYPASS2, 0x0);
74 + rt2800_register_write(rt2x00dev, RF_CONTROL0, mac0518);
75 + rt2800_register_write(rt2x00dev, RF_BYPASS0, mac051c);
76 + rt2800_register_write(rt2x00dev, RF_CONTROL2, mac0528);
77 + rt2800_register_write(rt2x00dev, RF_BYPASS2, mac052c);
78 +}
79 +
80 static void rt2800_bbp_core_soft_reset(struct rt2x00_dev *rt2x00dev,
81 bool set_bw, bool is_ht40)
82 {
83 @@ -9043,6 +9090,7 @@ static void rt2800_init_rfcsr_6352(struc
84 rt2800_rfcsr_write_dccal(rt2x00dev, 5, 0x00);
85 rt2800_rfcsr_write_dccal(rt2x00dev, 17, 0x7C);
86
87 + rt2800_rf_self_txdc_cal(rt2x00dev);
88 rt2800_bw_filter_calibration(rt2x00dev, true);
89 rt2800_bw_filter_calibration(rt2x00dev, false);
90 }