package/libs/wolfssl/patches/001-Maths-x86-asm-change-asm-snippets-to-get-compiling.patch

   1 From fa8f23284d4689c2a737204b337b58d966dcbd8c Mon Sep 17 00:00:00 2001
   2 From: Sean Parkinson <sean@wolfssl.com>
   3 Date: Fri, 20 Aug 2021 10:23:38 +1000
   4 Subject: [PATCH] Maths x86 asm: change asm snippets to get compiling
   5
   6 TFM:
   7   Use register or memory for c0, c1, c2 in SQRADD and SQRADD2.
   8 SP:
   9   Use register or memory for vl, vh, vo in SP_ASM_MUL_ADD,
  10 SP_ASM_MUL_ADD2 and SP_ASM_SQR_ADD.
  11 ---
  12  wolfcrypt/src/asm.c    | 29 ++++++++++++++++++++---------
  13  wolfcrypt/src/sp_int.c |  6 +++---
  14  2 files changed, 23 insertions(+), 12 deletions(-)
  15
  16 diff --git a/wolfcrypt/src/asm.c b/wolfcrypt/src/asm.c
  17 index b7f53d073..a37e75e02 100644
  18 --- a/wolfcrypt/src/asm.c
  19 +++ b/wolfcrypt/src/asm.c
  20 @@ -698,33 +698,39 @@ __asm__(                             \
  21
  22  #define SQRADD(i, j)                                      \
  23  __asm__(                                                  \
  24 -     "movl  %6,%%eax     \n\t"                            \
  25 +     "movl  %3,%%eax     \n\t"                            \
  26       "mull  %%eax        \n\t"                            \
  27       "addl  %%eax,%0     \n\t"                            \
  28       "adcl  %%edx,%1     \n\t"                            \
  29       "adcl  $0,%2        \n\t"                            \
  30 -     :"=r"(c0), "=r"(c1), "=r"(c2): "0"(c0), "1"(c1), "2"(c2), "m"(i) :"%eax","%edx","cc");
  31 +     :"+rm"(c0), "+rm"(c1), "+rm"(c2)                     \
  32 +     : "m"(i)                                             \
  33 +     :"%eax","%edx","cc");
  34
  35  #define SQRADD2(i, j)                                     \
  36  __asm__(                                                  \
  37 -     "movl  %6,%%eax     \n\t"                            \
  38 -     "mull  %7           \n\t"                            \
  39 +     "movl  %3,%%eax     \n\t"                            \
  40 +     "mull  %4           \n\t"                            \
  41       "addl  %%eax,%0     \n\t"                            \
  42       "adcl  %%edx,%1     \n\t"                            \
  43       "adcl  $0,%2        \n\t"                            \
  44       "addl  %%eax,%0     \n\t"                            \
  45       "adcl  %%edx,%1     \n\t"                            \
  46       "adcl  $0,%2        \n\t"                            \
  47 -     :"=r"(c0), "=r"(c1), "=r"(c2): "0"(c0), "1"(c1), "2"(c2), "m"(i), "m"(j)  :"%eax","%edx", "cc");
  48 +     :"+rm"(c0), "+rm"(c1), "+rm"(c2)                     \
  49 +     : "m"(i), "m"(j)                                     \
  50 +     :"%eax","%edx", "cc");
  51
  52  #define SQRADDSC(i, j)                                    \
  53 -__asm__(                                                     \
  54 +__asm__(                                                  \
  55       "movl  %3,%%eax     \n\t"                            \
  56       "mull  %4           \n\t"                            \
  57       "movl  %%eax,%0     \n\t"                            \
  58       "movl  %%edx,%1     \n\t"                            \
  59       "xorl  %2,%2        \n\t"                            \
  60 -     :"=r"(sc0), "=r"(sc1), "=r"(sc2): "g"(i), "g"(j) :"%eax","%edx","cc");
  61 +     :"=r"(sc0), "=r"(sc1), "=r"(sc2)                     \
  62 +     : "g"(i), "g"(j)                                     \
  63 +     :"%eax","%edx","cc");
  64
  65  #define SQRADDAC(i, j)                                    \
  66  __asm__(                                                  \
  67 @@ -733,7 +739,9 @@ __asm__(                                                  \
  68       "addl  %%eax,%0     \n\t"                            \
  69       "adcl  %%edx,%1     \n\t"                            \
  70       "adcl  $0,%2        \n\t"                            \
  71 -     :"=r"(sc0), "=r"(sc1), "=r"(sc2): "0"(sc0), "1"(sc1), "2"(sc2), "g"(i), "g"(j) :"%eax","%edx","cc");
  72 +     :"=r"(sc0), "=r"(sc1), "=r"(sc2)                     \
  73 +     : "0"(sc0), "1"(sc1), "2"(sc2), "g"(i), "g"(j)       \
  74 +     :"%eax","%edx","cc");
  75
  76  #define SQRADDDB                                          \
  77  __asm__(                                                  \
  78 @@ -743,7 +751,10 @@ __asm__(                                                  \
  79       "addl %6,%0         \n\t"                            \
  80       "adcl %7,%1         \n\t"                            \
  81       "adcl %8,%2         \n\t"                            \
  82 -     :"=r"(c0), "=r"(c1), "=r"(c2) : "0"(c0), "1"(c1), "2"(c2), "r"(sc0), "r"(sc1), "r"(sc2) : "cc");
  83 +     :"=r"(c0), "=r"(c1), "=r"(c2)                        \
  84 +     : "0"(c0), "1"(c1), "2"(c2), "r"(sc0), "r"(sc1),     \
  85 +       "r"(sc2)                                           \
  86 +     : "cc");
  87
  88  #elif defined(TFM_X86_64)
  89  /* x86-64 optimized */
  90 diff --git a/wolfcrypt/src/sp_int.c b/wolfcrypt/src/sp_int.c
  91 index 6070faaa9..d26702e47 100644
  92 --- a/wolfcrypt/src/sp_int.c
  93 +++ b/wolfcrypt/src/sp_int.c
  94 @@ -477,7 +477,7 @@ static WC_INLINE sp_int_digit sp_div_word(sp_int_digit hi, sp_int_digit lo,
  95          "addl  %%eax, %[l]     \n\t"                    \
  96          "adcl  %%edx, %[h]     \n\t"                    \
  97          "adcl  $0   , %[o]     \n\t"                    \
  98 -        : [l] "+r" (vl), [h] "+r" (vh), [o] "+r" (vo)    \
  99 +        : [l] "+rm" (vl), [h] "+rm" (vh), [o] "+rm" (vo) \
 100          : [a] "r" (va), [b] "r" (vb)                     \
 101          : "eax", "edx", "cc"                             \
 102      )
 103 @@ -503,7 +503,7 @@ static WC_INLINE sp_int_digit sp_div_word(sp_int_digit hi, sp_int_digit lo,
 104          "addl  %%eax, %[l]     \n\t"                    \
 105          "adcl  %%edx, %[h]     \n\t"                    \
 106          "adcl  $0   , %[o]     \n\t"                    \
 107 -        : [l] "+r" (vl), [h] "+r" (vh), [o] "+r" (vo)    \
 108 +        : [l] "+rm" (vl), [h] "+rm" (vh), [o] "+rm" (vo) \
 109          : [a] "r" (va), [b] "r" (vb)                     \
 110          : "eax", "edx", "cc"                             \
 111      )
 112 @@ -542,7 +542,7 @@ static WC_INLINE sp_int_digit sp_div_word(sp_int_digit hi, sp_int_digit lo,
 113          "addl  %%eax, %[l]     \n\t"                    \
 114          "adcl  %%edx, %[h]     \n\t"                    \
 115          "adcl  $0   , %[o]     \n\t"                    \
 116 -        : [l] "+r" (vl), [h] "+r" (vh), [o] "+r" (vo)    \
 117 +        : [l] "+rm" (vl), [h] "+rm" (vh), [o] "+rm" (vo) \
 118          : [a] "m" (va)                                   \
 119          : "eax", "edx", "cc"                             \
 120      )
 121 --
 122 2.31.1
 123