1 --- a/drivers/net/wireless/ath/ath9k/ath9k.h
2 +++ b/drivers/net/wireless/ath/ath9k/ath9k.h
3 @@ -189,7 +189,6 @@ struct ath_txq {
6 bool axq_tx_inprogress;
7 - bool txq_flush_inprogress;
8 struct list_head axq_acq;
9 struct list_head txq_fifo[ATH_TXFIFO_DEPTH];
10 struct list_head txq_fifo_pending;
11 --- a/drivers/net/wireless/ath/ath9k/beacon.c
12 +++ b/drivers/net/wireless/ath/ath9k/beacon.c
13 @@ -373,6 +373,7 @@ void ath_beacon_tasklet(unsigned long da
14 ath_dbg(common, ATH_DBG_BSTUCK,
15 "missed %u consecutive beacons\n",
17 + ath9k_hw_stop_dma_queue(ah, sc->beacon.beaconq);
18 ath9k_hw_bstuck_nfcal(ah);
19 } else if (sc->beacon.bmisscnt >= BSTUCK_THRESH) {
20 ath_dbg(common, ATH_DBG_BSTUCK,
21 @@ -450,16 +451,6 @@ void ath_beacon_tasklet(unsigned long da
22 sc->beacon.updateslot = OK;
26 - * Stop any current dma and put the new frame(s) on the queue.
27 - * This should never fail since we check above that no frames
28 - * are still pending on the queue.
30 - if (!ath9k_hw_stoptxdma(ah, sc->beacon.beaconq)) {
31 - ath_err(common, "beacon queue %u did not stop?\n",
32 - sc->beacon.beaconq);
35 /* NB: cabq traffic should already be queued and primed */
36 ath9k_hw_puttxbuf(ah, sc->beacon.beaconq, bfaddr);
37 ath9k_hw_txstart(ah, sc->beacon.beaconq);
38 @@ -780,7 +771,7 @@ void ath9k_set_beaconing_status(struct a
39 ah->imask &= ~ATH9K_INT_SWBA;
40 ath9k_hw_set_interrupts(ah, ah->imask);
41 tasklet_kill(&sc->bcon_tasklet);
42 - ath9k_hw_stoptxdma(ah, sc->beacon.beaconq);
43 + ath9k_hw_stop_dma_queue(ah, sc->beacon.beaconq);
47 --- a/drivers/net/wireless/ath/ath9k/hw.h
48 +++ b/drivers/net/wireless/ath/ath9k/hw.h
50 #define REG_READ_FIELD(_a, _r, _f) \
51 (((REG_READ(_a, _r) & _f) >> _f##_S))
52 #define REG_SET_BIT(_a, _r, _f) \
53 - REG_WRITE(_a, _r, REG_READ(_a, _r) | _f)
54 + REG_WRITE(_a, _r, REG_READ(_a, _r) | (_f))
55 #define REG_CLR_BIT(_a, _r, _f) \
56 - REG_WRITE(_a, _r, REG_READ(_a, _r) & ~_f)
57 + REG_WRITE(_a, _r, REG_READ(_a, _r) & ~(_f))
59 #define DO_DELAY(x) do { \
60 if ((++(x) % 64) == 0) \
61 --- a/drivers/net/wireless/ath/ath9k/mac.c
62 +++ b/drivers/net/wireless/ath/ath9k/mac.c
63 @@ -143,84 +143,59 @@ bool ath9k_hw_updatetxtriglevel(struct a
65 EXPORT_SYMBOL(ath9k_hw_updatetxtriglevel);
67 -bool ath9k_hw_stoptxdma(struct ath_hw *ah, u32 q)
68 +void ath9k_hw_abort_tx_dma(struct ath_hw *ah)
70 -#define ATH9K_TX_STOP_DMA_TIMEOUT 4000 /* usec */
71 -#define ATH9K_TIME_QUANTUM 100 /* usec */
72 - struct ath_common *common = ath9k_hw_common(ah);
73 - struct ath9k_hw_capabilities *pCap = &ah->caps;
74 - struct ath9k_tx_queue_info *qi;
75 - u32 tsfLow, j, wait;
76 - u32 wait_time = ATH9K_TX_STOP_DMA_TIMEOUT / ATH9K_TIME_QUANTUM;
79 - if (q >= pCap->total_queues) {
80 - ath_dbg(common, ATH_DBG_QUEUE,
81 - "Stopping TX DMA, invalid queue: %u\n", q);
84 + REG_WRITE(ah, AR_Q_TXD, AR_Q_TXD_M);
87 - if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) {
88 - ath_dbg(common, ATH_DBG_QUEUE,
89 - "Stopping TX DMA, inactive queue: %u\n", q);
92 + REG_SET_BIT(ah, AR_PCU_MISC, AR_PCU_FORCE_QUIET_COLL | AR_PCU_CLEAR_VMF);
93 + REG_SET_BIT(ah, AR_DIAG_SW, AR_DIAG_FORCE_CH_IDLE_HIGH);
94 + REG_SET_BIT(ah, AR_D_GBL_IFS_MISC, AR_D_GBL_IFS_MISC_IGNORE_BACKOFF);
96 - REG_WRITE(ah, AR_Q_TXD, 1 << q);
97 + for (q = 0; q < AR_NUM_QCU; q++) {
98 + for (i = 0; i < 1000; i++) {
102 - for (wait = wait_time; wait != 0; wait--) {
103 - if (ath9k_hw_numtxpending(ah, q) == 0)
105 - udelay(ATH9K_TIME_QUANTUM);
106 + if (!ath9k_hw_numtxpending(ah, q))
111 - if (ath9k_hw_numtxpending(ah, q)) {
112 - ath_dbg(common, ATH_DBG_QUEUE,
113 - "%s: Num of pending TX Frames %d on Q %d\n",
114 - __func__, ath9k_hw_numtxpending(ah, q), q);
116 - for (j = 0; j < 2; j++) {
117 - tsfLow = REG_READ(ah, AR_TSF_L32);
118 - REG_WRITE(ah, AR_QUIET2,
119 - SM(10, AR_QUIET2_QUIET_DUR));
120 - REG_WRITE(ah, AR_QUIET_PERIOD, 100);
121 - REG_WRITE(ah, AR_NEXT_QUIET_TIMER, tsfLow >> 10);
122 - REG_SET_BIT(ah, AR_TIMER_MODE,
123 - AR_QUIET_TIMER_EN);
125 - if ((REG_READ(ah, AR_TSF_L32) >> 10) == (tsfLow >> 10))
127 + REG_CLR_BIT(ah, AR_PCU_MISC, AR_PCU_FORCE_QUIET_COLL | AR_PCU_CLEAR_VMF);
128 + REG_CLR_BIT(ah, AR_DIAG_SW, AR_DIAG_FORCE_CH_IDLE_HIGH);
129 + REG_CLR_BIT(ah, AR_D_GBL_IFS_MISC, AR_D_GBL_IFS_MISC_IGNORE_BACKOFF);
131 - ath_dbg(common, ATH_DBG_QUEUE,
132 - "TSF has moved while trying to set quiet time TSF: 0x%08x\n",
135 + REG_WRITE(ah, AR_Q_TXD, 0);
137 +EXPORT_SYMBOL(ath9k_hw_abort_tx_dma);
139 - REG_SET_BIT(ah, AR_DIAG_SW, AR_DIAG_FORCE_CH_IDLE_HIGH);
140 +bool ath9k_hw_stop_dma_queue(struct ath_hw *ah, u32 q)
142 +#define ATH9K_TX_STOP_DMA_TIMEOUT 1000 /* usec */
143 +#define ATH9K_TIME_QUANTUM 100 /* usec */
144 + int wait_time = ATH9K_TX_STOP_DMA_TIMEOUT / ATH9K_TIME_QUANTUM;
148 - REG_CLR_BIT(ah, AR_TIMER_MODE, AR_QUIET_TIMER_EN);
149 + REG_WRITE(ah, AR_Q_TXD, 1 << q);
152 - while (ath9k_hw_numtxpending(ah, q)) {
153 - if ((--wait) == 0) {
155 - "Failed to stop TX DMA in 100 msec after killing last frame\n");
158 + for (wait = wait_time; wait != 0; wait--) {
159 + if (wait != wait_time)
160 udelay(ATH9K_TIME_QUANTUM);
163 - REG_CLR_BIT(ah, AR_DIAG_SW, AR_DIAG_FORCE_CH_IDLE_HIGH);
164 + if (ath9k_hw_numtxpending(ah, q) == 0)
168 REG_WRITE(ah, AR_Q_TXD, 0);
172 #undef ATH9K_TX_STOP_DMA_TIMEOUT
173 #undef ATH9K_TIME_QUANTUM
175 -EXPORT_SYMBOL(ath9k_hw_stoptxdma);
176 +EXPORT_SYMBOL(ath9k_hw_stop_dma_queue);
178 void ath9k_hw_gettxintrtxqs(struct ath_hw *ah, u32 *txqs)
180 --- a/drivers/net/wireless/ath/ath9k/mac.h
181 +++ b/drivers/net/wireless/ath/ath9k/mac.h
182 @@ -676,7 +676,8 @@ void ath9k_hw_txstart(struct ath_hw *ah,
183 void ath9k_hw_cleartxdesc(struct ath_hw *ah, void *ds);
184 u32 ath9k_hw_numtxpending(struct ath_hw *ah, u32 q);
185 bool ath9k_hw_updatetxtriglevel(struct ath_hw *ah, bool bIncTrigLevel);
186 -bool ath9k_hw_stoptxdma(struct ath_hw *ah, u32 q);
187 +bool ath9k_hw_stop_dma_queue(struct ath_hw *ah, u32 q);
188 +void ath9k_hw_abort_tx_dma(struct ath_hw *ah);
189 void ath9k_hw_gettxintrtxqs(struct ath_hw *ah, u32 *txqs);
190 bool ath9k_hw_set_txq_props(struct ath_hw *ah, int q,
191 const struct ath9k_tx_queue_info *qinfo);
192 --- a/drivers/net/wireless/ath/ath9k/main.c
193 +++ b/drivers/net/wireless/ath/ath9k/main.c
194 @@ -2128,56 +2128,42 @@ static void ath9k_set_coverage_class(str
196 static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
198 -#define ATH_FLUSH_TIMEOUT 60 /* ms */
199 struct ath_softc *sc = hw->priv;
200 - struct ath_txq *txq = NULL;
201 - struct ath_hw *ah = sc->sc_ah;
202 - struct ath_common *common = ath9k_hw_common(ah);
203 - int i, j, npend = 0;
204 + int timeout = 200; /* ms */
207 + ath9k_ps_wakeup(sc);
208 mutex_lock(&sc->mutex);
210 cancel_delayed_work_sync(&sc->tx_complete_work);
212 - for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
213 - if (!ATH_TXQ_SETUP(sc, i))
215 - txq = &sc->tx.txq[i];
218 - for (j = 0; j < ATH_FLUSH_TIMEOUT; j++) {
219 - if (!ath9k_has_pending_frames(sc, txq))
221 - usleep_range(1000, 2000);
227 + for (j = 0; j < timeout; j++) {
231 + usleep_range(1000, 2000);
233 - if (drop || ath9k_has_pending_frames(sc, txq)) {
234 - ath_dbg(common, ATH_DBG_QUEUE, "Drop frames from hw queue:%d\n",
236 - spin_lock_bh(&txq->axq_lock);
237 - txq->txq_flush_inprogress = true;
238 - spin_unlock_bh(&txq->axq_lock);
240 - ath9k_ps_wakeup(sc);
241 - ath9k_hw_stoptxdma(ah, txq->axq_qnum);
242 - npend = ath9k_hw_numtxpending(ah, txq->axq_qnum);
243 - ath9k_ps_restore(sc);
246 + for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
247 + if (!ATH_TXQ_SETUP(sc, i))
250 - ath_draintxq(sc, txq, false);
251 - txq->txq_flush_inprogress = false;
252 + npend += ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
260 + if (!ath_drain_all_txq(sc, false))
261 ath_reset(sc, false);
262 - txq->txq_flush_inprogress = false;
266 ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
267 mutex_unlock(&sc->mutex);
268 + ath9k_ps_restore(sc);
271 struct ieee80211_ops ath9k_ops = {
272 --- a/drivers/net/wireless/ath/ath9k/xmit.c
273 +++ b/drivers/net/wireless/ath/ath9k/xmit.c
274 @@ -166,7 +166,7 @@ static void ath_tx_flush_tid(struct ath_
275 fi = get_frame_info(bf->bf_mpdu);
277 ath_tx_update_baw(sc, tid, fi->seqno);
278 - ath_tx_complete_buf(sc, bf, txq, &bf_head, &ts, 0, 0);
279 + ath_tx_complete_buf(sc, bf, txq, &bf_head, &ts, 0, 1);
281 ath_tx_send_normal(sc, txq, NULL, &bf_head);
283 @@ -1194,16 +1194,14 @@ bool ath_drain_all_txq(struct ath_softc
284 if (sc->sc_flags & SC_OP_INVALID)
287 - /* Stop beacon queue */
288 - ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
289 + ath9k_hw_abort_tx_dma(ah);
291 - /* Stop data queues */
292 + /* Check if any queue remains active */
293 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
294 - if (ATH_TXQ_SETUP(sc, i)) {
295 - txq = &sc->tx.txq[i];
296 - ath9k_hw_stoptxdma(ah, txq->axq_qnum);
297 - npend += ath9k_hw_numtxpending(ah, txq->axq_qnum);
299 + if (!ATH_TXQ_SETUP(sc, i))
302 + npend += ath9k_hw_numtxpending(ah, sc->tx.txq[i].axq_qnum);
306 @@ -2014,8 +2012,7 @@ static void ath_tx_processq(struct ath_s
307 spin_lock_bh(&txq->axq_lock);
308 if (list_empty(&txq->axq_q)) {
309 txq->axq_link = NULL;
310 - if (sc->sc_flags & SC_OP_TXAGGR &&
311 - !txq->txq_flush_inprogress)
312 + if (sc->sc_flags & SC_OP_TXAGGR)
313 ath_txq_schedule(sc, txq);
314 spin_unlock_bh(&txq->axq_lock);
316 @@ -2096,7 +2093,7 @@ static void ath_tx_processq(struct ath_s
318 spin_lock_bh(&txq->axq_lock);
320 - if (sc->sc_flags & SC_OP_TXAGGR && !txq->txq_flush_inprogress)
321 + if (sc->sc_flags & SC_OP_TXAGGR)
322 ath_txq_schedule(sc, txq);
323 spin_unlock_bh(&txq->axq_lock);
325 @@ -2267,18 +2264,17 @@ void ath_tx_edma_tasklet(struct ath_soft
327 spin_lock_bh(&txq->axq_lock);
329 - if (!txq->txq_flush_inprogress) {
330 - if (!list_empty(&txq->txq_fifo_pending)) {
331 - INIT_LIST_HEAD(&bf_head);
332 - bf = list_first_entry(&txq->txq_fifo_pending,
333 - struct ath_buf, list);
334 - list_cut_position(&bf_head,
335 - &txq->txq_fifo_pending,
336 - &bf->bf_lastbf->list);
337 - ath_tx_txqaddbuf(sc, txq, &bf_head);
338 - } else if (sc->sc_flags & SC_OP_TXAGGR)
339 - ath_txq_schedule(sc, txq);
341 + if (!list_empty(&txq->txq_fifo_pending)) {
342 + INIT_LIST_HEAD(&bf_head);
343 + bf = list_first_entry(&txq->txq_fifo_pending,
344 + struct ath_buf, list);
345 + list_cut_position(&bf_head,
346 + &txq->txq_fifo_pending,
347 + &bf->bf_lastbf->list);
348 + ath_tx_txqaddbuf(sc, txq, &bf_head);
349 + } else if (sc->sc_flags & SC_OP_TXAGGR)
350 + ath_txq_schedule(sc, txq);
352 spin_unlock_bh(&txq->axq_lock);
355 --- a/net/mac80211/chan.c
356 +++ b/net/mac80211/chan.c
357 @@ -77,6 +77,9 @@ bool ieee80211_set_channel_type(struct i
358 switch (tmp->vif.bss_conf.channel_type) {
359 case NL80211_CHAN_NO_HT:
360 case NL80211_CHAN_HT20:
361 + if (superchan > tmp->vif.bss_conf.channel_type)
364 superchan = tmp->vif.bss_conf.channel_type;
366 case NL80211_CHAN_HT40PLUS: