package/mac80211/patches/530-b43-optimize-hotpath-mmio.patch

   1 --- a/drivers/net/wireless/b43/b43.h
   2 +++ b/drivers/net/wireless/b43/b43.h
   3 @@ -778,8 +778,8 @@ struct b43_wldev {
   4         /* Reason code of the last interrupt. */
   5         u32 irq_reason;
   6         u32 dma_reason[6];
   7 -       /* saved irq enable/disable state bitfield. */
   8 -       u32 irq_savedstate;
   9 +       /* The currently active generic-interrupt mask. */
  10 +       u32 irq_mask;
  11         /* Link Quality calculation context. */
  12         struct b43_noise_calculation noisecalc;
  13         /* if > 0 MAC is suspended. if == 0 MAC is enabled. */
  14 --- a/drivers/net/wireless/b43/main.c
  15 +++ b/drivers/net/wireless/b43/main.c
  16 @@ -673,32 +673,6 @@ static void b43_short_slot_timing_disabl
  17         b43_set_slot_time(dev, 20);
  18  }
  19
  20 -/* Enable a Generic IRQ. "mask" is the mask of which IRQs to enable.
  21 - * Returns the _previously_ enabled IRQ mask.
  22 - */
  23 -static inline u32 b43_interrupt_enable(struct b43_wldev *dev, u32 mask)
  24 -{
  25 -       u32 old_mask;
  26 -
  27 -       old_mask = b43_read32(dev, B43_MMIO_GEN_IRQ_MASK);
  28 -       b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, old_mask | mask);
  29 -
  30 -       return old_mask;
  31 -}
  32 -
  33 -/* Disable a Generic IRQ. "mask" is the mask of which IRQs to disable.
  34 - * Returns the _previously_ enabled IRQ mask.
  35 - */
  36 -static inline u32 b43_interrupt_disable(struct b43_wldev *dev, u32 mask)
  37 -{
  38 -       u32 old_mask;
  39 -
  40 -       old_mask = b43_read32(dev, B43_MMIO_GEN_IRQ_MASK);
  41 -       b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, old_mask & ~mask);
  42 -
  43 -       return old_mask;
  44 -}
  45 -
  46  /* Synchronize IRQ top- and bottom-half.
  47   * IRQs must be masked before calling this.
  48   * This must not be called with the irq_lock held.
  49 @@ -1593,7 +1567,7 @@ static void handle_irq_beacon(struct b43
  50         /* This is the bottom half of the asynchronous beacon update. */
  51
  52         /* Ignore interrupt in the future. */
  53 -       dev->irq_savedstate &= ~B43_IRQ_BEACON;
  54 +       dev->irq_mask &= ~B43_IRQ_BEACON;
  55
  56         cmd = b43_read32(dev, B43_MMIO_MACCMD);
  57         beacon0_valid = (cmd & B43_MACCMD_BEACON0_VALID);
  58 @@ -1602,7 +1576,7 @@ static void handle_irq_beacon(struct b43
  59         /* Schedule interrupt manually, if busy. */
  60         if (beacon0_valid && beacon1_valid) {
  61                 b43_write32(dev, B43_MMIO_GEN_IRQ_REASON, B43_IRQ_BEACON);
  62 -               dev->irq_savedstate |= B43_IRQ_BEACON;
  63 +               dev->irq_mask |= B43_IRQ_BEACON;
  64                 return;
  65         }
  66
  67 @@ -1641,11 +1615,9 @@ static void b43_beacon_update_trigger_wo
  68         if (likely(dev && (b43_status(dev) >= B43_STAT_INITIALIZED))) {
  69                 spin_lock_irq(&wl->irq_lock);
  70                 /* update beacon right away or defer to irq */
  71 -               dev->irq_savedstate = b43_read32(dev, B43_MMIO_GEN_IRQ_MASK);
  72                 handle_irq_beacon(dev);
  73                 /* The handler might have updated the IRQ mask. */
  74 -               b43_write32(dev, B43_MMIO_GEN_IRQ_MASK,
  75 -                           dev->irq_savedstate);
  76 +               b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, dev->irq_mask);
  77                 mmiowb();
  78                 spin_unlock_irq(&wl->irq_lock);
  79         }
  80 @@ -1879,7 +1851,7 @@ static void b43_interrupt_tasklet(struct
  81         if (reason & B43_IRQ_TX_OK)
  82                 handle_irq_transmit_status(dev);
  83
  84 -       b43_interrupt_enable(dev, dev->irq_savedstate);
  85 +       b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, dev->irq_mask);
  86         mmiowb();
  87         spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
  88  }
  89 @@ -1893,7 +1865,9 @@ static void b43_interrupt_ack(struct b43
  90         b43_write32(dev, B43_MMIO_DMA2_REASON, dev->dma_reason[2]);
  91         b43_write32(dev, B43_MMIO_DMA3_REASON, dev->dma_reason[3]);
  92         b43_write32(dev, B43_MMIO_DMA4_REASON, dev->dma_reason[4]);
  93 +/* Unused ring
  94         b43_write32(dev, B43_MMIO_DMA5_REASON, dev->dma_reason[5]);
  95 +*/
  96  }
  97
  98  /* Interrupt handler top-half */
  99 @@ -1903,18 +1877,19 @@ static irqreturn_t b43_interrupt_handler
 100         struct b43_wldev *dev = dev_id;
 101         u32 reason;
 102
 103 -       if (!dev)
 104 -               return IRQ_NONE;
 105 +       B43_WARN_ON(!dev);
 106
 107         spin_lock(&dev->wl->irq_lock);
 108
 109 -       if (b43_status(dev) < B43_STAT_STARTED)
 110 +       if (unlikely(b43_status(dev) < B43_STAT_STARTED)) {
 111 +               /* This can only happen on shared IRQ lines. */
 112                 goto out;
 113 +       }
 114         reason = b43_read32(dev, B43_MMIO_GEN_IRQ_REASON);
 115         if (reason == 0xffffffff)       /* shared IRQ */
 116                 goto out;
 117         ret = IRQ_HANDLED;
 118 -       reason &= b43_read32(dev, B43_MMIO_GEN_IRQ_MASK);
 119 +       reason &= dev->irq_mask;
 120         if (!reason)
 121                 goto out;
 122
 123 @@ -1928,16 +1903,18 @@ static irqreturn_t b43_interrupt_handler
 124             & 0x0001DC00;
 125         dev->dma_reason[4] = b43_read32(dev, B43_MMIO_DMA4_REASON)
 126             & 0x0000DC00;
 127 +/* Unused ring
 128         dev->dma_reason[5] = b43_read32(dev, B43_MMIO_DMA5_REASON)
 129             & 0x0000DC00;
 130 +*/
 131
 132         b43_interrupt_ack(dev, reason);
 133         /* disable all IRQs. They are enabled again in the bottom half. */
 134 -       dev->irq_savedstate = b43_interrupt_disable(dev, B43_IRQ_ALL);
 135 +       b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, 0);
 136         /* save the reason code and call our bottom half. */
 137         dev->irq_reason = reason;
 138         tasklet_schedule(&dev->isr_tasklet);
 139 -      out:
 140 +out:
 141         mmiowb();
 142         spin_unlock(&dev->wl->irq_lock);
 143
 144 @@ -3799,7 +3776,7 @@ static void b43_wireless_core_stop(struc
 145          * setting the status to INITIALIZED, as the interrupt handler
 146          * won't care about IRQs then. */
 147         spin_lock_irqsave(&wl->irq_lock, flags);
 148 -       dev->irq_savedstate = b43_interrupt_disable(dev, B43_IRQ_ALL);
 149 +       b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, 0);
 150         b43_read32(dev, B43_MMIO_GEN_IRQ_MASK); /* flush */
 151         spin_unlock_irqrestore(&wl->irq_lock, flags);
 152         b43_synchronize_irq(dev);
 153 @@ -3840,7 +3817,7 @@ static int b43_wireless_core_start(struc
 154
 155         /* Start data flow (TX/RX). */
 156         b43_mac_enable(dev);
 157 -       b43_interrupt_enable(dev, dev->irq_savedstate);
 158 +       b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, dev->irq_mask);
 159
 160         /* Start maintainance work */
 161         b43_periodic_tasks_setup(dev);
 162 @@ -3998,9 +3975,9 @@ static void setup_struct_wldev_for_init(
 163         /* IRQ related flags */
 164         dev->irq_reason = 0;
 165         memset(dev->dma_reason, 0, sizeof(dev->dma_reason));
 166 -       dev->irq_savedstate = B43_IRQ_MASKTEMPLATE;
 167 +       dev->irq_mask = B43_IRQ_MASKTEMPLATE;
 168         if (b43_modparam_verbose < B43_VERBOSITY_DEBUG)
 169 -               dev->irq_savedstate &= ~B43_IRQ_PHY_TXERR;
 170 +               dev->irq_mask &= ~B43_IRQ_PHY_TXERR;
 171
 172         dev->mac_suspended = 1;
 173