package/mac80211/patches/581-ath9k_merge_reset_functions.patch

   1 --- a/drivers/net/wireless/ath/ath9k/main.c
   2 +++ b/drivers/net/wireless/ath/ath9k/main.c
   3 @@ -212,83 +212,47 @@ static int ath_update_survey_stats(struc
   4         return ret;
   5  }
   6
   7 -/*
   8 - * Set/change channels.  If the channel is really being changed, it's done
   9 - * by reseting the chip.  To accomplish this we must first cleanup any pending
  10 - * DMA, then restart stuff.
  11 -*/
  12 -static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
  13 -                   struct ath9k_channel *hchan)
  14 +static bool ath_prepare_reset(struct ath_softc *sc, bool retry_tx, bool flush)
  15  {
  16         struct ath_hw *ah = sc->sc_ah;
  17         struct ath_common *common = ath9k_hw_common(ah);
  18 -       struct ieee80211_conf *conf = &common->hw->conf;
  19 -       bool fastcc = true, stopped;
  20 -       struct ieee80211_channel *channel = hw->conf.channel;
  21 -       struct ath9k_hw_cal_data *caldata = NULL;
  22 -       int r;
  23 +       bool ret;
  24
  25 -       if (sc->sc_flags & SC_OP_INVALID)
  26 -               return -EIO;
  27 +       ieee80211_stop_queues(sc->hw);
  28
  29         sc->hw_busy_count = 0;
  30 -
  31         del_timer_sync(&common->ani.timer);
  32         cancel_work_sync(&sc->paprd_work);
  33         cancel_work_sync(&sc->hw_check_work);
  34         cancel_delayed_work_sync(&sc->tx_complete_work);
  35         cancel_delayed_work_sync(&sc->hw_pll_work);
  36
  37 -       ath9k_ps_wakeup(sc);
  38 -
  39 -       spin_lock_bh(&sc->sc_pcu_lock);
  40 -
  41 -       /*
  42 -        * This is only performed if the channel settings have
  43 -        * actually changed.
  44 -        *
  45 -        * To switch channels clear any pending DMA operations;
  46 -        * wait long enough for the RX fifo to drain, reset the
  47 -        * hardware at the new frequency, and then re-enable
  48 -        * the relevant bits of the h/w.
  49 -        */
  50         ath9k_hw_disable_interrupts(ah);
  51 -       stopped = ath_drain_all_txq(sc, false);
  52 -
  53 -       if (!ath_stoprecv(sc))
  54 -               stopped = false;
  55
  56 -       if (!ath9k_hw_check_alive(ah))
  57 -               stopped = false;
  58 +       ret = ath_drain_all_txq(sc, retry_tx);
  59
  60 -       /* XXX: do not flush receive queue here. We don't want
  61 -        * to flush data frames already in queue because of
  62 -        * changing channel. */
  63 -
  64 -       if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
  65 -               fastcc = false;
  66 +       if (!ath_stoprecv(sc))
  67 +               ret = false;
  68
  69 -       if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
  70 -               caldata = &sc->caldata;
  71 +       if (!flush) {
  72 +               if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  73 +                       ath_rx_tasklet(sc, 0, true);
  74 +               ath_rx_tasklet(sc, 0, false);
  75 +       } else {
  76 +               ath_flushrecv(sc);
  77 +       }
  78
  79 -       ath_dbg(common, ATH_DBG_CONFIG,
  80 -               "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
  81 -               sc->sc_ah->curchan->channel,
  82 -               channel->center_freq, conf_is_ht40(conf),
  83 -               fastcc);
  84 +       return ret;
  85 +}
  86
  87 -       r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
  88 -       if (r) {
  89 -               ath_err(common,
  90 -                       "Unable to reset channel (%u MHz), reset status %d\n",
  91 -                       channel->center_freq, r);
  92 -               goto ps_restore;
  93 -       }
  94 +static bool ath_complete_reset(struct ath_softc *sc, bool start)
  95 +{
  96 +       struct ath_hw *ah = sc->sc_ah;
  97 +       struct ath_common *common = ath9k_hw_common(ah);
  98
  99         if (ath_startrecv(sc) != 0) {
 100                 ath_err(common, "Unable to restart recv logic\n");
 101 -               r = -EIO;
 102 -               goto ps_restore;
 103 +               return false;
 104         }
 105
 106         ath9k_cmn_update_txpow(ah, sc->curtxpow,
 107 @@ -296,21 +260,89 @@ static int ath_set_channel(struct ath_so
 108         ath9k_hw_set_interrupts(ah, ah->imask);
 109         ath9k_hw_enable_interrupts(ah);
 110
 111 -       if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
 112 +       if (!(sc->sc_flags & (SC_OP_OFFCHANNEL)) && start) {
 113                 if (sc->sc_flags & SC_OP_BEACONS)
 114                         ath_set_beacon(sc);
 115 +
 116                 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 117                 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
 118                 if (!common->disable_ani)
 119                         ath_start_ani(common);
 120         }
 121
 122 - ps_restore:
 123 -       ieee80211_wake_queues(hw);
 124 +       ieee80211_wake_queues(sc->hw);
 125 +
 126 +       return true;
 127 +}
 128 +
 129 +static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan,
 130 +                             bool retry_tx)
 131 +{
 132 +       struct ath_hw *ah = sc->sc_ah;
 133 +       struct ath_common *common = ath9k_hw_common(ah);
 134 +       struct ath9k_hw_cal_data *caldata = NULL;
 135 +       bool fastcc = true;
 136 +       bool flush = false;
 137 +       int r;
 138 +
 139 +       if (!(sc->sc_flags & SC_OP_OFFCHANNEL)) {
 140 +               fastcc = false;
 141 +               caldata = &sc->caldata;
 142 +       }
 143 +
 144 +       if (!hchan) {
 145 +               fastcc = false;
 146 +               flush = true;
 147 +               hchan = ah->curchan;
 148 +       }
 149 +
 150 +       if (fastcc && !ath9k_hw_check_alive(ah))
 151 +               fastcc = false;
 152 +
 153 +       if (!ath_prepare_reset(sc, retry_tx, flush))
 154 +               fastcc = false;
 155 +
 156 +       ath_dbg(common, ATH_DBG_CONFIG,
 157 +               "Reset to %u MHz, HT40: %d fastcc: %d\n",
 158 +               hchan->channel, !!(hchan->channelFlags & (CHANNEL_HT40MINUS |
 159 +                                                         CHANNEL_HT40PLUS)),
 160 +               fastcc);
 161 +
 162 +       r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 163 +       if (r) {
 164 +               ath_err(common,
 165 +                       "Unable to reset channel, reset status %d\n", r);
 166 +               return r;
 167 +       }
 168 +
 169 +       if (!ath_complete_reset(sc, true))
 170 +               return -EIO;
 171 +
 172 +       return 0;
 173 +}
 174 +
 175 +
 176 +/*
 177 + * Set/change channels.  If the channel is really being changed, it's done
 178 + * by reseting the chip.  To accomplish this we must first cleanup any pending
 179 + * DMA, then restart stuff.
 180 +*/
 181 +static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 182 +                   struct ath9k_channel *hchan)
 183 +{
 184 +       int r;
 185
 186 +       if (sc->sc_flags & SC_OP_INVALID)
 187 +               return -EIO;
 188 +
 189 +       ath9k_ps_wakeup(sc);
 190 +
 191 +       spin_lock_bh(&sc->sc_pcu_lock);
 192 +       r = ath_reset_internal(sc, hchan, false);
 193         spin_unlock_bh(&sc->sc_pcu_lock);
 194
 195         ath9k_ps_restore(sc);
 196 +
 197         return r;
 198  }
 199
 200 @@ -893,28 +925,13 @@ static void ath_radio_enable(struct ath_
 201                         channel->center_freq, r);
 202         }
 203
 204 -       ath9k_cmn_update_txpow(ah, sc->curtxpow,
 205 -                              sc->config.txpowlimit, &sc->curtxpow);
 206 -       if (ath_startrecv(sc) != 0) {
 207 -               ath_err(common, "Unable to restart recv logic\n");
 208 -               goto out;
 209 -       }
 210 -       if (sc->sc_flags & SC_OP_BEACONS)
 211 -               ath_set_beacon(sc);     /* restart beacons */
 212 -
 213 -       /* Re-Enable  interrupts */
 214 -       ath9k_hw_set_interrupts(ah, ah->imask);
 215 -       ath9k_hw_enable_interrupts(ah);
 216 +       ath_complete_reset(sc, true);
 217
 218         /* Enable LED */
 219         ath9k_hw_cfg_output(ah, ah->led_pin,
 220                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 221         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 222
 223 -       ieee80211_wake_queues(hw);
 224 -       ieee80211_queue_delayed_work(hw, &sc->hw_pll_work, HZ/2);
 225 -
 226 -out:
 227         spin_unlock_bh(&sc->sc_pcu_lock);
 228
 229         ath9k_ps_restore(sc);
 230 @@ -927,12 +944,8 @@ void ath_radio_disable(struct ath_softc
 231         int r;
 232
 233         ath9k_ps_wakeup(sc);
 234 -       cancel_delayed_work_sync(&sc->hw_pll_work);
 235 -
 236         spin_lock_bh(&sc->sc_pcu_lock);
 237
 238 -       ieee80211_stop_queues(hw);
 239 -
 240         /*
 241          * Keep the LED on when the radio is disabled
 242          * during idle unassociated state.
 243 @@ -942,13 +955,7 @@ void ath_radio_disable(struct ath_softc
 244                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 245         }
 246
 247 -       /* Disable interrupts */
 248 -       ath9k_hw_disable_interrupts(ah);
 249 -
 250 -       ath_drain_all_txq(sc, false);   /* clear pending tx frames */
 251 -
 252 -       ath_stoprecv(sc);               /* turn off frame recv */
 253 -       ath_flushrecv(sc);              /* flush recv queue */
 254 +       ath_prepare_reset(sc, false, true);
 255
 256         if (!ah->curchan)
 257                 ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
 258 @@ -970,48 +977,11 @@ void ath_radio_disable(struct ath_softc
 259
 260  int ath_reset(struct ath_softc *sc, bool retry_tx)
 261  {
 262 -       struct ath_hw *ah = sc->sc_ah;
 263 -       struct ath_common *common = ath9k_hw_common(ah);
 264 -       struct ieee80211_hw *hw = sc->hw;
 265         int r;
 266
 267 -       sc->hw_busy_count = 0;
 268 -
 269 -       /* Stop ANI */
 270 -
 271 -       del_timer_sync(&common->ani.timer);
 272 -
 273         ath9k_ps_wakeup(sc);
 274
 275 -       ieee80211_stop_queues(hw);
 276 -
 277 -       ath9k_hw_disable_interrupts(ah);
 278 -       ath_drain_all_txq(sc, retry_tx);
 279 -
 280 -       ath_stoprecv(sc);
 281 -       ath_flushrecv(sc);
 282 -
 283 -       r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
 284 -       if (r)
 285 -               ath_err(common,
 286 -                       "Unable to reset hardware; reset status %d\n", r);
 287 -
 288 -       if (ath_startrecv(sc) != 0)
 289 -               ath_err(common, "Unable to start recv logic\n");
 290 -
 291 -       /*
 292 -        * We may be doing a reset in response to a request
 293 -        * that changes the channel so update any state that
 294 -        * might change as a result.
 295 -        */
 296 -       ath9k_cmn_update_txpow(ah, sc->curtxpow,
 297 -                              sc->config.txpowlimit, &sc->curtxpow);
 298 -
 299 -       if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
 300 -               ath_set_beacon(sc);     /* restart beacons */
 301 -
 302 -       ath9k_hw_set_interrupts(ah, ah->imask);
 303 -       ath9k_hw_enable_interrupts(ah);
 304 +       r = ath_reset_internal(sc, NULL, retry_tx);
 305
 306         if (retry_tx) {
 307                 int i;
 308 @@ -1024,12 +994,6 @@ int ath_reset(struct ath_softc *sc, bool
 309                 }
 310         }
 311
 312 -       ieee80211_wake_queues(hw);
 313 -
 314 -       /* Start ANI */
 315 -       if (!common->disable_ani)
 316 -               ath_start_ani(common);
 317 -
 318         ath9k_ps_restore(sc);
 319
 320         return r;
 321 @@ -1081,28 +1045,6 @@ static int ath9k_start(struct ieee80211_
 322                 goto mutex_unlock;
 323         }
 324
 325 -       /*
 326 -        * This is needed only to setup initial state
 327 -        * but it's best done after a reset.
 328 -        */
 329 -       ath9k_cmn_update_txpow(ah, sc->curtxpow,
 330 -                       sc->config.txpowlimit, &sc->curtxpow);
 331 -
 332 -       /*
 333 -        * Setup the hardware after reset:
 334 -        * The receive engine is set going.
 335 -        * Frame transmit is handled entirely
 336 -        * in the frame output path; there's nothing to do
 337 -        * here except setup the interrupt mask.
 338 -        */
 339 -       if (ath_startrecv(sc) != 0) {
 340 -               ath_err(common, "Unable to start recv logic\n");
 341 -               r = -EIO;
 342 -               spin_unlock_bh(&sc->sc_pcu_lock);
 343 -               goto mutex_unlock;
 344 -       }
 345 -       spin_unlock_bh(&sc->sc_pcu_lock);
 346 -
 347         /* Setup our intr mask. */
 348         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
 349                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
 350 @@ -1125,12 +1067,14 @@ static int ath9k_start(struct ieee80211_
 351
 352         /* Disable BMISS interrupt when we're not associated */
 353         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
 354 -       ath9k_hw_set_interrupts(ah, ah->imask);
 355 -       ath9k_hw_enable_interrupts(ah);
 356
 357 -       ieee80211_wake_queues(hw);
 358 +       if (!ath_complete_reset(sc, false)) {
 359 +               r = -EIO;
 360 +               spin_unlock_bh(&sc->sc_pcu_lock);
 361 +               goto mutex_unlock;
 362 +       }
 363
 364 -       ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 365 +       spin_unlock_bh(&sc->sc_pcu_lock);
 366
 367         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
 368             !ah->btcoex_hw.enabled) {