1 /******************************************************************************
3 ** FILE NAME : ifxmips_ptm_fw_regs_adsl.h
9 ** DESCRIPTION : PTM driver header file (firmware register for ADSL)
10 ** COPYRIGHT : Copyright (c) 2006
11 ** Infineon Technologies AG
12 ** Am Campeon 1-12, 85579 Neubiberg, Germany
14 ** This program is free software; you can redistribute it and/or modify
15 ** it under the terms of the GNU General Public License as published by
16 ** the Free Software Foundation; either version 2 of the License, or
17 ** (at your option) any later version.
20 ** $Date $Author $Comment
21 ** 07 JUL 2009 Xu Liang Init Version
22 *******************************************************************************/
26 #ifndef IFXMIPS_PTM_FW_REGS_ADSL_H
27 #define IFXMIPS_PTM_FW_REGS_ADSL_H
31 #if defined(CONFIG_DANUBE)
32 #include "ifxmips_ptm_fw_regs_danube.h"
33 #elif defined(CONFIG_AMAZON_SE)
34 #include "ifxmips_ptm_fw_regs_amazon_se.h"
35 #elif defined(CONFIG_AR9)
36 #include "ifxmips_ptm_fw_regs_ar9.h"
37 #elif defined(CONFIG_VR9)
38 #error VR9 is not ADSL PTM mode!
40 #error Platform is not specified!
46 * MIB Table Maintained by Firmware
49 struct wan_mib_table
{
50 unsigned int wrx_correct_pdu
; /* 0 */
51 unsigned int wrx_correct_pdu_bytes
; /* 1 */
52 unsigned int wrx_tccrc_err_pdu
; /* 2 */
53 unsigned int wrx_tccrc_err_pdu_bytes
; /* 3 */
54 unsigned int wrx_ethcrc_err_pdu
; /* 4 */
55 unsigned int wrx_ethcrc_err_pdu_bytes
; /* 5 */
56 unsigned int wrx_nodesc_drop_pdu
; /* 6 */
57 unsigned int wrx_len_violation_drop_pdu
; /* 7 */
58 unsigned int wrx_idle_bytes
; /* 8 */
59 unsigned int wrx_nonidle_cw
; /* 9 */
60 unsigned int wrx_idle_cw
; /* A */
61 unsigned int wrx_err_cw
; /* B */
62 unsigned int wtx_total_pdu
; /* C */
63 unsigned int wtx_total_bytes
; /* D */
64 unsigned int res0
; /* E */
65 unsigned int res1
; /* F */
70 * Host-PPE Communication Data Structure
73 #if defined(__BIG_ENDIAN)
76 unsigned int family
:4;
77 unsigned int fwtype
:4;
78 unsigned int interface
:4;
79 unsigned int fwmode
:4;
80 unsigned int major
:8;
81 unsigned int minor
:8;
84 struct wrx_port_cfg_status
{
87 unsigned int res0
:12;
88 unsigned int dmach
:3;
92 unsigned int res2
:14;
93 unsigned int local_state
:2; // init with 0, written by firmware only
94 unsigned int res3
:15;
95 unsigned int partner_state
:1; // init with 0, written by firmware only
99 struct wrx_dma_channel_config
{
101 unsigned int res3
:1;
102 unsigned int res4
:2;
103 unsigned int res5
:1;
104 unsigned int desba
:28;
106 unsigned int res1
:16;
107 unsigned int res2
:16;
109 unsigned int deslen
:16;
110 unsigned int vlddes
:16;
113 struct wtx_port_cfg
{
115 unsigned int tx_cwth2
:8;
116 unsigned int tx_cwth1
:8;
117 unsigned int res0
:16;
120 struct wtx_dma_channel_config
{
122 unsigned int res3
:1;
123 unsigned int res4
:2;
124 unsigned int res5
:1;
125 unsigned int desba
:28;
128 unsigned int res1
:16;
129 unsigned int res2
:16;
132 unsigned int deslen
:16;
133 unsigned int vlddes
:16;
136 struct eth_efmtc_crc_cfg
{
138 unsigned int res0
:6;
139 unsigned int tx_eth_crc_gen
:1;
140 unsigned int tx_tc_crc_gen
:1;
141 unsigned int tx_tc_crc_len
:8;
142 unsigned int res1
:5;
143 unsigned int rx_eth_crc_present
:1;
144 unsigned int rx_eth_crc_check
:1;
145 unsigned int rx_tc_crc_check
:1;
146 unsigned int rx_tc_crc_len
:8;
150 struct rx_descriptor
{
156 unsigned int res1
:3;
157 unsigned int byteoff
:2;
158 unsigned int res2
:2;
161 unsigned int datalen
:16;
163 unsigned int res3
:4;
164 unsigned int dataptr
:28;
167 struct tx_descriptor
{
173 unsigned int byteoff
:5;
174 unsigned int res1
:5;
175 unsigned int iscell
:1;
177 unsigned int datalen
:16;
179 unsigned int res2
:4;
180 unsigned int dataptr
:28;
183 #else /* defined(__BIG_ENDIAN) */
185 struct wrx_port_cfg_status
{
187 unsigned int res1
:1;
188 unsigned int dmach
:3;
189 unsigned int res0
:12;
190 unsigned int mfs
:16;
193 unsigned int partner_state
:1;
194 unsigned int res3
:15;
195 unsigned int local_state
:2;
196 unsigned int res2
:14;
199 struct wrx_dma_channel_config
{
201 unsigned int desba
:28;
202 unsigned int res5
:1;
203 unsigned int res4
:2;
204 unsigned int res3
:1;
206 unsigned int res2
:16;
207 unsigned int res1
:16;
209 unsigned int vlddes
:16;
210 unsigned int deslen
:16;
213 struct wtx_port_cfg
{
215 unsigned int res0
:16;
216 unsigned int tx_cwth1
:8;
217 unsigned int tx_cwth2
:8;
220 struct wtx_dma_channel_config
{
222 unsigned int desba
:28;
223 unsigned int res5
:1;
224 unsigned int res4
:2;
225 unsigned int res3
:1;
227 unsigned int res2
:16;
228 unsigned int res1
:16;
230 unsigned int vlddes
:16;
231 unsigned int deslen
:16;
234 struct eth_efmtc_crc_cfg
{
236 unsigned int rx_tc_crc_len
:8;
237 unsigned int rx_tc_crc_check
:1;
238 unsigned int rx_eth_crc_check
:1;
239 unsigned int rx_eth_crc_present
:1;
240 unsigned int res1
:5;
241 unsigned int tx_tc_crc_len
:8;
242 unsigned int tx_tc_crc_gen
:1;
243 unsigned int tx_eth_crc_gen
:1;
244 unsigned int res0
:6;
248 struct rx_descriptor
{
250 unsigned int dataptr
:28;
251 unsigned int res3
:4;
253 unsigned int datalen
:16;
256 unsigned int res2
:2;
257 unsigned int byteoff
:2;
258 unsigned int res1
:3;
265 struct tx_descriptor
{
267 unsigned int dataptr
:28;
268 unsigned int res2
:4;
270 unsigned int datalen
:16;
272 unsigned int iscell
:1;
273 unsigned int res1
:5;
274 unsigned int byteoff
:5;
280 #endif /* defined(__BIG_ENDIAN) */
284 #endif // IFXMIPS_PTM_FW_REGS_ADSL_H