amlogic: scpi: Add support to retrieve chip ID
[project/bcm63xx/atf.git] / plat / amlogic / common / aml_scpi.c
1 /*
2 * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include <assert.h>
8 #include <crypto/sha_dma.h>
9 #include <lib/mmio.h>
10 #include <plat/common/platform.h>
11 #include <platform_def.h>
12 #include <string.h>
13
14 #include "aml_private.h"
15
16 #define SIZE_SHIFT 20
17 #define SIZE_MASK 0x1FF
18 #define SIZE_FWBLK 0x200UL
19
20 /*
21 * Note: The Amlogic SCP firmware uses the legacy SCPI protocol.
22 */
23 #define SCPI_CMD_SET_CSS_POWER_STATE 0x04
24 #define SCPI_CMD_SET_SYS_POWER_STATE 0x08
25
26 #define SCPI_CMD_JTAG_SET_STATE 0xC0
27 #define SCPI_CMD_EFUSE_READ 0xC2
28 #define SCPI_CMD_CHIP_ID 0xC6
29
30 #define SCPI_CMD_COPY_FW 0xd4
31 #define SCPI_CMD_SET_FW_ADDR 0xd3
32 #define SCPI_CMD_FW_SIZE 0xd2
33
34 static inline uint32_t aml_scpi_cmd(uint32_t command, uint32_t size)
35 {
36 return command | (size << SIZE_SHIFT);
37 }
38
39 static void aml_scpi_secure_message_send(uint32_t command, uint32_t size)
40 {
41 aml_mhu_secure_message_send(aml_scpi_cmd(command, size));
42 }
43
44 static uint32_t aml_scpi_secure_message_receive(void **message_out, size_t *size_out)
45 {
46 uint32_t response = aml_mhu_secure_message_wait();
47
48 size_t size = (response >> SIZE_SHIFT) & SIZE_MASK;
49
50 response &= ~(SIZE_MASK << SIZE_SHIFT);
51
52 if (size_out != NULL)
53 *size_out = size;
54
55 if (message_out != NULL)
56 *message_out = (void *)AML_MHU_SECURE_SCP_TO_AP_PAYLOAD;
57
58 return response;
59 }
60
61 void aml_scpi_set_css_power_state(u_register_t mpidr, uint32_t cpu_state,
62 uint32_t cluster_state, uint32_t css_state)
63 {
64 uint32_t state = (mpidr & 0x0F) | /* CPU ID */
65 ((mpidr & 0xF00) >> 4) | /* Cluster ID */
66 (cpu_state << 8) |
67 (cluster_state << 12) |
68 (css_state << 16);
69
70 aml_mhu_secure_message_start();
71 mmio_write_32(AML_MHU_SECURE_AP_TO_SCP_PAYLOAD, state);
72 aml_mhu_secure_message_send(aml_scpi_cmd(SCPI_CMD_SET_CSS_POWER_STATE, 4));
73 aml_mhu_secure_message_wait();
74 aml_mhu_secure_message_end();
75 }
76
77 uint32_t aml_scpi_sys_power_state(uint64_t system_state)
78 {
79 uint32_t *response;
80 size_t size;
81
82 aml_mhu_secure_message_start();
83 mmio_write_8(AML_MHU_SECURE_AP_TO_SCP_PAYLOAD, system_state);
84 aml_mhu_secure_message_send(aml_scpi_cmd(SCPI_CMD_SET_SYS_POWER_STATE, 1));
85 aml_scpi_secure_message_receive((void *)&response, &size);
86 aml_mhu_secure_message_end();
87
88 return *response;
89 }
90
91 void aml_scpi_jtag_set_state(uint32_t state, uint8_t select)
92 {
93 assert(state <= AML_JTAG_STATE_OFF);
94
95 if (select > AML_JTAG_A53_EE) {
96 WARN("BL31: Invalid JTAG select (0x%x).\n", select);
97 return;
98 }
99
100 aml_mhu_secure_message_start();
101 mmio_write_32(AML_MHU_SECURE_AP_TO_SCP_PAYLOAD,
102 (state << 8) | (uint32_t)select);
103 aml_mhu_secure_message_send(aml_scpi_cmd(SCPI_CMD_JTAG_SET_STATE, 4));
104 aml_mhu_secure_message_wait();
105 aml_mhu_secure_message_end();
106 }
107
108 uint32_t aml_scpi_efuse_read(void *dst, uint32_t base, uint32_t size)
109 {
110 uint32_t *response;
111 size_t resp_size;
112
113 if (size > 0x1FC)
114 return 0;
115
116 aml_mhu_secure_message_start();
117 mmio_write_32(AML_MHU_SECURE_AP_TO_SCP_PAYLOAD, base);
118 mmio_write_32(AML_MHU_SECURE_AP_TO_SCP_PAYLOAD + 4, size);
119 aml_mhu_secure_message_send(aml_scpi_cmd(SCPI_CMD_EFUSE_READ, 8));
120 aml_scpi_secure_message_receive((void *)&response, &resp_size);
121 aml_mhu_secure_message_end();
122
123 /*
124 * response[0] is the size of the response message.
125 * response[1 ... N] are the contents.
126 */
127 if (*response != 0)
128 memcpy(dst, response + 1, *response);
129
130 return *response;
131 }
132
133 void aml_scpi_unknown_thermal(uint32_t arg0, uint32_t arg1,
134 uint32_t arg2, uint32_t arg3)
135 {
136 aml_mhu_secure_message_start();
137 mmio_write_32(AML_MHU_SECURE_AP_TO_SCP_PAYLOAD + 0x0, arg0);
138 mmio_write_32(AML_MHU_SECURE_AP_TO_SCP_PAYLOAD + 0x4, arg1);
139 mmio_write_32(AML_MHU_SECURE_AP_TO_SCP_PAYLOAD + 0x8, arg2);
140 mmio_write_32(AML_MHU_SECURE_AP_TO_SCP_PAYLOAD + 0xC, arg3);
141 aml_mhu_secure_message_send(aml_scpi_cmd(0xC3, 16));
142 aml_mhu_secure_message_wait();
143 aml_mhu_secure_message_end();
144 }
145
146 uint32_t aml_scpi_get_chip_id(uint8_t *obuff, uint32_t osize)
147 {
148 uint32_t *response;
149 size_t resp_size;
150
151 if ((osize != 16) && (osize != 12))
152 return 0;
153
154 aml_mhu_secure_message_start();
155 aml_mhu_secure_message_send(aml_scpi_cmd(SCPI_CMD_CHIP_ID, osize));
156 aml_scpi_secure_message_receive((void *)&response, &resp_size);
157 aml_mhu_secure_message_end();
158
159 if (!((resp_size == 16) && (osize == 16)) &&
160 !((resp_size == 0) && (osize == 12)))
161 return 0;
162
163 memcpy((void *)obuff, (const void *)response, osize);
164
165 return osize;
166 }
167
168 static inline void aml_scpi_copy_scp_data(uint8_t *data, size_t len)
169 {
170 void *dst = (void *)AML_MHU_SECURE_AP_TO_SCP_PAYLOAD;
171 size_t sz;
172
173 mmio_write_32(AML_MHU_SECURE_AP_TO_SCP_PAYLOAD, len);
174 aml_scpi_secure_message_send(SCPI_CMD_FW_SIZE, len);
175 aml_mhu_secure_message_wait();
176
177 for (sz = 0; sz < len; sz += SIZE_FWBLK) {
178 memcpy(dst, data + sz, MIN(SIZE_FWBLK, len - sz));
179 aml_mhu_secure_message_send(SCPI_CMD_COPY_FW);
180 }
181 }
182
183 static inline void aml_scpi_set_scp_addr(uint64_t addr, size_t len)
184 {
185 volatile uint64_t *dst = (uint64_t *)AML_MHU_SECURE_AP_TO_SCP_PAYLOAD;
186
187 /*
188 * It is ok as AML_MHU_SECURE_AP_TO_SCP_PAYLOAD is mapped as
189 * non cachable
190 */
191 *dst = addr;
192 aml_scpi_secure_message_send(SCPI_CMD_SET_FW_ADDR, sizeof(addr));
193 aml_mhu_secure_message_wait();
194
195 mmio_write_32(AML_MHU_SECURE_AP_TO_SCP_PAYLOAD, len);
196 aml_scpi_secure_message_send(SCPI_CMD_FW_SIZE, len);
197 aml_mhu_secure_message_wait();
198 }
199
200 static inline void aml_scpi_send_fw_hash(uint8_t hash[], size_t len)
201 {
202 void *dst = (void *)AML_MHU_SECURE_AP_TO_SCP_PAYLOAD;
203
204 memcpy(dst, hash, len);
205 aml_mhu_secure_message_send(0xd0);
206 aml_mhu_secure_message_send(0xd1);
207 aml_mhu_secure_message_send(0xd5);
208 aml_mhu_secure_message_end();
209 }
210
211 /**
212 * Upload a FW to SCP.
213 *
214 * @param addr: firmware data address
215 * @param size: size of firmware
216 * @param send: If set, actually copy the firmware in SCP memory otherwise only
217 * send the firmware address.
218 */
219 void aml_scpi_upload_scp_fw(uintptr_t addr, size_t size, int send)
220 {
221 struct asd_ctx ctx;
222
223 asd_sha_init(&ctx, ASM_SHA256);
224 asd_sha_update(&ctx, (void *)addr, size);
225 asd_sha_finalize(&ctx);
226
227 aml_mhu_secure_message_start();
228 if (send == 0)
229 aml_scpi_set_scp_addr(addr, size);
230 else
231 aml_scpi_copy_scp_data((void *)addr, size);
232
233 aml_scpi_send_fw_hash(ctx.digest, sizeof(ctx.digest));
234 }