plat/marvell/common/marvell_bl31_setup.c

   1 /*
   2  * Copyright (C) 2018 Marvell International Ltd.
   3  *
   4  * SPDX-License-Identifier:     BSD-3-Clause
   5  * https://spdx.org/licenses
   6  */
   7
   8 #include <arch.h>
   9 #include <assert.h>
  10 #include <console.h>
  11 #include <debug.h>
  12 #include <marvell_def.h>
  13 #include <marvell_plat_priv.h>
  14 #include <plat_marvell.h>
  15 #include <platform.h>
  16
  17 #ifdef USE_CCI
  18 #include <cci.h>
  19 #endif
  20
  21 /*
  22  * The next 3 constants identify the extents of the code, RO data region and the
  23  * limit of the BL31 image.  These addresses are used by the MMU setup code and
  24  * therefore they must be page-aligned.  It is the responsibility of the linker
  25  * script to ensure that __RO_START__, __RO_END__ & __BL31_END__ linker symbols
  26  * refer to page-aligned addresses.
  27  */
  28 #define BL31_END (unsigned long)(&__BL31_END__)
  29
  30 /*
  31  * Placeholder variables for copying the arguments that have been passed to
  32  * BL31 from BL2.
  33  */
  34 static entry_point_info_t bl32_image_ep_info;
  35 static entry_point_info_t bl33_image_ep_info;
  36
  37 /* Weak definitions may be overridden in specific ARM standard platform */
  38 #pragma weak bl31_early_platform_setup2
  39 #pragma weak bl31_platform_setup
  40 #pragma weak bl31_plat_arch_setup
  41 #pragma weak bl31_plat_get_next_image_ep_info
  42 #pragma weak plat_get_syscnt_freq2
  43
  44 /*****************************************************************************
  45  * Return a pointer to the 'entry_point_info' structure of the next image for
  46  * the security state specified. BL33 corresponds to the non-secure image type
  47  * while BL32 corresponds to the secure image type. A NULL pointer is returned
  48  * if the image does not exist.
  49  *****************************************************************************
  50  */
  51 entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
  52 {
  53         entry_point_info_t *next_image_info;
  54
  55         assert(sec_state_is_valid(type));
  56         next_image_info = (type == NON_SECURE)
  57                         ? &bl33_image_ep_info : &bl32_image_ep_info;
  58
  59         return next_image_info;
  60 }
  61
  62 /*****************************************************************************
  63  * Perform any BL31 early platform setup common to ARM standard platforms.
  64  * Here is an opportunity to copy parameters passed by the calling EL (S-EL1
  65  * in BL2 & EL3 in BL1) before they are lost (potentially). This needs to be
  66  * done before the MMU is initialized so that the memory layout can be used
  67  * while creating page tables. BL2 has flushed this information to memory, so
  68  * we are guaranteed to pick up good data.
  69  *****************************************************************************
  70  */
  71 void marvell_bl31_early_platform_setup(void *from_bl2,
  72                                        uintptr_t soc_fw_config,
  73                                        uintptr_t hw_config,
  74                                        void *plat_params_from_bl2)
  75 {
  76         /* Initialize the console to provide early debug support */
  77         marvell_console_boot_init();
  78
  79 #if RESET_TO_BL31
  80         /* There are no parameters from BL2 if BL31 is a reset vector */
  81         assert(from_bl2 == NULL);
  82         assert(plat_params_from_bl2 == NULL);
  83
  84 #ifdef BL32_BASE
  85         /* Populate entry point information for BL32 */
  86         SET_PARAM_HEAD(&bl32_image_ep_info,
  87                                 PARAM_EP,
  88                                 VERSION_1,
  89                                 0);
  90         SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE);
  91         bl32_image_ep_info.pc = BL32_BASE;
  92         bl32_image_ep_info.spsr = marvell_get_spsr_for_bl32_entry();
  93 #endif /* BL32_BASE */
  94
  95         /* Populate entry point information for BL33 */
  96         SET_PARAM_HEAD(&bl33_image_ep_info,
  97                                 PARAM_EP,
  98                                 VERSION_1,
  99                                 0);
 100         /*
 101          * Tell BL31 where the non-trusted software image
 102          * is located and the entry state information
 103          */
 104         bl33_image_ep_info.pc = plat_get_ns_image_entrypoint();
 105         bl33_image_ep_info.spsr = marvell_get_spsr_for_bl33_entry();
 106         SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE);
 107
 108 #else
 109         /*
 110          * In debug builds, we pass a special value in 'plat_params_from_bl2'
 111          * to verify platform parameters from BL2 to BL31.
 112          * In release builds, it's not used.
 113          */
 114         assert(((unsigned long long)plat_params_from_bl2) ==
 115                 MARVELL_BL31_PLAT_PARAM_VAL);
 116
 117         /*
 118          * Check params passed from BL2 should not be NULL,
 119          */
 120         bl_params_t *params_from_bl2 = (bl_params_t *)from_bl2;
 121         assert(params_from_bl2 != NULL);
 122         assert(params_from_bl2->h.type == PARAM_BL_PARAMS);
 123         assert(params_from_bl2->h.version >= VERSION_2);
 124
 125         bl_params_node_t *bl_params = params_from_bl2->head;
 126
 127         /*
 128          * Copy BL33 and BL32 (if present), entry point information.
 129          * They are stored in Secure RAM, in BL2's address space.
 130          */
 131         while (bl_params != NULL) {
 132                 if (bl_params->image_id == BL32_IMAGE_ID)
 133                         bl32_image_ep_info = *bl_params->ep_info;
 134
 135                 if (bl_params->image_id == BL33_IMAGE_ID)
 136                         bl33_image_ep_info = *bl_params->ep_info;
 137
 138                 bl_params = bl_params->next_params_info;
 139         }
 140 #endif
 141 }
 142
 143 void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
 144                                 u_register_t arg2, u_register_t arg3)
 145
 146 {
 147         marvell_bl31_early_platform_setup((void *)arg0, arg1, arg2,
 148                                           (void *)arg3);
 149
 150 #ifdef USE_CCI
 151         /*
 152          * Initialize CCI for this cluster during cold boot.
 153          * No need for locks as no other CPU is active.
 154          */
 155         plat_marvell_interconnect_init();
 156
 157         /*
 158          * Enable CCI coherency for the primary CPU's cluster.
 159          * Platform specific PSCI code will enable coherency for other
 160          * clusters.
 161          */
 162         plat_marvell_interconnect_enter_coherency();
 163 #endif
 164 }
 165
 166 /*****************************************************************************
 167  * Perform any BL31 platform setup common to ARM standard platforms
 168  *****************************************************************************
 169  */
 170 void marvell_bl31_platform_setup(void)
 171 {
 172         /* Initialize the GIC driver, cpu and distributor interfaces */
 173         plat_marvell_gic_driver_init();
 174         plat_marvell_gic_init();
 175
 176         /* For Armada-8k-plus family, the SoC includes more than
 177          * a single AP die, but the default die that boots is AP #0.
 178          * For other families there is only one die (#0).
 179          * Initialize psci arch from die 0
 180          */
 181         marvell_psci_arch_init(0);
 182 }
 183
 184 /*****************************************************************************
 185  * Perform any BL31 platform runtime setup prior to BL31 exit common to ARM
 186  * standard platforms
 187  *****************************************************************************
 188  */
 189 void marvell_bl31_plat_runtime_setup(void)
 190 {
 191         console_switch_state(CONSOLE_FLAG_RUNTIME);
 192
 193         /* Initialize the runtime console */
 194         marvell_console_runtime_init();
 195 }
 196
 197 void bl31_platform_setup(void)
 198 {
 199         marvell_bl31_platform_setup();
 200 }
 201
 202 void bl31_plat_runtime_setup(void)
 203 {
 204         marvell_bl31_plat_runtime_setup();
 205 }
 206
 207 /*****************************************************************************
 208  * Perform the very early platform specific architectural setup shared between
 209  * ARM standard platforms. This only does basic initialization. Later
 210  * architectural setup (bl31_arch_setup()) does not do anything platform
 211  * specific.
 212  *****************************************************************************
 213  */
 214 void marvell_bl31_plat_arch_setup(void)
 215 {
 216         marvell_setup_page_tables(BL31_BASE,
 217                                   BL31_END - BL31_BASE,
 218                                   BL_CODE_BASE,
 219                                   BL_CODE_END,
 220                                   BL_RO_DATA_BASE,
 221                                   BL_RO_DATA_END
 222 #if USE_COHERENT_MEM
 223                                 , BL_COHERENT_RAM_BASE,
 224                                   BL_COHERENT_RAM_END
 225 #endif
 226                         );
 227
 228 #if BL31_CACHE_DISABLE
 229         enable_mmu_el3(DISABLE_DCACHE);
 230         INFO("Cache is disabled in BL3\n");
 231 #else
 232         enable_mmu_el3(0);
 233 #endif
 234 }
 235
 236 void bl31_plat_arch_setup(void)
 237 {
 238         marvell_bl31_plat_arch_setup();
 239 }
 240
 241 unsigned int plat_get_syscnt_freq2(void)
 242 {
 243         return PLAT_REF_CLK_IN_HZ;
 244 }