2 * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
4 * SPDX-License-Identifier: BSD-3-Clause
8 #include <platform_def.h>
10 .section .rodata.gic_reg_name, "aS"
12 .asciz "gicc_hppir", "gicc_ahppir", "gicc_ctlr", ""
14 .asciz "gicd_ispendr regs (Offsets 0x200 - 0x278)\n" \
15 " Offset:\t\t\tvalue\n"
21 /* ---------------------------------------------
22 * The below macro prints out relevant GIC
23 * registers whenever an unhandled exception is
25 * Clobbers: x0 - x10, x16, x17, sp
26 * ---------------------------------------------
28 .macro plat_crash_print_regs
29 mov_imm x16, BASE_GICD_BASE
30 mov_imm x17, BASE_GICC_BASE
31 /* Load the gicc reg list to x6 */
33 /* Load the gicc regs to gp regs used by str_in_crash_buf_print */
34 ldr w8, [x17, #GICC_HPPIR]
35 ldr w9, [x17, #GICC_AHPPIR]
36 ldr w10, [x17, #GICC_CTLR]
37 /* Store to the crash buf and print to console */
38 bl str_in_crash_buf_print
40 /* Print the GICD_ISPENDR regs */
41 add x7, x16, #GICD_ISPENDR
47 b.eq exit_print_gic_regs
62 .section .rodata.cci_reg_name, "aS"
64 .asciz "cci_snoop_ctrl_cluster0", "cci_snoop_ctrl_cluster1" , ""
66 /* ------------------------------------------------
67 * The below macro prints out relevant interconnect
68 * registers whenever an unhandled exception is
70 * Clobbers: x0 - x9, sp
71 * ------------------------------------------------
73 .macro plat_print_interconnect_regs
74 adr x6, cci_iface_regs
75 /* Store in x7 the base address of the first interface */
76 mov_imm x7, (PLAT_MT_CCI_BASE + SLAVE_IFACE_OFFSET( \
77 PLAT_MT_CCI_CLUSTER0_SL_IFACE_IX))
78 ldr w8, [x7, #SNOOP_CTRL_REG]
79 /* Store in x7 the base address of the second interface */
80 mov_imm x7, (PLAT_MT_CCI_BASE + SLAVE_IFACE_OFFSET( \
81 PLAT_MT_CCI_CLUSTER1_SL_IFACE_IX))
82 ldr w9, [x7, #SNOOP_CTRL_REG]
83 /* Store to the crash buf and print to console */
84 bl str_in_crash_buf_print