2 * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved.
4 * SPDX-License-Identifier: BSD-3-Clause
8 #include <arch_helpers.h>
9 #include <common/bl_common.h>
10 #include <common/desc_image_load.h>
11 #include <plat/common/common_def.h>
12 #include <drivers/console.h>
13 #include <common/debug.h>
14 #include <drivers/generic_delay_timer.h>
16 #include <mt_gic_v3.h>
18 #include <mtk_plat_common.h>
19 #include <plat_debug.h>
20 #include <plat_private.h>
21 #include <platform_def.h>
23 #include <drivers/ti/uart/uart_16550.h>
25 static entry_point_info_t bl32_ep_info
;
26 static entry_point_info_t bl33_ep_info
;
28 static void platform_setup_cpu(void)
30 mmio_write_32((uintptr_t)&mt8183_mcucfg
->mp0_rw_rsvd0
, 0x00000001);
32 VERBOSE("addr of cci_adb400_dcm_config: 0x%x\n",
33 mmio_read_32((uintptr_t)&mt8183_mcucfg
->cci_adb400_dcm_config
));
34 VERBOSE("addr of sync_dcm_config: 0x%x\n",
35 mmio_read_32((uintptr_t)&mt8183_mcucfg
->sync_dcm_config
));
37 VERBOSE("mp0_spmc: 0x%x\n",
38 mmio_read_32((uintptr_t)&mt8183_mcucfg
->mp0_cputop_spmc_ctl
));
39 VERBOSE("mp1_spmc: 0x%x\n",
40 mmio_read_32((uintptr_t)&mt8183_mcucfg
->mp1_cputop_spmc_ctl
));
43 /*******************************************************************************
44 * Return a pointer to the 'entry_point_info' structure of the next image for
45 * the security state specified. BL33 corresponds to the non-secure image type
46 * while BL32 corresponds to the secure image type. A NULL pointer is returned
47 * if the image does not exist.
48 ******************************************************************************/
49 entry_point_info_t
*bl31_plat_get_next_image_ep_info(uint32_t type
)
51 entry_point_info_t
*next_image_info
;
53 next_image_info
= (type
== NON_SECURE
) ? &bl33_ep_info
: &bl32_ep_info
;
54 assert(next_image_info
->h
.type
== PARAM_EP
);
56 /* None of the images on this platform can have 0x0 as the entrypoint */
57 if (next_image_info
->pc
)
58 return next_image_info
;
63 /*******************************************************************************
64 * Perform any BL31 early platform setup. Here is an opportunity to copy
65 * parameters passed by the calling EL (S-EL1 in BL2 & S-EL3 in BL1) before they
66 * are lost (potentially). This needs to be done before the MMU is initialized
67 * so that the memory layout can be used while creating page tables.
68 * BL2 has flushed this information to memory, so we are guaranteed to pick up
70 ******************************************************************************/
71 void bl31_early_platform_setup2(u_register_t arg0
, u_register_t arg1
,
72 u_register_t arg2
, u_register_t arg3
)
74 static console_16550_t console
;
76 console_16550_register(UART0_BASE
, UART_CLOCK
, UART_BAUDRATE
, &console
);
78 NOTICE("MT8183 bl31_setup\n");
80 bl31_params_parse_helper(arg0
, &bl32_ep_info
, &bl33_ep_info
);
84 /*******************************************************************************
85 * Perform any BL31 platform setup code
86 ******************************************************************************/
87 void bl31_platform_setup(void)
90 generic_delay_timer_init();
92 /* Initialize the GIC driver, CPU and distributor interfaces */
97 plat_mtk_cci_init_sf();
100 /*******************************************************************************
101 * Perform the very early platform specific architectural setup here. At the
102 * moment this is only intializes the mmu in a quick and dirty way.
103 ******************************************************************************/
104 void bl31_plat_arch_setup(void)
107 plat_mtk_cci_enable();
109 enable_scu(read_mpidr());
111 plat_configure_mmu_el3(BL_CODE_BASE
,
112 BL_COHERENT_RAM_END
- BL_CODE_BASE
,
115 BL_COHERENT_RAM_BASE
,
116 BL_COHERENT_RAM_END
);