plat/mediatek/mt8183/bl31_plat_setup.c

   1 /*
   2  * Copyright (c) 2019, MediaTek Inc. All rights reserved.
   3  *
   4  * SPDX-License-Identifier: BSD-3-Clause
   5  */
   6
   7 #include <assert.h>
   8 #include <arch_helpers.h>
   9 #include <common/bl_common.h>
  10 #include <common/desc_image_load.h>
  11 #include <plat/common/common_def.h>
  12 #include <drivers/console.h>
  13 #include <common/debug.h>
  14 #include <drivers/generic_delay_timer.h>
  15 #include <mcucfg.h>
  16 #include <mt_gic_v3.h>
  17 #include <lib/mmio.h>
  18 #include <mtk_plat_common.h>
  19 #include <mtspmc.h>
  20 #include <plat_debug.h>
  21 #include <plat_private.h>
  22 #include <platform_def.h>
  23 #include <scu.h>
  24 #include <drivers/ti/uart/uart_16550.h>
  25
  26 static entry_point_info_t bl32_ep_info;
  27 static entry_point_info_t bl33_ep_info;
  28
  29 static void platform_setup_cpu(void)
  30 {
  31         mmio_write_32((uintptr_t)&mt8183_mcucfg->mp0_rw_rsvd0, 0x00000001);
  32
  33         VERBOSE("addr of cci_adb400_dcm_config: 0x%x\n",
  34                 mmio_read_32((uintptr_t)&mt8183_mcucfg->cci_adb400_dcm_config));
  35         VERBOSE("addr of sync_dcm_config: 0x%x\n",
  36                 mmio_read_32((uintptr_t)&mt8183_mcucfg->sync_dcm_config));
  37
  38         VERBOSE("mp0_spmc: 0x%x\n",
  39                 mmio_read_32((uintptr_t)&mt8183_mcucfg->mp0_cputop_spmc_ctl));
  40         VERBOSE("mp1_spmc: 0x%x\n",
  41                 mmio_read_32((uintptr_t)&mt8183_mcucfg->mp1_cputop_spmc_ctl));
  42 }
  43
  44 /*******************************************************************************
  45  * Return a pointer to the 'entry_point_info' structure of the next image for
  46  * the security state specified. BL33 corresponds to the non-secure image type
  47  * while BL32 corresponds to the secure image type. A NULL pointer is returned
  48  * if the image does not exist.
  49  ******************************************************************************/
  50 entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
  51 {
  52         entry_point_info_t *next_image_info;
  53
  54         next_image_info = (type == NON_SECURE) ? &bl33_ep_info : &bl32_ep_info;
  55         assert(next_image_info->h.type == PARAM_EP);
  56
  57         /* None of the images on this platform can have 0x0 as the entrypoint */
  58         if (next_image_info->pc)
  59                 return next_image_info;
  60         else
  61                 return NULL;
  62 }
  63
  64 /*******************************************************************************
  65  * Perform any BL31 early platform setup. Here is an opportunity to copy
  66  * parameters passed by the calling EL (S-EL1 in BL2 & S-EL3 in BL1) before they
  67  * are lost (potentially). This needs to be done before the MMU is initialized
  68  * so that the memory layout can be used while creating page tables.
  69  * BL2 has flushed this information to memory, so we are guaranteed to pick up
  70  * good data.
  71  ******************************************************************************/
  72 void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
  73                                 u_register_t arg2, u_register_t arg3)
  74 {
  75         static console_16550_t console;
  76
  77         console_16550_register(UART0_BASE, UART_CLOCK, UART_BAUDRATE, &console);
  78
  79         NOTICE("MT8183 bl31_setup\n");
  80
  81         bl31_params_parse_helper(arg0, &bl32_ep_info, &bl33_ep_info);
  82 }
  83
  84
  85 /*******************************************************************************
  86  * Perform any BL31 platform setup code
  87  ******************************************************************************/
  88 void bl31_platform_setup(void)
  89 {
  90         platform_setup_cpu();
  91         generic_delay_timer_init();
  92
  93         /* Initialize the GIC driver, CPU and distributor interfaces */
  94         mt_gic_driver_init();
  95         mt_gic_init();
  96
  97         /* Init mcsi SF */
  98         plat_mtk_cci_init_sf();
  99
 100 #if SPMC_MODE == 1
 101         spmc_init();
 102 #endif
 103 }
 104
 105 /*******************************************************************************
 106  * Perform the very early platform specific architectural setup here. At the
 107  * moment this is only intializes the mmu in a quick and dirty way.
 108  ******************************************************************************/
 109 void bl31_plat_arch_setup(void)
 110 {
 111         plat_mtk_cci_init();
 112         plat_mtk_cci_enable();
 113
 114         enable_scu(read_mpidr());
 115
 116         plat_configure_mmu_el3(BL_CODE_BASE,
 117                                BL_COHERENT_RAM_END - BL_CODE_BASE,
 118                                BL_CODE_BASE,
 119                                BL_CODE_END,
 120                                BL_COHERENT_RAM_BASE,
 121                                BL_COHERENT_RAM_END);
 122 }