plat/nvidia/tegra/soc/t186/platform_t186.mk

   1 #
   2 # Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
   3 #
   4 # SPDX-License-Identifier: BSD-3-Clause
   5 #
   6
   7 # platform configs
   8 ENABLE_AFI_DEVICE                       := 1
   9 $(eval $(call add_define,ENABLE_AFI_DEVICE))
  10
  11 ENABLE_ROC_FOR_ORDERING_CLIENT_REQUESTS := 1
  12 $(eval $(call add_define,ENABLE_ROC_FOR_ORDERING_CLIENT_REQUESTS))
  13
  14 ENABLE_CHIP_VERIFICATION_HARNESS        := 0
  15 $(eval $(call add_define,ENABLE_CHIP_VERIFICATION_HARNESS))
  16
  17 RESET_TO_BL31                           := 1
  18
  19 PROGRAMMABLE_RESET_ADDRESS              := 1
  20
  21 COLD_BOOT_SINGLE_CPU                    := 1
  22
  23 # platform settings
  24 TZDRAM_BASE                             := 0x30000000
  25 $(eval $(call add_define,TZDRAM_BASE))
  26
  27 PLATFORM_CLUSTER_COUNT                  := 2
  28 $(eval $(call add_define,PLATFORM_CLUSTER_COUNT))
  29
  30 PLATFORM_MAX_CPUS_PER_CLUSTER           := 4
  31 $(eval $(call add_define,PLATFORM_MAX_CPUS_PER_CLUSTER))
  32
  33 MAX_XLAT_TABLES                         := 24
  34 $(eval $(call add_define,MAX_XLAT_TABLES))
  35
  36 MAX_MMAP_REGIONS                        := 24
  37 $(eval $(call add_define,MAX_MMAP_REGIONS))
  38
  39 # platform files
  40 PLAT_INCLUDES           +=      -I${SOC_DIR}/drivers/include
  41
  42 BL31_SOURCES            +=      drivers/ti/uart/aarch64/16550_console.S \
  43                                 lib/cpus/aarch64/denver.S               \
  44                                 lib/cpus/aarch64/cortex_a57.S           \
  45                                 ${COMMON_DIR}/drivers/gpcdma/gpcdma.c   \
  46                                 ${COMMON_DIR}/drivers/memctrl/memctrl_v2.c \
  47                                 ${COMMON_DIR}/drivers/smmu/smmu.c       \
  48                                 ${SOC_DIR}/drivers/mce/mce.c            \
  49                                 ${SOC_DIR}/drivers/mce/ari.c            \
  50                                 ${SOC_DIR}/drivers/mce/nvg.c            \
  51                                 ${SOC_DIR}/drivers/mce/aarch64/nvg_helpers.S \
  52                                 ${SOC_DIR}/plat_memctrl.c               \
  53                                 ${SOC_DIR}/plat_psci_handlers.c         \
  54                                 ${SOC_DIR}/plat_setup.c                 \
  55                                 ${SOC_DIR}/plat_secondary.c             \
  56                                 ${SOC_DIR}/plat_sip_calls.c             \
  57                                 ${SOC_DIR}/plat_smmu.c                  \
  58                                 ${SOC_DIR}/plat_trampoline.S
  59
  60 # Enable workarounds for selected Cortex-A57 erratas.
  61 A57_DISABLE_NON_TEMPORAL_HINT   :=      1
  62 ERRATA_A57_806969               :=      1
  63 ERRATA_A57_813419               :=      1
  64 ERRATA_A57_813420               :=      1
  65 ERRATA_A57_826974               :=      1
  66 ERRATA_A57_826977               :=      1
  67 ERRATA_A57_828024               :=      1
  68 ERRATA_A57_829520               :=      1
  69 ERRATA_A57_833471               :=      1