plat/qemu/common/qemu_common.c

   1 /*
   2  * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
   3  *
   4  * SPDX-License-Identifier: BSD-3-Clause
   5  */
   6
   7 #include <platform_def.h>
   8
   9 #include <arch_helpers.h>
  10 #include <common/bl_common.h>
  11 #include <lib/xlat_tables/xlat_tables_v2.h>
  12
  13 #include "qemu_private.h"
  14
  15 #define MAP_DEVICE0     MAP_REGION_FLAT(DEVICE0_BASE,                   \
  16                                         DEVICE0_SIZE,                   \
  17                                         MT_DEVICE | MT_RW | MT_SECURE)
  18
  19 #ifdef DEVICE1_BASE
  20 #define MAP_DEVICE1     MAP_REGION_FLAT(DEVICE1_BASE,                   \
  21                                         DEVICE1_SIZE,                   \
  22                                         MT_DEVICE | MT_RW | MT_SECURE)
  23 #endif
  24
  25 #ifdef DEVICE2_BASE
  26 #define MAP_DEVICE2     MAP_REGION_FLAT(DEVICE2_BASE,                   \
  27                                         DEVICE2_SIZE,                   \
  28                                         MT_DEVICE | MT_RO | MT_SECURE)
  29 #endif
  30
  31 #define MAP_SHARED_RAM  MAP_REGION_FLAT(SHARED_RAM_BASE,                \
  32                                         SHARED_RAM_SIZE,                \
  33                                         MT_DEVICE  | MT_RW | MT_SECURE)
  34
  35 #define MAP_BL32_MEM    MAP_REGION_FLAT(BL32_MEM_BASE, BL32_MEM_SIZE,   \
  36                                         MT_MEMORY | MT_RW | MT_SECURE)
  37
  38 #define MAP_NS_DRAM0    MAP_REGION_FLAT(NS_DRAM0_BASE, NS_DRAM0_SIZE,   \
  39                                         MT_MEMORY | MT_RW | MT_NS)
  40
  41 #define MAP_FLASH0      MAP_REGION_FLAT(QEMU_FLASH0_BASE, QEMU_FLASH0_SIZE, \
  42                                         MT_MEMORY | MT_RO | MT_SECURE)
  43
  44 /*
  45  * Table of regions for various BL stages to map using the MMU.
  46  * This doesn't include TZRAM as the 'mem_layout' argument passed to
  47  * arm_configure_mmu_elx() will give the available subset of that,
  48  */
  49 #ifdef IMAGE_BL1
  50 static const mmap_region_t plat_qemu_mmap[] = {
  51         MAP_FLASH0,
  52         MAP_SHARED_RAM,
  53         MAP_DEVICE0,
  54 #ifdef MAP_DEVICE1
  55         MAP_DEVICE1,
  56 #endif
  57 #ifdef MAP_DEVICE2
  58         MAP_DEVICE2,
  59 #endif
  60         {0}
  61 };
  62 #endif
  63 #ifdef IMAGE_BL2
  64 static const mmap_region_t plat_qemu_mmap[] = {
  65         MAP_FLASH0,
  66         MAP_SHARED_RAM,
  67         MAP_DEVICE0,
  68 #ifdef MAP_DEVICE1
  69         MAP_DEVICE1,
  70 #endif
  71 #ifdef MAP_DEVICE2
  72         MAP_DEVICE2,
  73 #endif
  74         MAP_NS_DRAM0,
  75         MAP_BL32_MEM,
  76         {0}
  77 };
  78 #endif
  79 #ifdef IMAGE_BL31
  80 static const mmap_region_t plat_qemu_mmap[] = {
  81         MAP_SHARED_RAM,
  82         MAP_DEVICE0,
  83 #ifdef MAP_DEVICE1
  84         MAP_DEVICE1,
  85 #endif
  86         MAP_BL32_MEM,
  87         {0}
  88 };
  89 #endif
  90 #ifdef IMAGE_BL32
  91 static const mmap_region_t plat_qemu_mmap[] = {
  92         MAP_SHARED_RAM,
  93         MAP_DEVICE0,
  94 #ifdef MAP_DEVICE1
  95         MAP_DEVICE1,
  96 #endif
  97         {0}
  98 };
  99 #endif
 100
 101 /*******************************************************************************
 102  * Macro generating the code for the function setting up the pagetables as per
 103  * the platform memory map & initialize the mmu, for the given exception level
 104  ******************************************************************************/
 105
 106 #define DEFINE_CONFIGURE_MMU_EL(_el)                                    \
 107         void qemu_configure_mmu_##_el(unsigned long total_base, \
 108                                    unsigned long total_size,            \
 109                                    unsigned long code_start,            \
 110                                    unsigned long code_limit,            \
 111                                    unsigned long ro_start,              \
 112                                    unsigned long ro_limit,              \
 113                                    unsigned long coh_start,             \
 114                                    unsigned long coh_limit)             \
 115         {                                                               \
 116                 mmap_add_region(total_base, total_base,                 \
 117                                 total_size,                             \
 118                                 MT_MEMORY | MT_RW | MT_SECURE);         \
 119                 mmap_add_region(code_start, code_start,                 \
 120                                 code_limit - code_start,                \
 121                                 MT_CODE | MT_SECURE);                   \
 122                 mmap_add_region(ro_start, ro_start,                     \
 123                                 ro_limit - ro_start,                    \
 124                                 MT_RO_DATA | MT_SECURE);                \
 125                 mmap_add_region(coh_start, coh_start,                   \
 126                                 coh_limit - coh_start,                  \
 127                                 MT_DEVICE | MT_RW | MT_SECURE);         \
 128                 mmap_add(plat_qemu_mmap);                               \
 129                 init_xlat_tables();                                     \
 130                                                                         \
 131                 enable_mmu_##_el(0);                                    \
 132         }
 133
 134 /* Define EL1 and EL3 variants of the function initialising the MMU */
 135 #ifdef __aarch64__
 136 DEFINE_CONFIGURE_MMU_EL(el1)
 137 DEFINE_CONFIGURE_MMU_EL(el3)
 138 #else
 139 DEFINE_CONFIGURE_MMU_EL(svc_mon)
 140 #endif
 141
 142