2 * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
4 * SPDX-License-Identifier: BSD-3-Clause
7 #include <arch_helpers.h>
10 #include <context_mgmt.h>
16 #include <runtime_svc.h>
17 #include <secure_partition.h>
19 #include <smccc_helpers.h>
23 #include <xlat_tables_v2.h>
25 #include "spm_private.h"
27 /*******************************************************************************
28 * Secure Partition context information.
29 ******************************************************************************/
30 static sp_context_t sp_ctx
;
32 /*******************************************************************************
33 * Set state of a Secure Partition context.
34 ******************************************************************************/
35 void sp_state_set(sp_context_t
*sp_ptr
, sp_state_t state
)
37 spin_lock(&(sp_ptr
->state_lock
));
38 sp_ptr
->state
= state
;
39 spin_unlock(&(sp_ptr
->state_lock
));
42 /*******************************************************************************
43 * Wait until the state of a Secure Partition is the specified one and change it
44 * to the desired state.
45 ******************************************************************************/
46 void sp_state_wait_switch(sp_context_t
*sp_ptr
, sp_state_t from
, sp_state_t to
)
50 while (success
== 0) {
51 spin_lock(&(sp_ptr
->state_lock
));
53 if (sp_ptr
->state
== from
) {
59 spin_unlock(&(sp_ptr
->state_lock
));
63 /*******************************************************************************
64 * Check if the state of a Secure Partition is the specified one and, if so,
65 * change it to the desired state. Returns 0 on success, -1 on error.
66 ******************************************************************************/
67 int sp_state_try_switch(sp_context_t
*sp_ptr
, sp_state_t from
, sp_state_t to
)
71 spin_lock(&(sp_ptr
->state_lock
));
73 if (sp_ptr
->state
== from
) {
79 spin_unlock(&(sp_ptr
->state_lock
));
84 /*******************************************************************************
85 * This function takes an SP context pointer and performs a synchronous entry
87 ******************************************************************************/
88 static uint64_t spm_sp_synchronous_entry(sp_context_t
*sp_ctx
)
92 assert(sp_ctx
!= NULL
);
94 /* Assign the context of the SP to this CPU */
95 cm_set_context(&(sp_ctx
->cpu_ctx
), SECURE
);
97 /* Restore the context assigned above */
98 cm_el1_sysregs_context_restore(SECURE
);
99 cm_set_next_eret_context(SECURE
);
101 /* Invalidate TLBs at EL1. */
105 /* Enter Secure Partition */
106 rc
= spm_secure_partition_enter(&sp_ctx
->c_rt_ctx
);
108 /* Save secure state */
109 cm_el1_sysregs_context_save(SECURE
);
114 /*******************************************************************************
115 * This function returns to the place where spm_sp_synchronous_entry() was
117 ******************************************************************************/
118 __dead2
static void spm_sp_synchronous_exit(uint64_t rc
)
120 sp_context_t
*ctx
= &sp_ctx
;
123 * The SPM must have initiated the original request through a
124 * synchronous entry into the secure partition. Jump back to the
125 * original C runtime context with the value of rc in x0;
127 spm_secure_partition_exit(ctx
->c_rt_ctx
, rc
);
132 /*******************************************************************************
133 * Jump to each Secure Partition for the first time.
134 ******************************************************************************/
135 static int32_t spm_init(void)
140 INFO("Secure Partition init...\n");
144 ctx
->state
= SP_STATE_RESET
;
146 rc
= spm_sp_synchronous_entry(ctx
);
149 ctx
->state
= SP_STATE_IDLE
;
151 INFO("Secure Partition initialized.\n");
156 /*******************************************************************************
157 * Initialize contexts of all Secure Partitions.
158 ******************************************************************************/
159 int32_t spm_setup(void)
163 /* Disable MMU at EL1 (initialized by BL2) */
164 disable_mmu_icache_el1();
166 /* Initialize context of the SP */
167 INFO("Secure Partition context setup start...\n");
171 /* Assign translation tables context. */
172 ctx
->xlat_ctx_handle
= spm_get_sp_xlat_context();
176 /* Register init function for deferred init. */
177 bl31_register_bl32_init(&spm_init
);
179 INFO("Secure Partition setup done.\n");
184 /*******************************************************************************
185 * Function to perform a call to a Secure Partition.
186 ******************************************************************************/
187 uint64_t spm_sp_call(uint32_t smc_fid
, uint64_t x1
, uint64_t x2
, uint64_t x3
)
190 sp_context_t
*sp_ptr
= &sp_ctx
;
192 /* Wait until the Secure Partition is idle and set it to busy. */
193 sp_state_wait_switch(sp_ptr
, SP_STATE_IDLE
, SP_STATE_BUSY
);
195 /* Set values for registers on SP entry */
196 cpu_context_t
*cpu_ctx
= &(sp_ptr
->cpu_ctx
);
198 write_ctx_reg(get_gpregs_ctx(cpu_ctx
), CTX_GPREG_X0
, smc_fid
);
199 write_ctx_reg(get_gpregs_ctx(cpu_ctx
), CTX_GPREG_X1
, x1
);
200 write_ctx_reg(get_gpregs_ctx(cpu_ctx
), CTX_GPREG_X2
, x2
);
201 write_ctx_reg(get_gpregs_ctx(cpu_ctx
), CTX_GPREG_X3
, x3
);
203 /* Jump to the Secure Partition. */
204 rc
= spm_sp_synchronous_entry(sp_ptr
);
206 /* Flag Secure Partition as idle. */
207 assert(sp_ptr
->state
== SP_STATE_BUSY
);
208 sp_state_set(sp_ptr
, SP_STATE_IDLE
);
213 /*******************************************************************************
214 * MM_COMMUNICATE handler
215 ******************************************************************************/
216 static uint64_t mm_communicate(uint32_t smc_fid
, uint64_t mm_cookie
,
217 uint64_t comm_buffer_address
,
218 uint64_t comm_size_address
, void *handle
)
222 /* Cookie. Reserved for future use. It must be zero. */
223 if (mm_cookie
!= 0U) {
224 ERROR("MM_COMMUNICATE: cookie is not zero\n");
225 SMC_RET1(handle
, SPM_INVALID_PARAMETER
);
228 if (comm_buffer_address
== 0U) {
229 ERROR("MM_COMMUNICATE: comm_buffer_address is zero\n");
230 SMC_RET1(handle
, SPM_INVALID_PARAMETER
);
233 if (comm_size_address
!= 0U) {
234 VERBOSE("MM_COMMUNICATE: comm_size_address is not 0 as recommended.\n");
238 * The current secure partition design mandates
239 * - at any point, only a single core can be
240 * executing in the secure partiton.
241 * - a core cannot be preempted by an interrupt
242 * while executing in secure partition.
243 * Raise the running priority of the core to the
244 * interrupt level configured for secure partition
245 * so as to block any interrupt from preempting this
248 ehf_activate_priority(PLAT_SP_PRI
);
250 /* Save the Normal world context */
251 cm_el1_sysregs_context_save(NON_SECURE
);
253 rc
= spm_sp_call(smc_fid
, comm_buffer_address
, comm_size_address
,
256 /* Restore non-secure state */
257 cm_el1_sysregs_context_restore(NON_SECURE
);
258 cm_set_next_eret_context(NON_SECURE
);
261 * Exited from secure partition. This core can take
264 ehf_deactivate_priority(PLAT_SP_PRI
);
266 SMC_RET1(handle
, rc
);
269 /*******************************************************************************
270 * Secure Partition Manager SMC handler.
271 ******************************************************************************/
272 uint64_t spm_smc_handler(uint32_t smc_fid
,
283 /* Determine which security state this SMC originated from */
284 ns
= is_caller_non_secure(flags
);
286 if (ns
== SMC_FROM_SECURE
) {
288 /* Handle SMCs from Secure world. */
290 assert(handle
== cm_get_context(SECURE
));
292 /* Make next ERET jump to S-EL0 instead of S-EL1. */
293 cm_set_elr_spsr_el3(SECURE
, read_elr_el1(), read_spsr_el1());
297 case SPM_VERSION_AARCH32
:
298 SMC_RET1(handle
, SPM_VERSION_COMPILED
);
300 case SP_EVENT_COMPLETE_AARCH64
:
301 spm_sp_synchronous_exit(x1
);
303 case SP_MEMORY_ATTRIBUTES_GET_AARCH64
:
304 INFO("Received SP_MEMORY_ATTRIBUTES_GET_AARCH64 SMC\n");
306 if (sp_ctx
.state
!= SP_STATE_RESET
) {
307 WARN("SP_MEMORY_ATTRIBUTES_GET_AARCH64 is available at boot time only\n");
308 SMC_RET1(handle
, SPM_NOT_SUPPORTED
);
311 spm_memory_attributes_get_smc_handler(
314 case SP_MEMORY_ATTRIBUTES_SET_AARCH64
:
315 INFO("Received SP_MEMORY_ATTRIBUTES_SET_AARCH64 SMC\n");
317 if (sp_ctx
.state
!= SP_STATE_RESET
) {
318 WARN("SP_MEMORY_ATTRIBUTES_SET_AARCH64 is available at boot time only\n");
319 SMC_RET1(handle
, SPM_NOT_SUPPORTED
);
322 spm_memory_attributes_set_smc_handler(
323 &sp_ctx
, x1
, x2
, x3
));
329 /* Handle SMCs from Non-secure world. */
331 assert(handle
== cm_get_context(NON_SECURE
));
335 case MM_VERSION_AARCH32
:
336 SMC_RET1(handle
, MM_VERSION_COMPILED
);
338 case MM_COMMUNICATE_AARCH32
:
339 case MM_COMMUNICATE_AARCH64
:
340 return mm_communicate(smc_fid
, x1
, x2
, x3
, handle
);
342 case SP_MEMORY_ATTRIBUTES_GET_AARCH64
:
343 case SP_MEMORY_ATTRIBUTES_SET_AARCH64
:
344 /* SMC interfaces reserved for secure callers. */
345 SMC_RET1(handle
, SPM_NOT_SUPPORTED
);
352 SMC_RET1(handle
, SMC_UNK
);