target/linux/adm5120/files/arch/mips/adm5120/boards/cellvision.c

   1 /*
   2  *  $Id$
   3  *
   4  *  Cellvision/SparkLAN boards
   5  *
   6  *  Copyright (C) 2007 OpenWrt.org
   7  *  Copyright (C) 2007 Gabor Juhos <juhosg at openwrt.org>
   8  *
   9  *  This program is free software; you can redistribute it and/or modify it
  10  *  under the terms of the GNU General Public License version 2 as published
  11  *  by the Free Software Foundation.
  12  *
  13  */
  14
  15 #include <linux/kernel.h>
  16 #include <linux/init.h>
  17
  18 #include <asm/bootinfo.h>
  19 #include <asm/gpio.h>
  20
  21 #include <adm5120_board.h>
  22 #include <adm5120_platform.h>
  23 #include <adm5120_irq.h>
  24
  25 #define CAS6XX_GPIO_DEV_MASK    (1 << ADM5120_GPIO_PIN5)
  26 #define CAS7XX_GPIO_DEV_MASK    (1 << ADM5120_GPIO_PIN5)
  27 #define NFS_GPIO_DEV_MASK       (1 << ADM5120_GPIO_PIN5)
  28
  29 static void switch_bank_gpio5(unsigned bank)
  30 {
  31         switch (bank) {
  32         case 0:
  33                 gpio_set_value(ADM5120_GPIO_PIN5, 0);
  34                 break;
  35         case 1:
  36                 gpio_set_value(ADM5120_GPIO_PIN5, 1);
  37                 break;
  38         }
  39 }
  40
  41 static struct adm5120_pci_irq cas771_pci_irqs[] __initdata = {
  42         PCIIRQ(2, 0, 1, ADM5120_IRQ_PCI0),
  43         PCIIRQ(3, 0, 1, ADM5120_IRQ_PCI1),
  44         PCIIRQ(3, 2, 3, ADM5120_IRQ_PCI2)
  45 };
  46
  47 static struct mtd_partition cas6xx_partitions[] = {
  48         {
  49                 .name   = "admboot",
  50                 .offset = 0,
  51                 .size   = 32*1024,
  52                 .mask_flags = MTD_WRITEABLE,
  53         } , {
  54                 .name   = "config",
  55                 .offset = MTDPART_OFS_APPEND,
  56                 .size   = 32*1024,
  57         } , {
  58                 .name   = "nvfs1",
  59                 .offset = MTDPART_OFS_APPEND,
  60                 .size   = 64*1024,
  61         } , {
  62                 .name   = "nvfs2",
  63                 .offset = MTDPART_OFS_APPEND,
  64                 .size   = 64*1024,
  65         } , {
  66                 .name   = "firmware",
  67                 .offset = MTDPART_OFS_APPEND,
  68                 .size   = MTDPART_SIZ_FULL,
  69         }
  70 };
  71
  72 static struct mtd_partition cas7xx_partitions[] = {
  73         {
  74                 .name   = "admboot",
  75                 .offset = 0,
  76                 .size   = 32*1024,
  77                 .mask_flags = MTD_WRITEABLE,
  78         } , {
  79                 .name   = "config",
  80                 .offset = MTDPART_OFS_APPEND,
  81                 .size   = 32*1024,
  82         } , {
  83                 .name   = "nvfs",
  84                 .offset = MTDPART_OFS_APPEND,
  85                 .size   = 128*1024,
  86         } , {
  87                 .name   = "firmware",
  88                 .offset = MTDPART_OFS_APPEND,
  89                 .size   = MTDPART_SIZ_FULL,
  90         }
  91 };
  92
  93 static struct platform_device *cas6xx_devices[] __initdata = {
  94         &adm5120_flash0_device,
  95 };
  96
  97 static struct platform_device *cas7xx_devices[] __initdata = {
  98         &adm5120_flash0_device,
  99 };
 100
 101 static void __init cas6xx_setup(void)
 102 {
 103         gpio_request(ADM5120_GPIO_PIN5, NULL);  /* for flash A20 line */
 104         gpio_direction_output(ADM5120_GPIO_PIN5, 0);
 105
 106         /* setup data for flash0 device */
 107         adm5120_flash0_data.switch_bank = switch_bank_gpio5;
 108         adm5120_flash0_data.nr_parts = ARRAY_SIZE(cas6xx_partitions);
 109         adm5120_flash0_data.parts = cas6xx_partitions;
 110
 111         adm5120_gpiodev_resource.start &= ~CAS6XX_GPIO_DEV_MASK;
 112
 113         /* TODO: setup mac address */
 114 }
 115
 116 static void __init cas7xx_setup(void)
 117 {
 118         gpio_request(ADM5120_GPIO_PIN5, NULL);  /* for flash A20 line */
 119         gpio_direction_output(ADM5120_GPIO_PIN5, 0);
 120
 121         /* setup data for flash0 device */
 122         adm5120_flash0_data.switch_bank = switch_bank_gpio5;
 123         adm5120_flash0_data.nr_parts = ARRAY_SIZE(cas7xx_partitions);
 124         adm5120_flash0_data.parts = cas7xx_partitions;
 125
 126         adm5120_gpiodev_resource.start &= ~CAS7XX_GPIO_DEV_MASK;
 127
 128         /* TODO: setup mac address */
 129 }
 130
 131 static void __init nfs_setup(void)
 132 {
 133         gpio_request(ADM5120_GPIO_PIN5, NULL);  /* for flash A20 line */
 134         gpio_direction_output(ADM5120_GPIO_PIN5, 0);
 135
 136         /* setup data for flash0 device */
 137         adm5120_flash0_data.switch_bank = switch_bank_gpio5;
 138         adm5120_flash0_data.nr_parts = ARRAY_SIZE(cas6xx_partitions);
 139         adm5120_flash0_data.parts = cas6xx_partitions;
 140
 141         adm5120_gpiodev_resource.start &= ~NFS_GPIO_DEV_MASK;
 142
 143         /* TODO: setup mac address */
 144 }
 145
 146 unsigned char nfs_vlans[6] = { /* TODO: not tested */
 147         0x41, 0x42, 0x44, 0x48, 0x50, 0x00
 148 };
 149
 150 /*--------------------------------------------------------------------------*/
 151
 152 ADM5120_BOARD_START(CAS630, "Cellvision CAS-630/630W")
 153         .board_setup    = cas6xx_setup,
 154         .eth_num_ports  = 1,
 155         .num_devices    = ARRAY_SIZE(cas6xx_devices),
 156         .devices        = cas6xx_devices,
 157         /* TODO: PCI IRQ map */
 158 ADM5120_BOARD_END
 159
 160 ADM5120_BOARD_START(CAS670, "Cellvision CAS-670/670W")
 161         .board_setup    = cas6xx_setup,
 162         .eth_num_ports  = 1,
 163         .num_devices    = ARRAY_SIZE(cas6xx_devices),
 164         .devices        = cas6xx_devices,
 165         /* TODO: PCI IRQ map */
 166 ADM5120_BOARD_END
 167
 168 ADM5120_BOARD_START(CAS700, "Cellvision CAS-700/700W")
 169         .board_setup    = cas7xx_setup,
 170         .eth_num_ports  = 1,
 171         .num_devices    = ARRAY_SIZE(cas7xx_devices),
 172         .devices        = cas7xx_devices,
 173         /* TODO: PCI IRQ map */
 174 ADM5120_BOARD_END
 175
 176 ADM5120_BOARD_START(CAS771, "Cellvision CAS-771/771W")
 177         .board_setup    = cas7xx_setup,
 178         .eth_num_ports  = 1,
 179         .num_devices    = ARRAY_SIZE(cas7xx_devices),
 180         .devices        = cas7xx_devices,
 181         .pci_nr_irqs    = ARRAY_SIZE(cas771_pci_irqs),
 182         .pci_irq_map    = cas771_pci_irqs,
 183 ADM5120_BOARD_END
 184
 185 ADM5120_BOARD_START(CAS790, "Cellvision CAS-790")
 186         .board_setup    = cas7xx_setup,
 187         .eth_num_ports  = 1,
 188         .num_devices    = ARRAY_SIZE(cas7xx_devices),
 189         .devices        = cas7xx_devices,
 190         /* TODO: PCI IRQ map */
 191 ADM5120_BOARD_END
 192
 193 ADM5120_BOARD_START(CAS861, "Cellvision CAS-861/861W")
 194         .board_setup    = cas7xx_setup,
 195         .eth_num_ports  = 1,
 196         .num_devices    = ARRAY_SIZE(cas7xx_devices),
 197         .devices        = cas7xx_devices,
 198         /* TODO: PCI IRQ map */
 199 ADM5120_BOARD_END
 200
 201 ADM5120_BOARD_START(NFS101U, "Cellvision NFS-101U/101WU")
 202         .board_setup    = nfs_setup,
 203         .eth_num_ports  = 5,
 204         .eth_vlans      = nfs_vlans,
 205         .num_devices    = ARRAY_SIZE(cas6xx_devices),
 206         .devices        = cas6xx_devices,
 207         /* TODO: PCI IRQ map */
 208 ADM5120_BOARD_END