target/linux/adm5120/files/arch/mips/adm5120/platform.c

   1 /*
   2  *  $Id$
   3  *
   4  *  Generic ADM5120 platform devices
   5  *
   6  *  Copyright (C) 2007 OpenWrt.org
   7  *  Copyright (C) 2007 Gabor Juhos <juhosg at openwrt.org>
   8  *
   9  *  This program is free software; you can redistribute it and/or
  10  *  modify it under the terms of the GNU General Public License
  11  *  as published by the Free Software Foundation; either version 2
  12  *  of the License, or (at your option) any later version.
  13  *
  14  *  This program is distributed in the hope that it will be useful,
  15  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *  GNU General Public License for more details.
  18  *
  19  *  You should have received a copy of the GNU General Public License
  20  *  along with this program; if not, write to the
  21  *  Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
  22  *  Boston, MA  02110-1301, USA.
  23  *
  24  */
  25
  26 #include <linux/init.h>
  27 #include <linux/kernel.h>
  28 #include <linux/list.h>
  29 #include <linux/device.h>
  30 #include <linux/platform_device.h>
  31
  32 #include <asm/bootinfo.h>
  33 #include <asm/gpio.h>
  34
  35 #include <adm5120_defs.h>
  36 #include <adm5120_info.h>
  37 #include <adm5120_irq.h>
  38 #include <adm5120_switch.h>
  39 #include <adm5120_nand.h>
  40 #include <adm5120_platform.h>
  41
  42 #if 1
  43 /*
  44  * TODO:remove global adm5120_eth* variables when the switch driver will be
  45  *      converted into a real platform driver
  46  */
  47 unsigned int adm5120_eth_num_ports = 6;
  48 EXPORT_SYMBOL_GPL(adm5120_eth_num_ports);
  49
  50 unsigned char adm5120_eth_macs[6][6] = {
  51         {'\00', 'A', 'D', 'M', '\x51', '\x20' },
  52         {'\00', 'A', 'D', 'M', '\x51', '\x21' },
  53         {'\00', 'A', 'D', 'M', '\x51', '\x22' },
  54         {'\00', 'A', 'D', 'M', '\x51', '\x23' },
  55         {'\00', 'A', 'D', 'M', '\x51', '\x24' },
  56         {'\00', 'A', 'D', 'M', '\x51', '\x25' }
  57 };
  58 EXPORT_SYMBOL_GPL(adm5120_eth_macs);
  59
  60 unsigned char adm5120_eth_vlans[6] = {
  61         0x41, 0x42, 0x44, 0x48, 0x50, 0x60
  62 };
  63 EXPORT_SYMBOL_GPL(adm5120_eth_vlans);
  64
  65 #else
  66 /* Built-in ethernet switch */
  67 struct adm5120_switch_platform_data adm5120_switch_data;
  68 struct platform_device adm5120_switch_device = {
  69         .name   = "adm5120-switch",
  70         .id     = -1,
  71         .dev.platform_data = &adm5120_switch_data,
  72 };
  73 #endif
  74
  75 /* USB Host Controller */
  76 struct resource adm5120_hcd_resources[] = {
  77         [0] = {
  78                 .start  = ADM5120_USBC_BASE,
  79                 .end    = ADM5120_USBC_BASE+ADM5120_USBC_SIZE-1,
  80                 .flags  = IORESOURCE_MEM,
  81         },
  82         [1] = {
  83                 .start  = ADM5120_IRQ_USBC,
  84                 .end    = ADM5120_IRQ_USBC,
  85                 .flags  = IORESOURCE_IRQ,
  86         },
  87 };
  88
  89 static u64 adm5120_hcd_dma_mask = ~(u32)0;
  90
  91 struct platform_device adm5120_hcd_device = {
  92         .name           = "adm5120-hcd",
  93         .id             = 0,
  94         .num_resources  = ARRAY_SIZE(adm5120_hcd_resources),
  95         .resource       = adm5120_hcd_resources,
  96         .dev = {
  97                 .dma_mask       = &adm5120_hcd_dma_mask,
  98                 .coherent_dma_mask = 0xFFFFFFFF,
  99         }
 100 };
 101
 102 /* NOR flash 0 */
 103 struct adm5120_flash_platform_data adm5120_flash0_data;
 104 struct platform_device adm5120_flash0_device =  {
 105         .name   = "adm5120-flash",
 106         .id     = 0,
 107         .dev.platform_data = &adm5120_flash0_data,
 108 };
 109
 110 /* NOR flash 1 */
 111 struct adm5120_flash_platform_data adm5120_flash1_data;
 112 struct platform_device adm5120_flash1_device =  {
 113         .name   = "adm5120-flash",
 114         .id     = 1,
 115         .dev.platform_data = &adm5120_flash1_data,
 116 };
 117
 118 /* NAND flash */
 119 struct resource adm5120_nand_resource[] = {
 120         [0] = {
 121                 .start  = ADM5120_NAND_BASE,
 122                 .end    = ADM5120_NAND_BASE + ADM5120_NAND_SIZE-1,
 123                 .flags  = IORESOURCE_MEM,
 124         },
 125 };
 126
 127 struct platform_nand_data adm5120_nand_data = {
 128         .ctrl.dev_ready = adm5120_nand_ready,
 129         .ctrl.cmd_ctrl  = adm5120_nand_cmd_ctrl,
 130 };
 131
 132 struct platform_device adm5120_nand_device = {
 133         .name           = "gen_nand",
 134         .id             = -1,
 135         .num_resources  = ARRAY_SIZE(adm5120_nand_resource),
 136         .resource       = adm5120_nand_resource,
 137         .dev.platform_data = &adm5120_nand_data,
 138 };
 139
 140 /* built-in UARTs */
 141 struct amba_pl010_data adm5120_uart0_data = {
 142         .set_mctrl = adm5120_uart_set_mctrl
 143 };
 144
 145 struct amba_device adm5120_uart0_device = {
 146         .dev            = {
 147                 .bus_id = "APB:UART0",
 148                 .platform_data = &adm5120_uart0_data,
 149         },
 150         .res            = {
 151                 .start  = ADM5120_UART0_BASE,
 152                 .end    = ADM5120_UART0_BASE + ADM5120_UART_SIZE - 1,
 153                 .flags  = IORESOURCE_MEM,
 154         },
 155         .irq            = { ADM5120_IRQ_UART0, -1 },
 156         .periphid       = 0x0041010,
 157 };
 158
 159 struct amba_pl010_data adm5120_uart1_data = {
 160         .set_mctrl = adm5120_uart_set_mctrl
 161 };
 162
 163 struct amba_device adm5120_uart1_device = {
 164         .dev            = {
 165                 .bus_id = "APB:UART1",
 166                 .platform_data = &adm5120_uart1_data,
 167         },
 168         .res            = {
 169                 .start  = ADM5120_UART1_BASE,
 170                 .end    = ADM5120_UART1_BASE + ADM5120_UART_SIZE - 1,
 171                 .flags  = IORESOURCE_MEM,
 172         },
 173         .irq            = { ADM5120_IRQ_UART1, -1 },
 174         .periphid       = 0x0041010,
 175 };
 176
 177 void adm5120_uart_set_mctrl(struct amba_device *dev, void __iomem *base,
 178                 unsigned int mctrl)
 179 {
 180 }
 181
 182 int adm5120_nand_ready(struct mtd_info *mtd)
 183 {
 184         return ((adm5120_nand_get_status() & ADM5120_NAND_STATUS_READY) != 0);
 185 }
 186
 187 void adm5120_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
 188 {
 189         if (ctrl & NAND_CTRL_CHANGE) {
 190                 adm5120_nand_set_cle(ctrl & NAND_CLE);
 191                 adm5120_nand_set_ale(ctrl & NAND_ALE);
 192                 adm5120_nand_set_cen(ctrl & NAND_NCE);
 193         }
 194
 195         if (cmd != NAND_CMD_NONE)
 196                 NAND_WRITE_REG(NAND_REG_DATA, cmd);
 197 }
 198