4 * Generic ADM5120 platform devices
6 * Copyright (C) 2007 OpenWrt.org
7 * Copyright (C) 2007 Gabor Juhos <juhosg at openwrt.org>
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License version 2 as published
11 * by the Free Software Foundation.
15 #include <linux/init.h>
16 #include <linux/kernel.h>
17 #include <linux/list.h>
18 #include <linux/device.h>
19 #include <linux/platform_device.h>
21 #include <asm/bootinfo.h>
24 #include <adm5120_defs.h>
25 #include <adm5120_info.h>
26 #include <adm5120_irq.h>
27 #include <adm5120_switch.h>
28 #include <adm5120_nand.h>
29 #include <adm5120_platform.h>
33 * TODO:remove global adm5120_eth* variables when the switch driver will be
34 * converted into a real platform driver
36 unsigned int adm5120_eth_num_ports
= 6;
37 EXPORT_SYMBOL_GPL(adm5120_eth_num_ports
);
39 unsigned char adm5120_eth_macs
[6][6] = {
40 {'\00', 'A', 'D', 'M', '\x51', '\x20' },
41 {'\00', 'A', 'D', 'M', '\x51', '\x21' },
42 {'\00', 'A', 'D', 'M', '\x51', '\x22' },
43 {'\00', 'A', 'D', 'M', '\x51', '\x23' },
44 {'\00', 'A', 'D', 'M', '\x51', '\x24' },
45 {'\00', 'A', 'D', 'M', '\x51', '\x25' }
47 EXPORT_SYMBOL_GPL(adm5120_eth_macs
);
49 unsigned char adm5120_eth_vlans
[6] = {
50 0x41, 0x42, 0x44, 0x48, 0x50, 0x60
52 EXPORT_SYMBOL_GPL(adm5120_eth_vlans
);
55 /* Built-in ethernet switch */
56 struct resource adm5120_switch_resources
[] = {
58 .start
= ADM5120_SWITCH_BASE
,
59 .end
= ADM5120_SWITCH_BASE
+ADM5120_SWITCH_SIZE
-1,
60 .flags
= IORESOURCE_MEM
,
63 .start
= ADM5120_IRQ_SWITCH
,
64 .end
= ADM5120_IRQ_SWITCH
,
65 .flags
= IORESOURCE_IRQ
,
69 struct adm5120_switch_platform_data adm5120_switch_data
;
70 struct platform_device adm5120_switch_device
= {
71 .name
= "adm5120-switch",
73 .num_resources
= ARRAY_SIZE(adm5120_switch_resources
),
74 .resource
= adm5120_switch_resources
,
75 .dev
.platform_data
= &adm5120_switch_data
,
78 /* USB Host Controller */
79 struct resource adm5120_hcd_resources
[] = {
81 .start
= ADM5120_USBC_BASE
,
82 .end
= ADM5120_USBC_BASE
+ADM5120_USBC_SIZE
-1,
83 .flags
= IORESOURCE_MEM
,
86 .start
= ADM5120_IRQ_USBC
,
87 .end
= ADM5120_IRQ_USBC
,
88 .flags
= IORESOURCE_IRQ
,
92 static u64 adm5120_hcd_dma_mask
= ~(u32
)0;
94 struct platform_device adm5120_hcd_device
= {
95 .name
= "adm5120-hcd",
97 .num_resources
= ARRAY_SIZE(adm5120_hcd_resources
),
98 .resource
= adm5120_hcd_resources
,
100 .dma_mask
= &adm5120_hcd_dma_mask
,
101 .coherent_dma_mask
= 0xFFFFFFFF,
106 struct adm5120_flash_platform_data adm5120_flash0_data
;
107 struct platform_device adm5120_flash0_device
= {
108 .name
= "adm5120-flash",
110 .dev
.platform_data
= &adm5120_flash0_data
,
114 struct adm5120_flash_platform_data adm5120_flash1_data
;
115 struct platform_device adm5120_flash1_device
= {
116 .name
= "adm5120-flash",
118 .dev
.platform_data
= &adm5120_flash1_data
,
122 struct resource adm5120_nand_resource
[] = {
124 .start
= ADM5120_NAND_BASE
,
125 .end
= ADM5120_NAND_BASE
+ ADM5120_NAND_SIZE
-1,
126 .flags
= IORESOURCE_MEM
,
130 struct platform_nand_data adm5120_nand_data
= {
131 .ctrl
.dev_ready
= adm5120_nand_ready
,
132 .ctrl
.cmd_ctrl
= adm5120_nand_cmd_ctrl
,
135 struct platform_device adm5120_nand_device
= {
138 .num_resources
= ARRAY_SIZE(adm5120_nand_resource
),
139 .resource
= adm5120_nand_resource
,
140 .dev
.platform_data
= &adm5120_nand_data
,
144 struct amba_pl010_data adm5120_uart0_data
= {
145 .set_mctrl
= adm5120_uart_set_mctrl
148 struct amba_device adm5120_uart0_device
= {
150 .bus_id
= "APB:UART0",
151 .platform_data
= &adm5120_uart0_data
,
154 .start
= ADM5120_UART0_BASE
,
155 .end
= ADM5120_UART0_BASE
+ ADM5120_UART_SIZE
- 1,
156 .flags
= IORESOURCE_MEM
,
158 .irq
= { ADM5120_IRQ_UART0
, -1 },
159 .periphid
= 0x0041010,
162 struct amba_pl010_data adm5120_uart1_data
= {
163 .set_mctrl
= adm5120_uart_set_mctrl
166 struct amba_device adm5120_uart1_device
= {
168 .bus_id
= "APB:UART1",
169 .platform_data
= &adm5120_uart1_data
,
172 .start
= ADM5120_UART1_BASE
,
173 .end
= ADM5120_UART1_BASE
+ ADM5120_UART_SIZE
- 1,
174 .flags
= IORESOURCE_MEM
,
176 .irq
= { ADM5120_IRQ_UART1
, -1 },
177 .periphid
= 0x0041010,
180 void adm5120_uart_set_mctrl(struct amba_device
*dev
, void __iomem
*base
,
185 int adm5120_nand_ready(struct mtd_info
*mtd
)
187 return ((adm5120_nand_get_status() & ADM5120_NAND_STATUS_READY
) != 0);
190 void adm5120_nand_cmd_ctrl(struct mtd_info
*mtd
, int cmd
, unsigned int ctrl
)
192 if (ctrl
& NAND_CTRL_CHANGE
) {
193 adm5120_nand_set_cle(ctrl
& NAND_CLE
);
194 adm5120_nand_set_ale(ctrl
& NAND_ALE
);
195 adm5120_nand_set_cen(ctrl
& NAND_NCE
);
198 if (cmd
!= NAND_CMD_NONE
)
199 NAND_WRITE_REG(NAND_REG_DATA
, cmd
);